* Patch [4/4] intel scu ipc
@ 2010-05-28 8:44 Ds, Sreedhara
2010-05-28 13:50 ` Matthew Garrett
0 siblings, 1 reply; 4+ messages in thread
From: Ds, Sreedhara @ 2010-05-28 8:44 UTC (permalink / raw)
To: platform-driver-x86, mjg, x86, Alan Cox
[-- Attachment #1: Type: text/plain, Size: 4608 bytes --]
Hello,
Please review and accept the patch
From 1ec87c0aece6fa90f7b44b3e21f2b35035e3317e Mon Sep 17 00:00:00 2001
From: Sreedhara DS <sreedhara.ds@intel.com>
Date: Fri, 28 May 2010 14:06:35 +0530
Subject: [PATCH] Remove indirect read write api support.
Firmware nolonger support these api, security issue
modified: ../../../arch/x86/include/asm/intel_scu_ipc.h
modified: intel_scu_ipc.c
Signed-off-by: Sreedhara DS <sreedhara.ds@intel.com>
---
arch/x86/include/asm/intel_scu_ipc.h | 14 ------
drivers/platform/x86/intel_scu_ipc.c | 82 ----------------------------------
2 files changed, 0 insertions(+), 96 deletions(-)
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4470c9a..fa2a3fd 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -28,20 +28,6 @@ int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
/* Update single register based on the mask */
int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
-/*
- * Indirect register read
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *data);
-
-/*
- * Indirect register write
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_write(u32 addr, u32 data);
-
/* Issue commands to the SCU with or without data */
int intel_scu_ipc_simple_command(int cmd, int sub);
int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 8bb3fda..9c3da65 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -116,24 +116,6 @@ static inline void ipc_data_writel(u32 data, u32 offset) /* Write ipc data */
}
/*
- * IPC destination Pointer (Write Only):
- * Use content as pointer for destination write
- */
-static inline void ipc_write_dptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x0C);
-}
-
-/*
- * IPC Source Pointer (Write Only):
- * Use content as pointer for read location
-*/
-static inline void ipc_write_sptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x08);
-}
-
-/*
* Status Register (Read Only):
* Driver will read this register to get the ready/busy status of the IPC
* block and error status of the IPC command that was just processed by SCU
@@ -414,70 +396,6 @@ int intel_scu_ipc_update_register(u16 addr, u8 bits, u8 mask)
EXPORT_SYMBOL(intel_scu_ipc_update_register);
/**
- * intel_scu_ipc_register_read - 32bit indirect read
- * @addr: register address
- * @value: 32bit value return
- *
- * Performs IA 32 bit indirect read, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_sptr(addr);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_RD);
- err = busy_loop();
- *value = ipc_data_readl(0);
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_read);
-
-/**
- * intel_scu_ipc_register_write - 32bit indirect write
- * @addr: register address
- * @value: 32bit value to write
- *
- * Performs IA 32 bit indirect write, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_write(u32 addr, u32 value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_dptr(addr);
- ipc_data_writel(value, 0);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_WR);
- err = busy_loop();
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_write);
-
-/**
* intel_scu_ipc_simple_command - send a simple command
* @cmd: command
* @sub: sub type
--
1.5.4.5
[-- Attachment #2: 0004-Remove-indirect-read-write-api-support.patch --]
[-- Type: application/octet-stream, Size: 4418 bytes --]
From 1ec87c0aece6fa90f7b44b3e21f2b35035e3317e Mon Sep 17 00:00:00 2001
From: Sreedhara DS <sreedhara.ds@intel.com>
Date: Fri, 28 May 2010 14:06:35 +0530
Subject: [PATCH] Remove indirect read write api support.
Firmware nolonger support these api, security issue
modified: ../../../arch/x86/include/asm/intel_scu_ipc.h
modified: intel_scu_ipc.c
Signed-off-by: Sreedhara DS <sreedhara.ds@intel.com>
---
arch/x86/include/asm/intel_scu_ipc.h | 14 ------
drivers/platform/x86/intel_scu_ipc.c | 82 ----------------------------------
2 files changed, 0 insertions(+), 96 deletions(-)
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4470c9a..fa2a3fd 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -28,20 +28,6 @@ int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
/* Update single register based on the mask */
int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
-/*
- * Indirect register read
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *data);
-
-/*
- * Indirect register write
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- */
-int intel_scu_ipc_register_write(u32 addr, u32 data);
-
/* Issue commands to the SCU with or without data */
int intel_scu_ipc_simple_command(int cmd, int sub);
int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 8bb3fda..9c3da65 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -116,24 +116,6 @@ static inline void ipc_data_writel(u32 data, u32 offset) /* Write ipc data */
}
/*
- * IPC destination Pointer (Write Only):
- * Use content as pointer for destination write
- */
-static inline void ipc_write_dptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x0C);
-}
-
-/*
- * IPC Source Pointer (Write Only):
- * Use content as pointer for read location
-*/
-static inline void ipc_write_sptr(u32 data) /* Write dptr data */
-{
- writel(data, ipcdev.ipc_base + 0x08);
-}
-
-/*
* Status Register (Read Only):
* Driver will read this register to get the ready/busy status of the IPC
* block and error status of the IPC command that was just processed by SCU
@@ -414,70 +396,6 @@ int intel_scu_ipc_update_register(u16 addr, u8 bits, u8 mask)
EXPORT_SYMBOL(intel_scu_ipc_update_register);
/**
- * intel_scu_ipc_register_read - 32bit indirect read
- * @addr: register address
- * @value: 32bit value return
- *
- * Performs IA 32 bit indirect read, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_read(u32 addr, u32 *value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_sptr(addr);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_RD);
- err = busy_loop();
- *value = ipc_data_readl(0);
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_read);
-
-/**
- * intel_scu_ipc_register_write - 32bit indirect write
- * @addr: register address
- * @value: 32bit value to write
- *
- * Performs IA 32 bit indirect write, returns 0 on success, or an
- * error code.
- *
- * Can be used when SCCB(System Controller Configuration Block) register
- * HRIM(Honor Restricted IPC Messages) is set (bit 23)
- *
- * This function may sleep. Locking for SCU accesses is handled for
- * the caller.
- */
-int intel_scu_ipc_register_write(u32 addr, u32 value)
-{
- u32 err = 0;
-
- mutex_lock(&ipclock);
- if (ipcdev.pdev == NULL) {
- mutex_unlock(&ipclock);
- return -ENODEV;
- }
- ipc_write_dptr(addr);
- ipc_data_writel(value, 0);
- ipc_command(4 << 16 | IPC_CMD_INDIRECT_WR);
- err = busy_loop();
- mutex_unlock(&ipclock);
- return err;
-}
-EXPORT_SYMBOL(intel_scu_ipc_register_write);
-
-/**
* intel_scu_ipc_simple_command - send a simple command
* @cmd: command
* @sub: sub type
--
1.5.4.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: Patch [4/4] intel scu ipc
2010-05-28 8:44 Patch [4/4] intel scu ipc Ds, Sreedhara
@ 2010-05-28 13:50 ` Matthew Garrett
2010-05-28 16:24 ` Alan Cox
0 siblings, 1 reply; 4+ messages in thread
From: Matthew Garrett @ 2010-05-28 13:50 UTC (permalink / raw)
To: Ds, Sreedhara; +Cc: platform-driver-x86, x86, Alan Cox
On Fri, May 28, 2010 at 02:14:06PM +0530, Ds, Sreedhara wrote:
> Subject: [PATCH] Remove indirect read write api support.
> Firmware nolonger support these api, security issue
What security issues?
--
Matthew Garrett | mjg59@srcf.ucam.org
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Patch [4/4] intel scu ipc
2010-05-28 13:50 ` Matthew Garrett
@ 2010-05-28 16:24 ` Alan Cox
2010-05-30 15:44 ` Ds, Sreedhara
0 siblings, 1 reply; 4+ messages in thread
From: Alan Cox @ 2010-05-28 16:24 UTC (permalink / raw)
To: Matthew Garrett; +Cc: Ds, Sreedhara, platform-driver-x86, x86
On Fri, 28 May 2010 14:50:59 +0100
Matthew Garrett <mjg59@srcf.ucam.org> wrote:
> On Fri, May 28, 2010 at 02:14:06PM +0530, Ds, Sreedhara wrote:
> > Subject: [PATCH] Remove indirect read write api support.
> > Firmware nolonger support these api, security issue
>
> What security issues?
It's just stuff that is gone, didn't work out internally. No driver
will use those methods, no public firmware will support them. Dead code
might be a better description.
It's not security in a Linux sense.
Alan
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: Patch [4/4] intel scu ipc
2010-05-28 16:24 ` Alan Cox
@ 2010-05-30 15:44 ` Ds, Sreedhara
0 siblings, 0 replies; 4+ messages in thread
From: Ds, Sreedhara @ 2010-05-30 15:44 UTC (permalink / raw)
To: Alan Cox, Matthew Garrett; +Cc: platform-driver-x86, x86
Hello,
The description I mentioned is confusing.
As Alan said it is not Linux security issue.
Providing indirect read/write api exposes IA registers to user and firmware removed support for these commands/api
--Sreedhara
-----Original Message-----
From: Alan Cox [mailto:alan@linux.intel.com]
Sent: Friday, May 28, 2010 9:54 PM
To: Matthew Garrett
Cc: Ds, Sreedhara; platform-driver-x86@vger.kernel.org; x86@kernel.org
Subject: Re: Patch [4/4] intel scu ipc
On Fri, 28 May 2010 14:50:59 +0100
Matthew Garrett <mjg59@srcf.ucam.org> wrote:
> On Fri, May 28, 2010 at 02:14:06PM +0530, Ds, Sreedhara wrote:
> > Subject: [PATCH] Remove indirect read write api support.
> > Firmware nolonger support these api, security issue
>
> What security issues?
It's just stuff that is gone, didn't work out internally. No driver
will use those methods, no public firmware will support them. Dead code
might be a better description.
It's not security in a Linux sense.
Alan
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2010-05-30 15:44 UTC | newest]
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2010-05-28 8:44 Patch [4/4] intel scu ipc Ds, Sreedhara
2010-05-28 13:50 ` Matthew Garrett
2010-05-28 16:24 ` Alan Cox
2010-05-30 15:44 ` Ds, Sreedhara
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