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From: John Harrison <john.c.harrison@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: Add DG1 GuC / HuC firmware defs
Date: Fri, 6 Aug 2021 11:43:57 -0700	[thread overview]
Message-ID: <0a62a5f0-ef73-cc12-5bbc-80fdc1a68803@intel.com> (raw)
In-Reply-To: <20210803051121.72017-4-matthew.brost@intel.com>

On 8/2/2021 22:11, Matthew Brost wrote:
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index f8cb00ffb506..a685d563df72 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -51,6 +51,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>   #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
>   	fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3), huc_def(tgl, 7, 9, 3)) \
>   	fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl,  7, 9, 3)) \
> +	fw_def(DG1,         0, guc_def(dg1, 62, 0, 0), huc_def(dg1,  7, 9, 3)) \
>   	fw_def(ROCKETLAKE,  0, guc_def(tgl, 62, 0, 0), huc_def(tgl,  7, 9, 3)) \
>   	fw_def(TIGERLAKE,   0, guc_def(tgl, 62, 0, 0), huc_def(tgl,  7, 9, 3)) \
>   	fw_def(JASPERLAKE,  0, guc_def(ehl, 62, 0, 0), huc_def(ehl,  9, 0, 0)) \

Reviewed-by: John Harrison <John.C.Harrison@Intel.com>


  reply	other threads:[~2021-08-06 18:44 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-03  5:11 [PATCH 0/4] Enable GuC submission by default on DG1 Matthew Brost
2021-08-03  5:11 ` [Intel-gfx] " Matthew Brost
2021-08-03  5:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-08-03  5:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-03  5:11 ` [PATCH 1/4] drm/i915: Do not define vma on stack Matthew Brost
2021-08-03  5:11   ` [Intel-gfx] " Matthew Brost
2021-08-04 19:37   ` Matthew Brost
2021-08-03  5:11 ` [PATCH 2/4] drm/i915/guc: put all guc objects in lmem when available Matthew Brost
2021-08-03  5:11   ` [Intel-gfx] " Matthew Brost
2021-08-06 18:43   ` John Harrison
2021-08-03  5:11 ` [PATCH 3/4] drm/i915/guc: Add DG1 GuC / HuC firmware defs Matthew Brost
2021-08-03  5:11   ` [Intel-gfx] " Matthew Brost
2021-08-06 18:43   ` John Harrison [this message]
2021-08-03  5:11 ` [PATCH 4/4] drm/i915/guc: Enable GuC submission by default on DG1 Matthew Brost
2021-08-03  5:11   ` [Intel-gfx] " Matthew Brost
2021-08-06 18:44   ` John Harrison
2021-08-03  5:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-08-03 12:15 ` [PATCH 0/4] " Daniel Vetter
2021-08-03 12:15   ` [Intel-gfx] " Daniel Vetter
2021-08-03 17:26   ` Matthew Brost
2021-08-03 17:26     ` [Intel-gfx] " Matthew Brost
2021-08-06 11:34     ` Thomas Hellström (Intel)
2021-08-06 12:07       ` Thomas Hellström (Intel)
2021-08-06 16:09       ` Thomas Hellström (Intel)
2021-08-07 17:20       ` Matthew Brost
2021-08-03 16:22 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork

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