From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> To: Christoph Hellwig <hch@lst.de>, x86@kernel.org Cc: tedheadster@gmail.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Date: Mon, 15 Oct 2018 14:52:04 -0400 [thread overview] Message-ID: <0a8d58b8-3c8b-c89f-e023-9d7d5d79f37c@oracle.com> (raw) In-Reply-To: <20181014075208.2715-1-hch@lst.de> On 10/14/18 3:52 AM, Christoph Hellwig wrote: > We already build the swiotlb code for 32b-t kernels with PAE support, > but the code to actually use swiotlb has only been enabled for 64-bit > kernel for an unknown reason. > > Before Linux 4.18 we papers over this fact because the networking code, > the scsi layer and some random block drivers implenented their own > bounce buffering scheme. > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers") > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") > Reported-by: tedheadster <tedheadster@gmail.com> > Tested-by: tedheadster <tedheadster@gmail.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> But since it is already in 'tip' feel free to ignore my tag. Thanks! > --- > arch/x86/kernel/pci-swiotlb.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c > index 661583662430..71c0b01d93b1 100644 > --- a/arch/x86/kernel/pci-swiotlb.c > +++ b/arch/x86/kernel/pci-swiotlb.c > @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override, > int __init pci_swiotlb_detect_4gb(void) > { > /* don't initialize swiotlb if iommu=off (no_iommu=1) */ > -#ifdef CONFIG_X86_64 > if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN) > swiotlb = 1; > -#endif > > /* > * If SME is active then swiotlb will be set to 1 so that bounce >
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Rzeszutek Wilk <konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org> To: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>, x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Date: Mon, 15 Oct 2018 14:52:04 -0400 [thread overview] Message-ID: <0a8d58b8-3c8b-c89f-e023-9d7d5d79f37c@oracle.com> (raw) In-Reply-To: <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org> On 10/14/18 3:52 AM, Christoph Hellwig wrote: > We already build the swiotlb code for 32b-t kernels with PAE support, > but the code to actually use swiotlb has only been enabled for 64-bit > kernel for an unknown reason. > > Before Linux 4.18 we papers over this fact because the networking code, > the scsi layer and some random block drivers implenented their own > bounce buffering scheme. > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers") > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") > Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org> But since it is already in 'tip' feel free to ignore my tag. Thanks! > --- > arch/x86/kernel/pci-swiotlb.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c > index 661583662430..71c0b01d93b1 100644 > --- a/arch/x86/kernel/pci-swiotlb.c > +++ b/arch/x86/kernel/pci-swiotlb.c > @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override, > int __init pci_swiotlb_detect_4gb(void) > { > /* don't initialize swiotlb if iommu=off (no_iommu=1) */ > -#ifdef CONFIG_X86_64 > if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN) > swiotlb = 1; > -#endif > > /* > * If SME is active then swiotlb will be set to 1 so that bounce >
next prev parent reply other threads:[~2018-10-15 18:52 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig 2018-10-14 7:52 ` Christoph Hellwig 2018-10-14 8:13 ` Thomas Gleixner 2018-10-14 8:13 ` Thomas Gleixner 2018-10-14 8:14 ` Christoph Hellwig 2018-10-14 8:14 ` Christoph Hellwig 2018-10-14 8:57 ` Thomas Gleixner 2018-10-14 8:57 ` Thomas Gleixner 2018-10-14 9:04 ` Ingo Molnar 2018-10-14 9:04 ` Ingo Molnar 2018-10-14 12:49 ` tedheadster 2018-10-14 9:18 ` [tip:x86/urgent] x86/swiotlb: Enable " tip-bot for Christoph Hellwig 2018-10-15 9:09 ` tip-bot for Christoph Hellwig 2018-10-15 18:52 ` Konrad Rzeszutek Wilk [this message] 2018-10-15 18:52 ` [PATCH] x86: enable " Konrad Rzeszutek Wilk [not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org> 2018-10-16 13:11 ` tedheadster [not found] ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-10-17 10:16 ` Thomas Gleixner 2018-10-17 16:33 ` Christoph Hellwig [not found] ` <20181017163351.GA23719-jcswGhMUV9g@public.gmane.org> 2018-10-17 17:41 ` tedheadster [not found] ` <CAP8WD_boL-DxEXxa-ci382Ff8yTdMS9T+sy2Y0-LEX-WPc8L_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-10-18 12:51 ` Christoph Hellwig [not found] ` <20181018125116.GA24676-jcswGhMUV9g@public.gmane.org> 2018-10-19 1:00 ` tedheadster [not found] ` <CAP8WD_Z2XvLsqimSnODwr5gj6GRuzh4SMKN56n6Y0JzufG=E8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-10-19 5:51 ` Ingo Molnar 2018-10-18 6:12 ` Ingo Molnar 2018-10-19 5:54 ` [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM " tip-bot for Christoph Hellwig
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