All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bin.meng@windriver.com>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	qemu-block@nongnu.org,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible
Date: Sun, 16 Aug 2020 13:06:34 +0200	[thread overview]
Message-ID: <0b150e6d-1221-ef3b-4692-11d18fef9b52@amsat.org> (raw)
In-Reply-To: <CAEUhbmUtD2miWZk8uYvB6VkM8bu9rqr32J29WJADoNy9JethRg@mail.gmail.com>

On 8/16/20 10:50 AM, Bin Meng wrote:
> Hi Philippe,
> 
> On Sat, Aug 15, 2020 at 3:51 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> On 8/14/20 6:40 PM, Bin Meng wrote:
>>> From: Bin Meng <bin.meng@windriver.com>
>>>
>>> sdhci_poweron_reset() might be needed for any SDHCI compatible
>>> device that is built on top of the generic SDHCI device.
>>
>> NAck. Please use device_legacy_reset() instead.
>>
>> In next patch:
>>
>>   device_legacy_reset(DEVICE(&sdhci->slot));
>>
> 
> The function comments say this API is deprecated.
> 
> /**
>  * device_legacy_reset:
>  *
>  * Reset a single device (by calling the reset method).
>  * Note: This function is deprecated and will be removed when it becomes unused.
>  * Please use device_cold_reset() now.
>  */
> 
> Should we use device_cold_reset() here?

Oops yes, certainly.

> 
> Regards,
> Bin
> 


  reply	other threads:[~2020-08-16 11:07 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-14 16:40 [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support Bin Meng
2020-08-14 16:40 ` Bin Meng
2020-08-14 16:40 ` [PATCH 01/18] target/riscv: cpu: Add a new 'resetvec' property Bin Meng
2020-08-17 17:49   ` Alistair Francis
2020-08-17 17:49     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 02/18] hw/riscv: hart: " Bin Meng
2020-08-17 17:49   ` Alistair Francis
2020-08-17 17:49     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 03/18] target/riscv: cpu: Set reset vector based on the configured property value Bin Meng
2020-08-17 17:52   ` Alistair Francis
2020-08-17 17:52     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 04/18] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board Bin Meng
2020-08-17 19:39   ` Alistair Francis
2020-08-17 19:39     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 05/18] hw/char: Add Microchip PolarFire SoC MMUART emulation Bin Meng
2020-08-14 16:40   ` Bin Meng
2020-08-17 20:51   ` Alistair Francis
2020-08-17 20:51     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 06/18] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs Bin Meng
2020-08-17 21:06   ` Alistair Francis
2020-08-17 21:06     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure Bin Meng
2020-08-15  7:58   ` Philippe Mathieu-Daudé
2020-08-18 16:30     ` Sai Pavan Boddu
2020-08-21 10:09       ` Sai Pavan Boddu
2020-08-21 10:09         ` Sai Pavan Boddu
2020-08-21 10:08         ` Bin Meng
2020-08-21 10:08           ` Bin Meng
2020-08-24  4:13           ` Sai Pavan Boddu
2020-08-24  4:13             ` Sai Pavan Boddu
2020-08-14 16:40 ` [PATCH 08/18] hw/sd: sd: Correctly set the high capacity bit Bin Meng
2020-08-15  8:38   ` Philippe Mathieu-Daudé
2020-08-16  8:54     ` Bin Meng
2020-08-16  8:54       ` Bin Meng
2020-08-14 16:40 ` [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible Bin Meng
2020-08-15  7:51   ` Philippe Mathieu-Daudé
2020-08-16  8:50     ` Bin Meng
2020-08-16  8:50       ` Bin Meng
2020-08-16 11:06       ` Philippe Mathieu-Daudé [this message]
2020-08-14 16:40 ` [PATCH 10/18] hw/sd: Add Cadence SDHCI emulation Bin Meng
2020-08-14 16:40   ` Bin Meng
2020-08-15  8:51   ` Philippe Mathieu-Daudé
2020-08-15  8:51     ` Philippe Mathieu-Daudé
2020-08-14 16:40 ` [PATCH 11/18] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card Bin Meng
2020-08-15  8:55   ` Philippe Mathieu-Daudé
2020-08-14 16:40 ` [PATCH 12/18] hw/dma: Add Microchip PolarFire Soc DMA controller emulation Bin Meng
2020-08-14 16:40 ` [PATCH 13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller Bin Meng
2020-08-15  9:00   ` Philippe Mathieu-Daudé
2020-08-16  8:57     ` Bin Meng
2020-08-16  8:57       ` Bin Meng
2020-08-16 11:08       ` Philippe Mathieu-Daudé
2020-08-14 16:40 ` [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property Bin Meng
2020-08-14 16:40   ` Bin Meng
2020-08-15  9:06   ` Philippe Mathieu-Daudé
2020-08-16  8:29     ` Bin Meng
2020-08-16  8:29       ` Bin Meng
2020-08-16 11:14       ` Philippe Mathieu-Daudé
2020-08-16 11:14         ` Philippe Mathieu-Daudé
2020-08-16 12:08       ` Nathan Rossi
2020-08-16 12:08         ` Nathan Rossi
2020-08-16 13:42         ` Bin Meng
2020-08-16 13:42           ` Bin Meng
2020-08-16 16:31           ` Philippe Mathieu-Daudé
2020-08-16 16:31             ` Philippe Mathieu-Daudé
2020-08-14 16:40 ` [PATCH 15/18] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs Bin Meng
2020-08-21 18:46   ` Alistair Francis
2020-08-21 18:46     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 16/18] hw/riscv: microchip_pfsoc: Hook GPIO controllers Bin Meng
2020-08-21 18:47   ` Alistair Francis
2020-08-21 18:47     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 17/18] hw/riscv: clint: Avoid using hard-coded timebase frequency Bin Meng
2020-08-25 18:33   ` Alistair Francis
2020-08-25 18:33     ` Alistair Francis
2020-08-14 16:40 ` [PATCH 18/18] hw/riscv: microchip_pfsoc: Document the software used for testing Bin Meng
2020-08-21 18:51   ` Alistair Francis
2020-08-21 18:51     ` Alistair Francis
2020-08-14 17:44 ` [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support Anup Patel
2020-08-14 17:44   ` Anup Patel
2020-08-17 10:30   ` Bin Meng
2020-08-17 10:30     ` Bin Meng
2020-08-17 15:44     ` via
2020-08-17 15:44       ` Cyril.Jean
2020-08-17 19:28       ` Alistair Francis
2020-08-17 19:28         ` Alistair Francis
2020-08-17 19:53         ` via
2020-08-17 19:53           ` Cyril.Jean
2020-08-18  6:17           ` Anup Patel
2020-08-18  6:17             ` Anup Patel
2020-08-18 13:09             ` via
2020-08-18 13:09               ` Cyril.Jean
2020-08-18 13:55               ` Anup Patel
2020-08-18 13:55                 ` Anup Patel
2020-08-19  1:34                 ` Bin Meng
2020-08-19  1:34                   ` Bin Meng
2020-08-19 10:13                   ` via
2020-08-19 10:13                     ` Cyril.Jean
2020-08-21 18:23                     ` Alistair Francis
2020-08-21 18:23                       ` Alistair Francis
2020-08-14 18:10 ` no-reply
2020-08-14 18:10   ` no-reply

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=0b150e6d-1221-ef3b-4692-11d18fef9b52@amsat.org \
    --to=f4bug@amsat.org \
    --cc=Alistair.Francis@wdc.com \
    --cc=bin.meng@windriver.com \
    --cc=bmeng.cn@gmail.com \
    --cc=kbastian@mail.uni-paderborn.de \
    --cc=palmerdabbelt@google.com \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=sagark@eecs.berkeley.edu \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.