From: Kefeng Wang <wangkefeng.wang@huawei.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>, <tglx@linutronix.de>
Cc: Paul Walmsley <paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<hulkci@huawei.com>
Subject: Re: [PATCH 09/10] timer-riscv: Fix undefined riscv_time_val
Date: Mon, 18 May 2020 23:40:52 +0800 [thread overview]
Message-ID: <0bc3eb36-7b9d-7c86-130c-68b566e85c10@huawei.com> (raw)
In-Reply-To: <66121f9a-48f3-d3a5-7c96-d71397e12aed@linaro.org>
On 2020/5/18 22:09, Daniel Lezcano wrote:
> On 13/05/2020 23:14, Palmer Dabbelt wrote:
>> On Sun, 10 May 2020 19:20:00 PDT (-0700), wangkefeng.wang@huawei.com wrote:
>>> ERROR: modpost: "riscv_time_val" [crypto/tcrypt.ko] undefined!
>>>
>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
>>> ---
>>> drivers/clocksource/timer-riscv.c | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/clocksource/timer-riscv.c
>>> b/drivers/clocksource/timer-riscv.c
>>> index c4f15c4068c0..071b8c144027 100644
>>> --- a/drivers/clocksource/timer-riscv.c
>>> +++ b/drivers/clocksource/timer-riscv.c
>>> @@ -19,6 +19,7 @@
>>>
>>> u64 __iomem *riscv_time_cmp;
>>> u64 __iomem *riscv_time_val;
>>> +EXPORT_SYMBOL(riscv_time_val);
>>>
>>> static inline void mmio_set_timer(u64 val)
>>> {
>> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
>> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
>>
>> Adding the clocksource maintainers. Let me know if you want this
>> through my
>> tree, I'm assuming you want it through your tree.
> How can we end up by an export symbol here ?!
Hi Danile,
Found this build error when CONFIG_RISCV_M_MODE=y and CONFIG_RISCV_SBI
is not,
see patch "4f9bbcefa142 riscv: add support for MMIO access to the timer
registers"
thanks.
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Kefeng Wang <wangkefeng.wang@huawei.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>, <tglx@linutronix.de>
Cc: hulkci@huawei.com, linux-riscv@lists.infradead.org,
aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>
Subject: Re: [PATCH 09/10] timer-riscv: Fix undefined riscv_time_val
Date: Mon, 18 May 2020 23:40:52 +0800 [thread overview]
Message-ID: <0bc3eb36-7b9d-7c86-130c-68b566e85c10@huawei.com> (raw)
In-Reply-To: <66121f9a-48f3-d3a5-7c96-d71397e12aed@linaro.org>
On 2020/5/18 22:09, Daniel Lezcano wrote:
> On 13/05/2020 23:14, Palmer Dabbelt wrote:
>> On Sun, 10 May 2020 19:20:00 PDT (-0700), wangkefeng.wang@huawei.com wrote:
>>> ERROR: modpost: "riscv_time_val" [crypto/tcrypt.ko] undefined!
>>>
>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
>>> ---
>>> drivers/clocksource/timer-riscv.c | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/clocksource/timer-riscv.c
>>> b/drivers/clocksource/timer-riscv.c
>>> index c4f15c4068c0..071b8c144027 100644
>>> --- a/drivers/clocksource/timer-riscv.c
>>> +++ b/drivers/clocksource/timer-riscv.c
>>> @@ -19,6 +19,7 @@
>>>
>>> u64 __iomem *riscv_time_cmp;
>>> u64 __iomem *riscv_time_val;
>>> +EXPORT_SYMBOL(riscv_time_val);
>>>
>>> static inline void mmio_set_timer(u64 val)
>>> {
>> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
>> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
>>
>> Adding the clocksource maintainers. Let me know if you want this
>> through my
>> tree, I'm assuming you want it through your tree.
> How can we end up by an export symbol here ?!
Hi Danile,
Found this build error when CONFIG_RISCV_M_MODE=y and CONFIG_RISCV_SBI
is not,
see patch "4f9bbcefa142 riscv: add support for MMIO access to the timer
registers"
thanks.
>
>
next prev parent reply other threads:[~2020-05-18 15:41 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 2:19 [PATCH 00/10] riscv: make riscv build happier Kefeng Wang
2020-05-11 2:19 ` [PATCH 01/10] riscv: Fix unmet direct dependencies built based on SOC_VIRT Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-11 2:19 ` [PATCH 02/10] riscv: stacktrace: Fix undefined reference to `walk_stackframe' Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-11 2:19 ` [PATCH 03/10] riscv: Add pgprot_writecombine/device and PAGE_SHARED defination if NOMMU Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-11 2:19 ` [PATCH 04/10] riscv: Fix print_vm_layout build error " Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-14 10:10 ` Alex Ghiti
2020-05-14 11:42 ` Kefeng Wang
2020-05-14 11:53 ` [PATCH v2] " Kefeng Wang
2020-05-14 11:53 ` Kefeng Wang
2020-05-20 22:49 ` Palmer Dabbelt
2020-05-20 22:49 ` Palmer Dabbelt
2020-05-11 2:19 ` [PATCH 05/10] riscv: Disable ARCH_HAS_DEBUG_WX " Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-14 8:26 ` Kefeng Wang
2020-05-14 8:26 ` Kefeng Wang
2020-05-11 2:19 ` [PATCH 06/10] riscv: Disable ARCH_HAS_DEBUG_VIRTUAL " Kefeng Wang
2020-05-11 2:19 ` [PATCH 07/10] riscv: Make SYS_SUPPORTS_HUGETLBFS depends on MMU Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-11 2:19 ` [PATCH 08/10] riscv: pgtable: Fix __kernel_map_pages build error if NOMMU Kefeng Wang
2020-05-11 2:19 ` Kefeng Wang
2020-05-11 2:20 ` [PATCH 09/10] timer-riscv: Fix undefined riscv_time_val Kefeng Wang
2020-05-11 2:20 ` Kefeng Wang
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-13 21:14 ` Palmer Dabbelt
2020-05-18 14:09 ` Daniel Lezcano
2020-05-18 14:09 ` Daniel Lezcano
2020-05-18 15:40 ` Kefeng Wang [this message]
2020-05-18 15:40 ` Kefeng Wang
2020-05-18 20:23 ` Daniel Lezcano
2020-05-18 20:23 ` Daniel Lezcano
2020-05-19 12:39 ` Kefeng Wang
2020-05-19 12:39 ` Kefeng Wang
2020-05-19 13:51 ` Daniel Lezcano
2020-05-19 13:51 ` Daniel Lezcano
2020-05-20 1:14 ` Anup Patel
2020-05-20 1:14 ` Anup Patel
2020-05-20 2:57 ` Kefeng Wang
2020-05-20 2:57 ` Kefeng Wang
2020-05-11 2:20 ` [PATCH 10/10] riscv: mmiowb: Fix implicit declaration of function 'smp_processor_id' Kefeng Wang
2020-05-11 2:20 ` Kefeng Wang
2020-05-13 21:14 ` [PATCH 00/10] riscv: make riscv build happier Palmer Dabbelt
2020-05-13 21:14 ` Palmer Dabbelt
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