Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Maxim Kiselev]

Hi Xi, Drew

I have the same problem with SD on my LicheePi 4A.

After some investigations I found how to fix this tuning error.
Here is the patch that increases tuning loop count from
40(MAX_TUNING_LOOP at sdhci.c) to 128.

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 8d6cfb648096..da8f5820fb69 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
*host, u32 opcode)

        /* perform tuning */
        sdhci_start_tuning(host);
+       host->tuning_loop_count = 128:
        host->tuning_err = __sdhci_execute_tuning(host, opcode);
        if (host->tuning_err) {
                /* disable auto-tuning upon tuning error */

After that change tuning works fine. The same value of loop count is
used in RevyOS BSP
https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185

Honestly, it looks a little bit strange for me.

It seems that the tuning algorithm requires to move through
all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).

Xi, could you also test my fix on your board?

Best regards,
Maksim

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Maxim Kiselev]

Hi Xi, Drew

I have the same problem with SD on my LicheePi 4A.

After some investigations I found how to fix this tuning error.
Here is the patch that increases tuning loop count from
40(MAX_TUNING_LOOP at sdhci.c) to 128.

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 8d6cfb648096..da8f5820fb69 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
*host, u32 opcode)

        /* perform tuning */
        sdhci_start_tuning(host);
+       host->tuning_loop_count = 128:
        host->tuning_err = __sdhci_execute_tuning(host, opcode);
        if (host->tuning_err) {
                /* disable auto-tuning upon tuning error */

After that change tuning works fine. The same value of loop count is
used in RevyOS BSP
https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185

Honestly, it looks a little bit strange for me.

It seems that the tuning algorithm requires to move through
all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).

Xi, could you also test my fix on your board?

Best regards,
Maksim

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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Wed, 2024-03-20 at 15:28 +0300, Maxim Kiselev wrote:
> Hi Xi, Drew
> 
> I have the same problem with SD on my LicheePi 4A.
> 
> After some investigations I found how to fix this tuning error.
> Here is the patch that increases tuning loop count from
> 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 8d6cfb648096..da8f5820fb69 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
> *host, u32 opcode)
> 
>         /* perform tuning */
>         sdhci_start_tuning(host);
> +       host->tuning_loop_count = 128:
>         host->tuning_err = __sdhci_execute_tuning(host, opcode);
>         if (host->tuning_err) {
>                 /* disable auto-tuning upon tuning error */
> 
> After that change tuning works fine. The same value of loop count is
> used in RevyOS BSP
> https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> 
> Honestly, it looks a little bit strange for me.
> 
> It seems that the tuning algorithm requires to move through
> all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).
> 
> Xi, could you also test my fix on your board?

I'll try it this weekend.  Now having some work with "real time
priority" to do :(.

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Wed, 2024-03-20 at 15:28 +0300, Maxim Kiselev wrote:
> Hi Xi, Drew
> 
> I have the same problem with SD on my LicheePi 4A.
> 
> After some investigations I found how to fix this tuning error.
> Here is the patch that increases tuning loop count from
> 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 8d6cfb648096..da8f5820fb69 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
> *host, u32 opcode)
> 
>         /* perform tuning */
>         sdhci_start_tuning(host);
> +       host->tuning_loop_count = 128:
>         host->tuning_err = __sdhci_execute_tuning(host, opcode);
>         if (host->tuning_err) {
>                 /* disable auto-tuning upon tuning error */
> 
> After that change tuning works fine. The same value of loop count is
> used in RevyOS BSP
> https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> 
> Honestly, it looks a little bit strange for me.
> 
> It seems that the tuning algorithm requires to move through
> all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).
> 
> Xi, could you also test my fix on your board?

I'll try it this weekend.  Now having some work with "real time
priority" to do :(.

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

On Wed, Mar 20, 2024 at 03:28:19PM +0300, Maxim Kiselev wrote:
> Hi Xi, Drew
> 
> I have the same problem with SD on my LicheePi 4A.
> 
> After some investigations I found how to fix this tuning error.
> Here is the patch that increases tuning loop count from
> 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 8d6cfb648096..da8f5820fb69 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
> *host, u32 opcode)
> 
>         /* perform tuning */
>         sdhci_start_tuning(host);
> +       host->tuning_loop_count = 128:
>         host->tuning_err = __sdhci_execute_tuning(host, opcode);
>         if (host->tuning_err) {
>                 /* disable auto-tuning upon tuning error */
> 
> After that change tuning works fine. The same value of loop count is
> used in RevyOS BSP
> https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> 
> Honestly, it looks a little bit strange for me.
> 
> It seems that the tuning algorithm requires to move through
> all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).
> 
> Xi, could you also test my fix on your board?

Thanks for figuring this out!

When I was upstreaming support, I noticed __sdhci_execute_tuning() in
T-Head's version of sdhci-of-dwcmshc.c seemed to duplicate what already
existed in drivers/mmc/host/sdhci.c. I had thought T-Head copied it
because it was a static function.

9cc811a342be ("mmc: sdhci: add __sdhci_execute_tuning() to header")
allowed me to remove __sdhci_execute_tuning() from sdhci-of-dwcmshc.
However, I overlooked this resulted in changing the tuning loop from
128 back to the upstream default of 40.

Before this change, the microSD did work for me on the lpi4 but I would
see the following:

[    4.182483] mmc1: Tuning failed, falling back to fixed sampling clock
[    4.189022] sdhci-dwcmshc ffe7090000.mmc: tuning failed: -11
[    4.194734] mmc1: tuning execution failed: -5
[    4.287899] mmc1: new high speed SDHC card at address aaaa
[    4.299763] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
[    4.316963]  mmcblk1: p1 p2

root@lpi4amain:~# cat /sys/kernel/debug/mmc1/ios
clock:		50000000 Hz
actual clock:	49500000 Hz
vdd:		21 (3.3 ~ 3.4 V)
bus mode:	2 (push-pull)
chip select:	0 (don't care)
power mode:	2 (on)
bus width:	2 (4 bits)
timing spec:	2 (sd high-speed)
signal voltage:	0 (3.30 V)
driver type:	0 (driver type B)

With the change to 128, I no longer see the tuning failure and the
microSD continues to work okay:

[    4.307040] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[    4.320462] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
[    4.338646]  mmcblk1: p1 p2

root@lpi4amain:/sys/kernel/debug/mmc1# cat ios
clock:		198000000 Hz
actual clock:	198000000 Hz
vdd:		21 (3.3 ~ 3.4 V)
bus mode:	2 (push-pull)
chip select:	0 (don't care)
power mode:	2 (on)
bus width:	2 (4 bits)
timing spec:	6 (sd uhs SDR104)
signal voltage:	1 (1.80 V)
driver type:	0 (driver type B)

This has the benefit of the card now works at 198 MHz in SDR104 mode
instead of 50 MHz when tuning failed.

Tested-by: Drew Fustini <drew@pdp7.com>

thanks,
drew

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

On Wed, Mar 20, 2024 at 03:28:19PM +0300, Maxim Kiselev wrote:
> Hi Xi, Drew
> 
> I have the same problem with SD on my LicheePi 4A.
> 
> After some investigations I found how to fix this tuning error.
> Here is the patch that increases tuning loop count from
> 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 8d6cfb648096..da8f5820fb69 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct sdhci_host
> *host, u32 opcode)
> 
>         /* perform tuning */
>         sdhci_start_tuning(host);
> +       host->tuning_loop_count = 128:
>         host->tuning_err = __sdhci_execute_tuning(host, opcode);
>         if (host->tuning_err) {
>                 /* disable auto-tuning upon tuning error */
> 
> After that change tuning works fine. The same value of loop count is
> used in RevyOS BSP
> https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> 
> Honestly, it looks a little bit strange for me.
> 
> It seems that the tuning algorithm requires to move through
> all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540) register).
> 
> Xi, could you also test my fix on your board?

Thanks for figuring this out!

When I was upstreaming support, I noticed __sdhci_execute_tuning() in
T-Head's version of sdhci-of-dwcmshc.c seemed to duplicate what already
existed in drivers/mmc/host/sdhci.c. I had thought T-Head copied it
because it was a static function.

9cc811a342be ("mmc: sdhci: add __sdhci_execute_tuning() to header")
allowed me to remove __sdhci_execute_tuning() from sdhci-of-dwcmshc.
However, I overlooked this resulted in changing the tuning loop from
128 back to the upstream default of 40.

Before this change, the microSD did work for me on the lpi4 but I would
see the following:

[    4.182483] mmc1: Tuning failed, falling back to fixed sampling clock
[    4.189022] sdhci-dwcmshc ffe7090000.mmc: tuning failed: -11
[    4.194734] mmc1: tuning execution failed: -5
[    4.287899] mmc1: new high speed SDHC card at address aaaa
[    4.299763] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
[    4.316963]  mmcblk1: p1 p2

root@lpi4amain:~# cat /sys/kernel/debug/mmc1/ios
clock:		50000000 Hz
actual clock:	49500000 Hz
vdd:		21 (3.3 ~ 3.4 V)
bus mode:	2 (push-pull)
chip select:	0 (don't care)
power mode:	2 (on)
bus width:	2 (4 bits)
timing spec:	2 (sd high-speed)
signal voltage:	0 (3.30 V)
driver type:	0 (driver type B)

With the change to 128, I no longer see the tuning failure and the
microSD continues to work okay:

[    4.307040] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[    4.320462] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
[    4.338646]  mmcblk1: p1 p2

root@lpi4amain:/sys/kernel/debug/mmc1# cat ios
clock:		198000000 Hz
actual clock:	198000000 Hz
vdd:		21 (3.3 ~ 3.4 V)
bus mode:	2 (push-pull)
chip select:	0 (don't care)
power mode:	2 (on)
bus width:	2 (4 bits)
timing spec:	6 (sd uhs SDR104)
signal voltage:	1 (1.80 V)
driver type:	0 (driver type B)

This has the benefit of the card now works at 198 MHz in SDR104 mode
instead of 50 MHz when tuning failed.

Tested-by: Drew Fustini <drew@pdp7.com>

thanks,
drew

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linux-riscv mailing list
linux-riscv@lists.infradead.org
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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Sat, 2024-03-23 at 18:25 -0700, Drew Fustini wrote:
> On Wed, Mar 20, 2024 at 03:28:19PM +0300, Maxim Kiselev wrote:
> > Hi Xi, Drew
> > 
> > I have the same problem with SD on my LicheePi 4A.
> > 
> > After some investigations I found how to fix this tuning error.
> > Here is the patch that increases tuning loop count from
> > 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> > 
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 8d6cfb648096..da8f5820fb69 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct
> > sdhci_host
> > *host, u32 opcode)
> > 
> >         /* perform tuning */
> >         sdhci_start_tuning(host);
> > +       host->tuning_loop_count = 128:
> >         host->tuning_err = __sdhci_execute_tuning(host, opcode);
> >         if (host->tuning_err) {
> >                 /* disable auto-tuning upon tuning error */
> > 
> > After that change tuning works fine. The same value of loop count is
> > used in RevyOS BSP
> > https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> > 
> > Honestly, it looks a little bit strange for me.
> > 
> > It seems that the tuning algorithm requires to move through
> > all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> > instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540)
> > register).
> > 
> > Xi, could you also test my fix on your board?

It works for me as well.  I'm now getting:

[    0.854357] mmc1: new ultra high speed SDR104 SDXC card at address aaaa
[    0.862267] mmcblk1: mmc1:aaaa SR256 238 GiB
[    0.876623]  mmcblk1: p1

Tested-by: Xi Ruoyao <xry111@xry111.site>

Thanks a lot!

> Thanks for figuring this out!
> 
> When I was upstreaming support, I noticed __sdhci_execute_tuning() in
> T-Head's version of sdhci-of-dwcmshc.c seemed to duplicate what already
> existed in drivers/mmc/host/sdhci.c. I had thought T-Head copied it
> because it was a static function.
> 
> 9cc811a342be ("mmc: sdhci: add __sdhci_execute_tuning() to header")
> allowed me to remove __sdhci_execute_tuning() from sdhci-of-dwcmshc.
> However, I overlooked this resulted in changing the tuning loop from
> 128 back to the upstream default of 40.
> 
> Before this change, the microSD did work for me on the lpi4 but I would
> see the following:
> 
> [    4.182483] mmc1: Tuning failed, falling back to fixed sampling
> clock
> [    4.189022] sdhci-dwcmshc ffe7090000.mmc: tuning failed: -11
> [    4.194734] mmc1: tuning execution failed: -5
> [    4.287899] mmc1: new high speed SDHC card at address aaaa
> [    4.299763] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
> [    4.316963]  mmcblk1: p1 p2
> 
> root@lpi4amain:~# cat /sys/kernel/debug/mmc1/ios
> clock:		50000000 Hz
> actual clock:	49500000 Hz
> vdd:		21 (3.3 ~ 3.4 V)
> bus mode:	2 (push-pull)
> chip select:	0 (don't care)
> power mode:	2 (on)
> bus width:	2 (4 bits)
> timing spec:	2 (sd high-speed)
> signal voltage:	0 (3.30 V)
> driver type:	0 (driver type B)
> 
> With the change to 128, I no longer see the tuning failure and the
> microSD continues to work okay:
> 
> [    4.307040] mmc1: new ultra high speed SDR104 SDHC card at address
> aaaa
> [    4.320462] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
> [    4.338646]  mmcblk1: p1 p2
> 
> root@lpi4amain:/sys/kernel/debug/mmc1# cat ios
> clock:		198000000 Hz
> actual clock:	198000000 Hz
> vdd:		21 (3.3 ~ 3.4 V)
> bus mode:	2 (push-pull)
> chip select:	0 (don't care)
> power mode:	2 (on)
> bus width:	2 (4 bits)
> timing spec:	6 (sd uhs SDR104)
> signal voltage:	1 (1.80 V)
> driver type:	0 (driver type B)
> 
> This has the benefit of the card now works at 198 MHz in SDR104 mode
> instead of 50 MHz when tuning failed.
> 
> Tested-by: Drew Fustini <drew@pdp7.com>

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Sat, 2024-03-23 at 18:25 -0700, Drew Fustini wrote:
> On Wed, Mar 20, 2024 at 03:28:19PM +0300, Maxim Kiselev wrote:
> > Hi Xi, Drew
> > 
> > I have the same problem with SD on my LicheePi 4A.
> > 
> > After some investigations I found how to fix this tuning error.
> > Here is the patch that increases tuning loop count from
> > 40(MAX_TUNING_LOOP at sdhci.c) to 128.
> > 
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 8d6cfb648096..da8f5820fb69 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -706,6 +706,7 @@ static int th1520_execute_tuning(struct
> > sdhci_host
> > *host, u32 opcode)
> > 
> >         /* perform tuning */
> >         sdhci_start_tuning(host);
> > +       host->tuning_loop_count = 128:
> >         host->tuning_err = __sdhci_execute_tuning(host, opcode);
> >         if (host->tuning_err) {
> >                 /* disable auto-tuning upon tuning error */
> > 
> > After that change tuning works fine. The same value of loop count is
> > used in RevyOS BSP
> > https://github.com/revyos/thead-kernel/blob/c6d4e5df18a17903d012ffd89e67d0ee5ce6cf2d/drivers/mmc/host/sdhci-of-dwcmshc.c#L185
> > 
> > Honestly, it looks a little bit strange for me.
> > 
> > It seems that the tuning algorithm requires to move through
> > all the taps of delay line(128 taps?) even if we use THRESHOLD_MODE
> > instend LARGEST_WIN_MODE (I mean bit 2 in AT_CTRL_R(0x540)
> > register).
> > 
> > Xi, could you also test my fix on your board?

It works for me as well.  I'm now getting:

[    0.854357] mmc1: new ultra high speed SDR104 SDXC card at address aaaa
[    0.862267] mmcblk1: mmc1:aaaa SR256 238 GiB
[    0.876623]  mmcblk1: p1

Tested-by: Xi Ruoyao <xry111@xry111.site>

Thanks a lot!

> Thanks for figuring this out!
> 
> When I was upstreaming support, I noticed __sdhci_execute_tuning() in
> T-Head's version of sdhci-of-dwcmshc.c seemed to duplicate what already
> existed in drivers/mmc/host/sdhci.c. I had thought T-Head copied it
> because it was a static function.
> 
> 9cc811a342be ("mmc: sdhci: add __sdhci_execute_tuning() to header")
> allowed me to remove __sdhci_execute_tuning() from sdhci-of-dwcmshc.
> However, I overlooked this resulted in changing the tuning loop from
> 128 back to the upstream default of 40.
> 
> Before this change, the microSD did work for me on the lpi4 but I would
> see the following:
> 
> [    4.182483] mmc1: Tuning failed, falling back to fixed sampling
> clock
> [    4.189022] sdhci-dwcmshc ffe7090000.mmc: tuning failed: -11
> [    4.194734] mmc1: tuning execution failed: -5
> [    4.287899] mmc1: new high speed SDHC card at address aaaa
> [    4.299763] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
> [    4.316963]  mmcblk1: p1 p2
> 
> root@lpi4amain:~# cat /sys/kernel/debug/mmc1/ios
> clock:		50000000 Hz
> actual clock:	49500000 Hz
> vdd:		21 (3.3 ~ 3.4 V)
> bus mode:	2 (push-pull)
> chip select:	0 (don't care)
> power mode:	2 (on)
> bus width:	2 (4 bits)
> timing spec:	2 (sd high-speed)
> signal voltage:	0 (3.30 V)
> driver type:	0 (driver type B)
> 
> With the change to 128, I no longer see the tuning failure and the
> microSD continues to work okay:
> 
> [    4.307040] mmc1: new ultra high speed SDR104 SDHC card at address
> aaaa
> [    4.320462] mmcblk1: mmc1:aaaa SD32G 29.7 GiB
> [    4.338646]  mmcblk1: p1 p2
> 
> root@lpi4amain:/sys/kernel/debug/mmc1# cat ios
> clock:		198000000 Hz
> actual clock:	198000000 Hz
> vdd:		21 (3.3 ~ 3.4 V)
> bus mode:	2 (push-pull)
> chip select:	0 (don't care)
> power mode:	2 (on)
> bus width:	2 (4 bits)
> timing spec:	6 (sd uhs SDR104)
> signal voltage:	1 (1.80 V)
> driver type:	0 (driver type B)
> 
> This has the benefit of the card now works at 198 MHz in SDR104 mode
> instead of 50 MHz when tuning failed.
> 
> Tested-by: Drew Fustini <drew@pdp7.com>

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Sat, 2024-03-02 at 08:25 -0800, Drew Fustini wrote:
> On Sat, Mar 02, 2024 at 10:13:55PM +0800, Xi Ruoyao wrote:
> > On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> > > Add emmc node properties for the eMMC device and add sdio0 node
> > > properties for the microSD slot. Set the frequency for the sdhci
> > > reference clock.
> > 
> > Hi Drew,
> > 
> > I've been using the emmc on LicheePi 4A for a while without any problem,
> > but when I try the microSD slot I get:
> > 
> > [    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
> > [    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
> > [    0.855139] mmc1: tuning execution failed: -5
> > [    0.859609] mmc1: error -5 whilst initialising SD card
> > [   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
> > [   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
> > [   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
> > [   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
> > [   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
> > [   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
> > [   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
> > [   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
> > [   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
> > [   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
> > [   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
> > [   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
> > [   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
> > [   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
> > [   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
> > [   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
> > [   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
> > [   11.467416] mmc1: sdhci: ============================================
> > [   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
> > [   11.576053] mmc1: tuning execution failed: -5
> > [   11.646438] mmc1: new high speed SDXC card at address aaaa
> > [   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB
> > 
> > I can write something into the SD card and read it back though.  But
> > this makes me reluctant to use the SD card for "some real thing" afraid
> > of a data loss.
> > 
> > The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").
> > 
> > Any idea how to debug this issue further?  (Maybe I should try change
> > the SD card first but I'd like to discuss the issue before paying money
> > for another card.)
> 
> Revy informed me that downclocking from 198 MHz to 100 MHz [1] has been
> observed to solve this problem. Could you try the following dts patch?

I'm still getting the same error.

> Also, I have noticed the T-Head's 5.10 vendor kernel does have some
> updates in sdhci-of-dwcmshc.c related to tuning. I'll look at porting
> those to the upstream driving.

Maybe to solve the problem we need both the downclocking and these
changes then...

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Sat, 2024-03-02 at 08:25 -0800, Drew Fustini wrote:
> On Sat, Mar 02, 2024 at 10:13:55PM +0800, Xi Ruoyao wrote:
> > On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> > > Add emmc node properties for the eMMC device and add sdio0 node
> > > properties for the microSD slot. Set the frequency for the sdhci
> > > reference clock.
> > 
> > Hi Drew,
> > 
> > I've been using the emmc on LicheePi 4A for a while without any problem,
> > but when I try the microSD slot I get:
> > 
> > [    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
> > [    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
> > [    0.855139] mmc1: tuning execution failed: -5
> > [    0.859609] mmc1: error -5 whilst initialising SD card
> > [   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
> > [   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
> > [   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
> > [   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
> > [   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
> > [   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
> > [   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
> > [   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
> > [   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
> > [   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
> > [   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
> > [   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
> > [   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
> > [   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
> > [   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
> > [   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
> > [   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
> > [   11.467416] mmc1: sdhci: ============================================
> > [   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
> > [   11.576053] mmc1: tuning execution failed: -5
> > [   11.646438] mmc1: new high speed SDXC card at address aaaa
> > [   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB
> > 
> > I can write something into the SD card and read it back though.  But
> > this makes me reluctant to use the SD card for "some real thing" afraid
> > of a data loss.
> > 
> > The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").
> > 
> > Any idea how to debug this issue further?  (Maybe I should try change
> > the SD card first but I'd like to discuss the issue before paying money
> > for another card.)
> 
> Revy informed me that downclocking from 198 MHz to 100 MHz [1] has been
> observed to solve this problem. Could you try the following dts patch?

I'm still getting the same error.

> Also, I have noticed the T-Head's 5.10 vendor kernel does have some
> updates in sdhci-of-dwcmshc.c related to tuning. I'll look at porting
> those to the upstream driving.

Maybe to solve the problem we need both the downclocking and these
changes then...

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

On Sat, Mar 02, 2024 at 10:13:55PM +0800, Xi Ruoyao wrote:
> On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> > Add emmc node properties for the eMMC device and add sdio0 node
> > properties for the microSD slot. Set the frequency for the sdhci
> > reference clock.
> 
> Hi Drew,
> 
> I've been using the emmc on LicheePi 4A for a while without any problem,
> but when I try the microSD slot I get:
> 
> [    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
> [    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
> [    0.855139] mmc1: tuning execution failed: -5
> [    0.859609] mmc1: error -5 whilst initialising SD card
> [   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
> [   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
> [   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
> [   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
> [   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
> [   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
> [   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
> [   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
> [   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
> [   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
> [   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
> [   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
> [   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
> [   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
> [   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
> [   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
> [   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
> [   11.467416] mmc1: sdhci: ============================================
> [   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
> [   11.576053] mmc1: tuning execution failed: -5
> [   11.646438] mmc1: new high speed SDXC card at address aaaa
> [   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB
> 
> I can write something into the SD card and read it back though.  But
> this makes me reluctant to use the SD card for "some real thing" afraid
> of a data loss.
> 
> The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").
> 
> Any idea how to debug this issue further?  (Maybe I should try change
> the SD card first but I'd like to discuss the issue before paying money
> for another card.)

Revy informed me that downclocking from 198 MHz to 100 MHz [1] has been
observed to solve this problem. Could you try the following dts patch?

Also, I have noticed the T-Head's 5.10 vendor kernel does have some
updates in sdhci-of-dwcmshc.c related to tuning. I'll look at porting
those to the upstream driving.

Thanks,
Drew

[1] https://github.com/revyos/thead-kernel/pull/62
[2] https://github.com/revyos/thead-kernel/commit/afef388b8e26f0d77f9d2261b6e57991941a213f#diff-ba729b399f3cb86d6a2503890c3626a6426c1572a54f24cd7ab3337f5fc75674

------ [cut here] --------
From db4d406fc15c76317993a39a72061d3df47e86f0 Mon Sep 17 00:00:00 2001
From: Drew Fustini <dfustini@tenstorrent.com>
Date: Sat, 2 Mar 2024 08:21:50 -0800
Subject: [PATCH] riscv: dts: thead: downgrade microSD to 100 MHz max

Downgrade max freq for microSD controller from 198 MHz to 100 MHz to
avoid timeout errors.

Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
---
 arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index 1365d3a512a3..d6ae671f94a9 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -53,6 +53,6 @@ &emmc {

 &sdio0 {
        bus-width = <4>;
-       max-frequency = <198000000>;
+       max-frequency = <100000000>;
        status = "okay";
 };
--
2.34.1

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

On Sat, Mar 02, 2024 at 10:13:55PM +0800, Xi Ruoyao wrote:
> On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> > Add emmc node properties for the eMMC device and add sdio0 node
> > properties for the microSD slot. Set the frequency for the sdhci
> > reference clock.
> 
> Hi Drew,
> 
> I've been using the emmc on LicheePi 4A for a while without any problem,
> but when I try the microSD slot I get:
> 
> [    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
> [    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
> [    0.855139] mmc1: tuning execution failed: -5
> [    0.859609] mmc1: error -5 whilst initialising SD card
> [   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
> [   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
> [   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
> [   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
> [   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
> [   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
> [   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
> [   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
> [   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
> [   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
> [   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
> [   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
> [   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
> [   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
> [   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
> [   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
> [   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
> [   11.467416] mmc1: sdhci: ============================================
> [   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
> [   11.576053] mmc1: tuning execution failed: -5
> [   11.646438] mmc1: new high speed SDXC card at address aaaa
> [   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB
> 
> I can write something into the SD card and read it back though.  But
> this makes me reluctant to use the SD card for "some real thing" afraid
> of a data loss.
> 
> The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").
> 
> Any idea how to debug this issue further?  (Maybe I should try change
> the SD card first but I'd like to discuss the issue before paying money
> for another card.)

Revy informed me that downclocking from 198 MHz to 100 MHz [1] has been
observed to solve this problem. Could you try the following dts patch?

Also, I have noticed the T-Head's 5.10 vendor kernel does have some
updates in sdhci-of-dwcmshc.c related to tuning. I'll look at porting
those to the upstream driving.

Thanks,
Drew

[1] https://github.com/revyos/thead-kernel/pull/62
[2] https://github.com/revyos/thead-kernel/commit/afef388b8e26f0d77f9d2261b6e57991941a213f#diff-ba729b399f3cb86d6a2503890c3626a6426c1572a54f24cd7ab3337f5fc75674

------ [cut here] --------
From db4d406fc15c76317993a39a72061d3df47e86f0 Mon Sep 17 00:00:00 2001
From: Drew Fustini <dfustini@tenstorrent.com>
Date: Sat, 2 Mar 2024 08:21:50 -0800
Subject: [PATCH] riscv: dts: thead: downgrade microSD to 100 MHz max

Downgrade max freq for microSD controller from 198 MHz to 100 MHz to
avoid timeout errors.

Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
---
 arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index 1365d3a512a3..d6ae671f94a9 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -53,6 +53,6 @@ &emmc {

 &sdio0 {
        bus-width = <4>;
-       max-frequency = <198000000>;
+       max-frequency = <100000000>;
        status = "okay";
 };
--
2.34.1

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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> Add emmc node properties for the eMMC device and add sdio0 node
> properties for the microSD slot. Set the frequency for the sdhci
> reference clock.

Hi Drew,

I've been using the emmc on LicheePi 4A for a while without any problem,
but when I try the microSD slot I get:

[    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
[    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
[    0.855139] mmc1: tuning execution failed: -5
[    0.859609] mmc1: error -5 whilst initialising SD card
[   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
[   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
[   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
[   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
[   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
[   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
[   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
[   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
[   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
[   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
[   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
[   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
[   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
[   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
[   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
[   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
[   11.467416] mmc1: sdhci: ============================================
[   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
[   11.576053] mmc1: tuning execution failed: -5
[   11.646438] mmc1: new high speed SDXC card at address aaaa
[   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB

I can write something into the SD card and read it back though.  But
this makes me reluctant to use the SD card for "some real thing" afraid
of a data loss.

The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").

Any idea how to debug this issue further?  (Maybe I should try change
the SD card first but I'd like to discuss the issue before paying money
for another card.)

> Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> ---
>  .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> index a802ab110429..1365d3a512a3 100644
> --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> @@ -29,6 +29,10 @@ &apb_clk {
>  	clock-frequency = <62500000>;
>  };
>  
> +&sdhci_clk {
> +	clock-frequency = <198000000>;
> +};
> +
>  &uart_sclk {
>  	clock-frequency = <100000000>;
>  };
> @@ -36,3 +40,19 @@ &uart_sclk {
>  &dmac0 {
>  	status = "okay";
>  };
> +
> +&emmc {
> +	bus-width = <8>;
> +	max-frequency = <198000000>;
> +	mmc-hs400-1_8v;
> +	non-removable;
> +	no-sdio;
> +	no-sd;
> +	status = "okay";
> +};
> +
> +&sdio0 {
> +	bus-width = <4>;
> +	max-frequency = <198000000>;
> +	status = "okay";
> +};

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Xi Ruoyao]

On Wed, 2023-12-06 at 00:09 -0800, Drew Fustini wrote:
> Add emmc node properties for the eMMC device and add sdio0 node
> properties for the microSD slot. Set the frequency for the sdhci
> reference clock.

Hi Drew,

I've been using the emmc on LicheePi 4A for a while without any problem,
but when I try the microSD slot I get:

[    0.531804] mmc1: SDHCI controller on ffe7090000.mmc [ffe7090000.mmc] using ADMA 64-bit
[    0.842674] mmc1: Tuning failed, falling back to fixed sampling clock
[    0.855139] mmc1: tuning execution failed: -5
[    0.859609] mmc1: error -5 whilst initialising SD card
[   11.359879] mmc1: Timeout waiting for hardware cmd interrupt.
[   11.365661] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
[   11.372105] mmc1: sdhci: Sys addr:  0x00000001 | Version:  0x00000005
[   11.378547] mmc1: sdhci: Blk size:  0x00007040 | Blk cnt:  0x00000000
[   11.384989] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000010
[   11.391432] mmc1: sdhci: Present:   0x03ff0000 | Host ctl: 0x00000017
[   11.397873] mmc1: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
[   11.404312] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000000f
[   11.410753] mmc1: sdhci: Timeout:   0x00000004 | Int stat: 0x00000000
[   11.417192] mmc1: sdhci: Int enab:  0x00000020 | Sig enab: 0x00000020
[   11.423633] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[   11.430073] mmc1: sdhci: Caps:      0x3f69c881 | Caps_1:   0x08008177
[   11.436513] mmc1: sdhci: Cmd:       0x00000102 | Max curr: 0x00191919
[   11.442954] mmc1: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x07725f7f
[   11.449394] mmc1: sdhci: Resp[2]:   0x32db7900 | Resp[3]:  0x00400e00
[   11.455835] mmc1: sdhci: Host ctl2: 0x0000300b
[   11.460280] mmc1: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x0000000000882220
[   11.467416] mmc1: sdhci: ============================================
[   11.563828] mmc1: Tuning failed, falling back to fixed sampling clock
[   11.576053] mmc1: tuning execution failed: -5
[   11.646438] mmc1: new high speed SDXC card at address aaaa
[   11.653170] mmcblk1: mmc1:aaaa SR256 238 GiB

I can write something into the SD card and read it back though.  But
this makes me reluctant to use the SD card for "some real thing" afraid
of a data loss.

The SD card is a SanDisk Extreme Pro 256GB (rated "U3, A2, V30").

Any idea how to debug this issue further?  (Maybe I should try change
the SD card first but I'd like to discuss the issue before paying money
for another card.)

> Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> ---
>  .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> index a802ab110429..1365d3a512a3 100644
> --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> @@ -29,6 +29,10 @@ &apb_clk {
>  	clock-frequency = <62500000>;
>  };
>  
> +&sdhci_clk {
> +	clock-frequency = <198000000>;
> +};
> +
>  &uart_sclk {
>  	clock-frequency = <100000000>;
>  };
> @@ -36,3 +40,19 @@ &uart_sclk {
>  &dmac0 {
>  	status = "okay";
>  };
> +
> +&emmc {
> +	bus-width = <8>;
> +	max-frequency = <198000000>;
> +	mmc-hs400-1_8v;
> +	non-removable;
> +	no-sdio;
> +	no-sd;
> +	status = "okay";
> +};
> +
> +&sdio0 {
> +	bus-width = <4>;
> +	max-frequency = <198000000>;
> +	status = "okay";
> +};

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

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Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Guo Ren]

On Wed, Dec 6, 2023 at 4:09 PM Drew Fustini <dfustini@baylibre.com> wrote:
>
> Add emmc node properties for the eMMC device and add sdio0 node
> properties for the microSD slot. Set the frequency for the sdhci
> reference clock.
>
> Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> ---
>  .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> index a802ab110429..1365d3a512a3 100644
> --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> @@ -29,6 +29,10 @@ &apb_clk {
>         clock-frequency = <62500000>;
>  };
>
> +&sdhci_clk {
> +       clock-frequency = <198000000>;
> +};
> +
>  &uart_sclk {
>         clock-frequency = <100000000>;
>  };
> @@ -36,3 +40,19 @@ &uart_sclk {
>  &dmac0 {
>         status = "okay";
>  };
> +
> +&emmc {
> +       bus-width = <8>;
> +       max-frequency = <198000000>;
> +       mmc-hs400-1_8v;
> +       non-removable;
> +       no-sdio;
> +       no-sd;
> +       status = "okay";
> +};
> +
> +&sdio0 {
> +       bus-width = <4>;
> +       max-frequency = <198000000>;
> +       status = "okay";
> +};
>
> --
> 2.34.1
>
Reviewed-by: Guo Ren <guoren@kernel.org>

-- 
Best Regards
 Guo Ren

Re: [PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Guo Ren]

On Wed, Dec 6, 2023 at 4:09 PM Drew Fustini <dfustini@baylibre.com> wrote:
>
> Add emmc node properties for the eMMC device and add sdio0 node
> properties for the microSD slot. Set the frequency for the sdhci
> reference clock.
>
> Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> ---
>  .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> index a802ab110429..1365d3a512a3 100644
> --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> @@ -29,6 +29,10 @@ &apb_clk {
>         clock-frequency = <62500000>;
>  };
>
> +&sdhci_clk {
> +       clock-frequency = <198000000>;
> +};
> +
>  &uart_sclk {
>         clock-frequency = <100000000>;
>  };
> @@ -36,3 +40,19 @@ &uart_sclk {
>  &dmac0 {
>         status = "okay";
>  };
> +
> +&emmc {
> +       bus-width = <8>;
> +       max-frequency = <198000000>;
> +       mmc-hs400-1_8v;
> +       non-removable;
> +       no-sdio;
> +       no-sd;
> +       status = "okay";
> +};
> +
> +&sdio0 {
> +       bus-width = <4>;
> +       max-frequency = <198000000>;
> +       status = "okay";
> +};
>
> --
> 2.34.1
>
Reviewed-by: Guo Ren <guoren@kernel.org>

-- 
Best Regards
 Guo Ren

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http://lists.infradead.org/mailman/listinfo/linux-riscv

[PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference clock.

Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index a802ab110429..1365d3a512a3 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -29,6 +29,10 @@ &apb_clk {
 	clock-frequency = <62500000>;
 };
 
+&sdhci_clk {
+	clock-frequency = <198000000>;
+};
+
 &uart_sclk {
 	clock-frequency = <100000000>;
 };
@@ -36,3 +40,19 @@ &uart_sclk {
 &dmac0 {
 	status = "okay";
 };
+
+&emmc {
+	bus-width = <8>;
+	max-frequency = <198000000>;
+	mmc-hs400-1_8v;
+	non-removable;
+	no-sdio;
+	no-sd;
+	status = "okay";
+};
+
+&sdio0 {
+	bus-width = <4>;
+	max-frequency = <198000000>;
+	status = "okay";
+};

-- 
2.34.1

[PATCH v8 4/4] riscv: dts: thead: Enable LicheePi 4A eMMC and microSD

[Drew Fustini]

Add emmc node properties for the eMMC device and add sdio0 node
properties for the microSD slot. Set the frequency for the sdhci
reference clock.

Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 .../boot/dts/thead/th1520-lichee-module-4a.dtsi      | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index a802ab110429..1365d3a512a3 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -29,6 +29,10 @@ &apb_clk {
 	clock-frequency = <62500000>;
 };
 
+&sdhci_clk {
+	clock-frequency = <198000000>;
+};
+
 &uart_sclk {
 	clock-frequency = <100000000>;
 };
@@ -36,3 +40,19 @@ &uart_sclk {
 &dmac0 {
 	status = "okay";
 };
+
+&emmc {
+	bus-width = <8>;
+	max-frequency = <198000000>;
+	mmc-hs400-1_8v;
+	non-removable;
+	no-sdio;
+	no-sd;
+	status = "okay";
+};
+
+&sdio0 {
+	bus-width = <4>;
+	max-frequency = <198000000>;
+	status = "okay";
+};

-- 
2.34.1


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