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* [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family
@ 2019-03-02  9:06 Heiner Kallweit
  2019-03-02 14:14 ` Andrew Lunn
  2019-03-04  5:16 ` David Miller
  0 siblings, 2 replies; 3+ messages in thread
From: Heiner Kallweit @ 2019-03-02  9:06 UTC (permalink / raw)
  To: Vivien Didelot, Andrew Lunn, Florian Fainelli, David Miller; +Cc: netdev

Ports 9 and 10 don't have internal PHY's but are (dependent on the
version) SERDES/SGMII/XAUI/RXAUI ports.

v2:
- fix it for all 88E6x90 family members

Fixes: bc3931557d1d ("net: dsa: mv88e6xxx: Add number of internal PHYs")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/net/dsa/mv88e6xxx/chip.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index f1f228af0..58eef8ccc 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -4247,7 +4247,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6190",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.num_gpio = 16,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
@@ -4270,7 +4270,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6190X",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.num_gpio = 16,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
@@ -4293,7 +4293,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6191",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
 		.phy_base_addr = 0x0,
@@ -4340,7 +4340,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6290",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.num_gpio = 16,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
@@ -4502,7 +4502,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6390",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.num_gpio = 16,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
@@ -4525,7 +4525,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
 		.name = "Marvell 88E6390X",
 		.num_databases = 4096,
 		.num_ports = 11,	/* 10 + Z80 */
-		.num_internal_phys = 11,
+		.num_internal_phys = 9,
 		.num_gpio = 16,
 		.max_vid = 8191,
 		.port_base_addr = 0x0,
-- 
2.21.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family
  2019-03-02  9:06 [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family Heiner Kallweit
@ 2019-03-02 14:14 ` Andrew Lunn
  2019-03-04  5:16 ` David Miller
  1 sibling, 0 replies; 3+ messages in thread
From: Andrew Lunn @ 2019-03-02 14:14 UTC (permalink / raw)
  To: Heiner Kallweit; +Cc: Vivien Didelot, Florian Fainelli, David Miller, netdev

On Sat, Mar 02, 2019 at 10:06:05AM +0100, Heiner Kallweit wrote:
> Ports 9 and 10 don't have internal PHY's but are (dependent on the
> version) SERDES/SGMII/XAUI/RXAUI ports.
> 
> v2:
> - fix it for all 88E6x90 family members
> 
> Fixes: bc3931557d1d ("net: dsa: mv88e6xxx: Add number of internal PHYs")
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family
  2019-03-02  9:06 [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family Heiner Kallweit
  2019-03-02 14:14 ` Andrew Lunn
@ 2019-03-04  5:16 ` David Miller
  1 sibling, 0 replies; 3+ messages in thread
From: David Miller @ 2019-03-04  5:16 UTC (permalink / raw)
  To: hkallweit1; +Cc: vivien.didelot, andrew, f.fainelli, netdev

From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sat, 2 Mar 2019 10:06:05 +0100

> Ports 9 and 10 don't have internal PHY's but are (dependent on the
> version) SERDES/SGMII/XAUI/RXAUI ports.
> 
> v2:
> - fix it for all 88E6x90 family members
> 
> Fixes: bc3931557d1d ("net: dsa: mv88e6xxx: Add number of internal PHYs")
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

Applied and queued up for -stable, thank you.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2019-03-04  5:16 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-03-02  9:06 [PATCH v2 net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6x90 family Heiner Kallweit
2019-03-02 14:14 ` Andrew Lunn
2019-03-04  5:16 ` David Miller

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