From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@c-sky.com>,
alistair23@gmail.com, chihmin.chao@sifive.com,
palmer@dabbelt.com
Cc: guoren@linux.alibaba.com, wenmeng_zhang@c-sky.com,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
wxy194768@alibaba-inc.com
Subject: Re: [PATCH v5 53/60] target/riscv: vector element index instruction
Date: Sat, 14 Mar 2020 18:54:25 -0700 [thread overview]
Message-ID: <0d5d45b2-770b-be40-4e74-ce3cdb1cd48c@linaro.org> (raw)
In-Reply-To: <20200312145900.2054-54-zhiwei_liu@c-sky.com>
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
> target/riscv/helper.h | 5 +++++
> target/riscv/insn32.decode | 2 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 21 ++++++++++++++++++++
> target/riscv/vector_helper.c | 26 +++++++++++++++++++++++++
> 4 files changed, 54 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@c-sky.com>,
alistair23@gmail.com, chihmin.chao@sifive.com,
palmer@dabbelt.com
Cc: wenmeng_zhang@c-sky.com, wxy194768@alibaba-inc.com,
guoren@linux.alibaba.com, qemu-devel@nongnu.org,
qemu-riscv@nongnu.org
Subject: Re: [PATCH v5 53/60] target/riscv: vector element index instruction
Date: Sat, 14 Mar 2020 18:54:25 -0700 [thread overview]
Message-ID: <0d5d45b2-770b-be40-4e74-ce3cdb1cd48c@linaro.org> (raw)
In-Reply-To: <20200312145900.2054-54-zhiwei_liu@c-sky.com>
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
> target/riscv/helper.h | 5 +++++
> target/riscv/insn32.decode | 2 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 21 ++++++++++++++++++++
> target/riscv/vector_helper.c | 26 +++++++++++++++++++++++++
> 4 files changed, 54 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-03-15 1:55 UTC|newest]
Thread overview: 336+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-12 14:58 [PATCH v5 00/60] target/riscv: support vector extension v0.7.1 LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 01/60] target/riscv: add vector extension field in CPURISCVState LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 02/60] target/riscv: implementation-defined constant parameters LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 03/60] target/riscv: support vector extension csr LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 20:54 ` Alistair Francis
2020-03-12 20:54 ` Alistair Francis
2020-03-14 1:11 ` Richard Henderson
2020-03-14 1:11 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 04/60] target/riscv: add vector configure instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 21:23 ` Alistair Francis
2020-03-12 21:23 ` Alistair Francis
2020-03-12 22:00 ` LIU Zhiwei
2020-03-12 22:00 ` LIU Zhiwei
2020-03-12 22:07 ` Alistair Francis
2020-03-12 22:07 ` Alistair Francis
2020-03-14 1:14 ` Richard Henderson
2020-03-14 1:14 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 05/60] target/riscv: add vector stride load and store instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-13 20:38 ` Alistair Francis
2020-03-13 20:38 ` Alistair Francis
2020-03-13 21:32 ` LIU Zhiwei
2020-03-13 21:32 ` LIU Zhiwei
2020-03-13 22:05 ` Alistair Francis
2020-03-13 22:05 ` Alistair Francis
2020-03-13 22:17 ` LIU Zhiwei
2020-03-13 22:17 ` LIU Zhiwei
2020-03-13 23:38 ` Alistair Francis
2020-03-13 23:38 ` Alistair Francis
2020-03-14 1:26 ` Richard Henderson
2020-03-14 1:26 ` Richard Henderson
2020-03-14 1:49 ` LIU Zhiwei
2020-03-14 1:49 ` LIU Zhiwei
2020-03-14 1:36 ` Richard Henderson
2020-03-14 1:36 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 06/60] target/riscv: add vector index " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-13 21:21 ` Alistair Francis
2020-03-13 21:21 ` Alistair Francis
2020-03-14 1:49 ` Richard Henderson
2020-03-14 1:49 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 07/60] target/riscv: add fault-only-first unit stride load LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-13 22:24 ` Alistair Francis
2020-03-13 22:24 ` Alistair Francis
2020-03-13 22:41 ` LIU Zhiwei
2020-03-13 22:41 ` LIU Zhiwei
2020-03-14 1:50 ` Richard Henderson
2020-03-14 1:50 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 08/60] target/riscv: add vector amo operations LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 0:02 ` Alistair Francis
2020-03-14 0:02 ` Alistair Francis
2020-03-14 0:36 ` LIU Zhiwei
2020-03-14 0:36 ` LIU Zhiwei
2020-03-14 4:28 ` Richard Henderson
2020-03-14 4:28 ` Richard Henderson
2020-03-14 5:07 ` LIU Zhiwei
2020-03-14 5:07 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 5:25 ` Richard Henderson
2020-03-14 5:25 ` Richard Henderson
2020-03-14 8:11 ` LIU Zhiwei
2020-03-14 8:11 ` LIU Zhiwei
2020-03-23 8:10 ` LIU Zhiwei
2020-03-23 8:10 ` LIU Zhiwei
2020-03-23 17:46 ` Richard Henderson
2020-03-23 17:46 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 10/60] target/riscv: vector widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 5:32 ` Richard Henderson
2020-03-14 5:32 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 5:58 ` Richard Henderson
2020-03-14 5:58 ` Richard Henderson
2020-03-14 6:08 ` LIU Zhiwei
2020-03-14 6:08 ` LIU Zhiwei
2020-03-14 6:16 ` Richard Henderson
2020-03-14 6:16 ` Richard Henderson
2020-03-14 6:32 ` LIU Zhiwei
2020-03-14 6:32 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 12/60] target/riscv: vector bitwise logical instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:00 ` Richard Henderson
2020-03-14 6:00 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 13/60] target/riscv: vector single-width bit shift instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:07 ` Richard Henderson
2020-03-14 6:07 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 14/60] target/riscv: vector narrowing integer right " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:10 ` Richard Henderson
2020-03-14 6:10 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 15/60] target/riscv: vector integer comparison instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:33 ` Richard Henderson
2020-03-14 6:33 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 16/60] target/riscv: vector integer min/max instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:40 ` Richard Henderson
2020-03-14 6:40 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 17/60] target/riscv: vector single-width integer multiply instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:52 ` Richard Henderson
2020-03-14 6:52 ` Richard Henderson
2020-03-14 7:02 ` LIU Zhiwei
2020-03-14 7:02 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 18/60] target/riscv: vector integer divide instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 6:58 ` Richard Henderson
2020-03-14 6:58 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 19/60] target/riscv: vector widening integer multiply instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 7:06 ` Richard Henderson
2020-03-14 7:06 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 20/60] target/riscv: vector single-width integer multiply-add instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 7:10 ` Richard Henderson
2020-03-14 7:10 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 21/60] target/riscv: vector widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 7:13 ` Richard Henderson
2020-03-14 7:13 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 22/60] target/riscv: vector integer merge and move instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 7:27 ` Richard Henderson
2020-03-14 7:27 ` Richard Henderson
2020-03-16 2:57 ` LIU Zhiwei
2020-03-16 2:57 ` LIU Zhiwei
2020-03-16 5:32 ` Richard Henderson
2020-03-16 5:32 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 23/60] target/riscv: vector single-width saturating add and subtract LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 7:52 ` Richard Henderson
2020-03-14 7:52 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 24/60] target/riscv: vector single-width averaging " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:14 ` Richard Henderson
2020-03-14 8:14 ` Richard Henderson
2020-03-14 8:25 ` Richard Henderson
2020-03-14 8:25 ` Richard Henderson
2020-03-14 23:12 ` LIU Zhiwei
2020-03-14 23:12 ` LIU Zhiwei
2020-03-15 1:00 ` Richard Henderson
2020-03-15 1:00 ` Richard Henderson
2020-03-15 23:23 ` LIU Zhiwei
2020-03-15 23:23 ` LIU Zhiwei
2020-03-15 23:27 ` Richard Henderson
2020-03-15 23:27 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 25/60] target/riscv: vector single-width fractional multiply with rounding and saturation LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:27 ` Richard Henderson
2020-03-14 8:27 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 26/60] target/riscv: vector widening saturating scaled multiply-add LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:32 ` Richard Henderson
2020-03-14 8:32 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 27/60] target/riscv: vector single-width scaling shift instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:34 ` Richard Henderson
2020-03-14 8:34 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 28/60] target/riscv: vector narrowing fixed-point clip instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:36 ` Richard Henderson
2020-03-14 8:36 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 29/60] target/riscv: vector single-width floating-point add/subtract instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:40 ` Richard Henderson
2020-03-14 8:40 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 30/60] target/riscv: vector widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:43 ` Richard Henderson
2020-03-14 8:43 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 31/60] target/riscv: vector single-width floating-point multiply/divide instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:43 ` Richard Henderson
2020-03-14 8:43 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 32/60] target/riscv: vector widening floating-point multiply LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:46 ` Richard Henderson
2020-03-14 8:46 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 33/60] target/riscv: vector single-width floating-point fused multiply-add instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:49 ` Richard Henderson
2020-03-14 8:49 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 34/60] target/riscv: vector widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:50 ` Richard Henderson
2020-03-14 8:50 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 35/60] target/riscv: vector floating-point square-root instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 36/60] target/riscv: vector floating-point min/max instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:52 ` Richard Henderson
2020-03-14 8:52 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 37/60] target/riscv: vector floating-point sign-injection instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 8:57 ` Richard Henderson
2020-03-14 8:57 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 38/60] target/riscv: vector floating-point compare instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 9:08 ` Richard Henderson
2020-03-14 9:08 ` Richard Henderson
2020-03-14 9:11 ` LIU Zhiwei
2020-03-14 9:11 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 39/60] target/riscv: vector floating-point classify instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 9:10 ` Richard Henderson
2020-03-14 9:10 ` Richard Henderson
2020-03-14 9:15 ` LIU Zhiwei
2020-03-14 9:15 ` LIU Zhiwei
2020-03-14 22:06 ` Richard Henderson
2020-03-14 22:06 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 40/60] target/riscv: vector floating-point merge instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 22:47 ` Richard Henderson
2020-03-14 22:47 ` Richard Henderson
2020-03-16 3:41 ` LIU Zhiwei
2020-03-16 3:41 ` LIU Zhiwei
2020-03-16 5:37 ` Richard Henderson
2020-03-16 5:37 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 41/60] target/riscv: vector floating-point/integer type-convert instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 22:50 ` Richard Henderson
2020-03-14 22:50 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 42/60] target/riscv: widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:03 ` Richard Henderson
2020-03-14 23:03 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 43/60] target/riscv: narrowing " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:08 ` Richard Henderson
2020-03-14 23:08 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 44/60] target/riscv: vector single-width integer reduction instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:29 ` Richard Henderson
2020-03-14 23:29 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 45/60] target/riscv: vector wideing " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:34 ` Richard Henderson
2020-03-14 23:34 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 46/60] target/riscv: vector single-width floating-point " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:48 ` Richard Henderson
2020-03-14 23:48 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 47/60] target/riscv: vector widening " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-14 23:49 ` Richard Henderson
2020-03-14 23:49 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 48/60] target/riscv: vector mask-register logical instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 49/60] target/riscv: vector mask population count vmpopc LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 1:20 ` Richard Henderson
2020-03-15 1:20 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 50/60] target/riscv: vmfirst find-first-set mask bit LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 1:36 ` Richard Henderson
2020-03-15 1:36 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 51/60] target/riscv: set-X-first " LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:58 ` [PATCH v5 52/60] target/riscv: vector iota instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 1:50 ` Richard Henderson
2020-03-15 1:50 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 53/60] target/riscv: vector element index instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 1:54 ` Richard Henderson [this message]
2020-03-15 1:54 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 54/60] target/riscv: integer extract instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 2:53 ` Richard Henderson
2020-03-15 2:53 ` Richard Henderson
2020-03-15 5:15 ` LIU Zhiwei
2020-03-15 5:15 ` LIU Zhiwei
2020-03-15 5:21 ` Richard Henderson
2020-03-15 5:21 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 55/60] target/riscv: integer scalar move instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 3:54 ` Richard Henderson
2020-03-15 3:54 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 56/60] target/riscv: floating-point scalar move instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 4:39 ` Richard Henderson
2020-03-15 4:39 ` Richard Henderson
2020-03-15 6:13 ` LIU Zhiwei
2020-03-15 6:13 ` LIU Zhiwei
2020-03-15 6:48 ` Richard Henderson
2020-03-15 6:48 ` Richard Henderson
2020-03-17 6:01 ` LIU Zhiwei
2020-03-17 6:01 ` LIU Zhiwei
2020-03-17 15:11 ` Richard Henderson
2020-03-17 15:11 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 57/60] target/riscv: vector slide instructions LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 5:16 ` Richard Henderson
2020-03-15 5:16 ` Richard Henderson
2020-03-15 6:49 ` LIU Zhiwei
2020-03-15 6:49 ` LIU Zhiwei
2020-03-15 6:56 ` Richard Henderson
2020-03-15 6:56 ` Richard Henderson
2020-03-16 8:04 ` LIU Zhiwei
2020-03-16 8:04 ` LIU Zhiwei
2020-03-16 17:42 ` Richard Henderson
2020-03-16 17:42 ` Richard Henderson
2020-03-24 10:51 ` LIU Zhiwei
2020-03-24 10:51 ` LIU Zhiwei
2020-03-24 14:52 ` Richard Henderson
2020-03-24 14:52 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 58/60] target/riscv: vector register gather instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-15 5:44 ` Richard Henderson
2020-03-15 5:44 ` Richard Henderson
2020-03-12 14:58 ` [PATCH v5 59/60] target/riscv: vector compress instruction LIU Zhiwei
2020-03-12 14:58 ` LIU Zhiwei
2020-03-12 14:59 ` [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line LIU Zhiwei
2020-03-12 14:59 ` LIU Zhiwei
2020-03-13 21:41 ` Alistair Francis
2020-03-13 21:41 ` Alistair Francis
2020-03-13 21:52 ` LIU Zhiwei
2020-03-13 21:52 ` LIU Zhiwei
2020-03-13 0:41 ` [PATCH v5 00/60] target/riscv: support vector extension v0.7.1 no-reply
2020-03-13 0:41 ` no-reply
2020-03-15 7:00 ` [PATCH v5 35/60] target/riscv: vector floating-point square-root instruction Richard Henderson
2020-03-15 7:00 ` Richard Henderson
2020-03-15 7:26 ` [PATCH v5 51/60] target/riscv: set-X-first mask bit Richard Henderson
2020-03-15 7:26 ` Richard Henderson
2020-03-15 7:34 ` [PATCH v5 59/60] target/riscv: vector compress instruction Richard Henderson
2020-03-15 7:34 ` Richard Henderson
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