* [PATCH 1/2] drm/i915: refactor transcoders reporting on error state
@ 2019-02-22 23:02 Lucas De Marchi
2019-02-22 23:02 ` [PATCH 2/2] drm/i915: allow platforms without eDP transcoder Lucas De Marchi
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Lucas De Marchi @ 2019-02-22 23:02 UTC (permalink / raw)
To: intel-gfx
Instead of keeping track of the number of transcoders, loop through all
the interesting ones and check if there is a correspondent offset.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b1d63c32ca94..9dfb99195144 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -16374,8 +16374,6 @@ struct intel_display_error_state {
u32 power_well_driver;
- int num_transcoders;
-
struct intel_cursor_error_state {
u32 control;
u32 position;
@@ -16400,6 +16398,7 @@ struct intel_display_error_state {
} plane[I915_MAX_PIPES];
struct intel_transcoder_error_state {
+ bool available;
bool power_domain_on;
enum transcoder cpu_transcoder;
@@ -16426,6 +16425,8 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
};
int i;
+ BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error->transcoder));
+
if (!HAS_DISPLAY(dev_priv))
return NULL;
@@ -16466,14 +16467,13 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
error->pipe[i].stat = I915_READ(PIPESTAT(i));
}
- /* Note: this does not include DSI transcoders. */
- error->num_transcoders = INTEL_INFO(dev_priv)->num_pipes;
- if (HAS_DDI(dev_priv))
- error->num_transcoders++; /* Account for eDP. */
-
- for (i = 0; i < error->num_transcoders; i++) {
+ for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
enum transcoder cpu_transcoder = transcoders[i];
+ if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
+ continue;
+
+ error->transcoder[i].available = true;
error->transcoder[i].power_domain_on =
__intel_display_power_is_enabled(dev_priv,
POWER_DOMAIN_TRANSCODER(cpu_transcoder));
@@ -16537,7 +16537,10 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
err_printf(m, " BASE: %08x\n", error->cursor[i].base);
}
- for (i = 0; i < error->num_transcoders; i++) {
+ for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
+ if (!error->transcoder[i].available)
+ continue;
+
err_printf(m, "CPU transcoder: %s\n",
transcoder_name(error->transcoder[i].cpu_transcoder));
err_printf(m, " Power: %s\n",
--
2.20.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: allow platforms without eDP transcoder
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
@ 2019-02-22 23:02 ` Lucas De Marchi
2019-02-25 14:17 ` Kahola, Mika
2019-02-22 23:27 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: refactor transcoders reporting on error state Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2019-02-22 23:02 UTC (permalink / raw)
To: intel-gfx
Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
offset for this transcoder. This allows platforms to be defined without
eDP transcoder.
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 5 ++++-
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cc09caf3870e..a8e9f0cf20f5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2519,6 +2519,7 @@ static inline unsigned int i915_sg_segment_size(void)
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
+#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
#define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
#define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ea83071a22c4..8eeffa027b74 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1911,7 +1911,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
goto out;
}
- if (port == PORT_A)
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
cpu_transcoder = TRANSCODER_EDP;
else
cpu_transcoder = (enum transcoder) pipe;
@@ -1973,7 +1973,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
if (!(tmp & DDI_BUF_CTL_ENABLE))
goto out;
- if (port == PORT_A) {
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
@@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
enum port port = encoder->port;
int ret;
- if (port == PORT_A)
+ if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
pipe_config->cpu_transcoder = TRANSCODER_EDP;
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9dfb99195144..8bf4bdf2006a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
enum intel_display_power_domain power_domain;
- unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
+ unsigned long panel_transcoder_mask = 0;
unsigned long enabled_panel_transcoders = 0;
enum transcoder panel_transcoder;
u32 tmp;
@@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
panel_transcoder_mask |=
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+ if (HAS_TRANSCODER_EDP(dev_priv))
+ panel_transcoder_mask |= BIT(TRANSCODER_EDP);
+
/*
* The pipe->transcoder mapping is fixed with the exception of the eDP
* and DSI transcoders handled below.
--
2.20.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
2019-02-22 23:02 ` [PATCH 2/2] drm/i915: allow platforms without eDP transcoder Lucas De Marchi
@ 2019-02-22 23:27 ` Patchwork
2019-02-22 23:44 ` ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-02-22 23:27 UTC (permalink / raw)
To: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: refactor transcoders reporting on error state
URL : https://patchwork.freedesktop.org/series/57113/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: refactor transcoders reporting on error state
Okay!
Commit: drm/i915: allow platforms without eDP transcoder
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3581:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3582:16: warning: expression using sizeof(void)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
2019-02-22 23:02 ` [PATCH 2/2] drm/i915: allow platforms without eDP transcoder Lucas De Marchi
2019-02-22 23:27 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: refactor transcoders reporting on error state Patchwork
@ 2019-02-22 23:44 ` Patchwork
2019-02-23 5:22 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-04 12:38 ` [PATCH 1/2] " Kahola, Mika
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-02-22 23:44 UTC (permalink / raw)
To: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: refactor transcoders reporting on error state
URL : https://patchwork.freedesktop.org/series/57113/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5655 -> Patchwork_12288
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/57113/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_12288 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: SKIP [fdo#109271] -> PASS
* igt@i915_pm_rpm@basic-rte:
- fi-bsw-kefka: FAIL [fdo#108800] -> PASS
* igt@i915_pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
- {fi-icl-y}: INCOMPLETE [fdo#108840] -> PASS
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: SKIP [fdo#109271] -> PASS +33
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (45 -> 37)
------------------------------
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-kbl-7500u fi-icl-u3 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5655 -> Patchwork_12288
CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12288: 0dd90fb387a3fd48103ec35fe3cda76d753964d7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
0dd90fb387a3 drm/i915: allow platforms without eDP transcoder
65bca16d2f9b drm/i915: refactor transcoders reporting on error state
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12288/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: refactor transcoders reporting on error state
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
` (2 preceding siblings ...)
2019-02-22 23:44 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-02-23 5:22 ` Patchwork
2019-03-04 12:38 ` [PATCH 1/2] " Kahola, Mika
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-02-23 5:22 UTC (permalink / raw)
To: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: refactor transcoders reporting on error state
URL : https://patchwork.freedesktop.org/series/57113/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5655_full -> Patchwork_12288_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12288_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@extended-parallel-bsd1:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +7
* igt@gem_ctx_param@invalid-param-set:
- shard-kbl: NOTRUN -> FAIL [fdo#109674]
* igt@i915_suspend@fence-restore-untiled:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665]
* igt@kms_busy@basic-flip-f:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_busy@basic-modeset-e:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-c-degamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +5
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-apl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +47
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb:
- shard-kbl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: PASS -> DMESG-FAIL [fdo#105763]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@rc6:
- shard-kbl: PASS -> SKIP [fdo#109271]
#### Possible fixes ####
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-kbl: INCOMPLETE [fdo#103665] -> PASS
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_plane_multiple@atomic-pipe-c-tiling-none:
- shard-apl: FAIL [fdo#103166] -> PASS
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (6 -> 5)
------------------------------
Missing (1): shard-skl
Build changes
-------------
* Linux: CI_DRM_5655 -> Patchwork_12288
CI_DRM_5655: a40729237602fa7454aaf3355ad3058cad5c6ee9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4853: 8afdfd8fa9ce17043d9105dedca46ad4555fdcdb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12288: 0dd90fb387a3fd48103ec35fe3cda76d753964d7 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12288/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: allow platforms without eDP transcoder
2019-02-22 23:02 ` [PATCH 2/2] drm/i915: allow platforms without eDP transcoder Lucas De Marchi
@ 2019-02-25 14:17 ` Kahola, Mika
2019-03-01 23:56 ` Lucas De Marchi
0 siblings, 1 reply; 9+ messages in thread
From: Kahola, Mika @ 2019-02-25 14:17 UTC (permalink / raw)
To: intel-gfx, De Marchi, Lucas
Looks allright.
On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
> Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
> offset for this transcoder. This allows platforms to be defined
> without
> eDP transcoder.
>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> drivers/gpu/drm/i915/intel_display.c | 5 ++++-
> 3 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index cc09caf3870e..a8e9f0cf20f5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2519,6 +2519,7 @@ static inline unsigned int
> i915_sg_segment_size(void)
> #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)-
> >display.has_ddi)
> #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
> >has_fpga_dbg)
> #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)-
> >display.has_psr)
> +#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)-
> >trans_offsets[TRANSCODER_EDP] != 0)
>
> #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)-
> >has_rc6)
> #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)-
> >has_rc6p)
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index ea83071a22c4..8eeffa027b74 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1911,7 +1911,7 @@ bool intel_ddi_connector_get_hw_state(struct
> intel_connector *intel_connector)
> goto out;
> }
>
> - if (port == PORT_A)
> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> cpu_transcoder = TRANSCODER_EDP;
> else
> cpu_transcoder = (enum transcoder) pipe;
> @@ -1973,7 +1973,7 @@ static void intel_ddi_get_encoder_pipes(struct
> intel_encoder *encoder,
> if (!(tmp & DDI_BUF_CTL_ENABLE))
> goto out;
>
> - if (port == PORT_A) {
> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
> tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
>
> switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> @@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct
> intel_encoder *encoder,
> enum port port = encoder->port;
> int ret;
>
> - if (port == PORT_A)
> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> pipe_config->cpu_transcoder = TRANSCODER_EDP;
>
> if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 9dfb99195144..8bf4bdf2006a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct
> intel_crtc *crtc,
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> enum intel_display_power_domain power_domain;
> - unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
> + unsigned long panel_transcoder_mask = 0;
> unsigned long enabled_panel_transcoders = 0;
> enum transcoder panel_transcoder;
> u32 tmp;
> @@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct
> intel_crtc *crtc,
> panel_transcoder_mask |=
> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
>
> + if (HAS_TRANSCODER_EDP(dev_priv))
> + panel_transcoder_mask |= BIT(TRANSCODER_EDP);
> +
> /*
> * The pipe->transcoder mapping is fixed with the exception of
> the eDP
> * and DSI transcoders handled below.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: allow platforms without eDP transcoder
2019-02-25 14:17 ` Kahola, Mika
@ 2019-03-01 23:56 ` Lucas De Marchi
2019-03-04 12:39 ` Kahola, Mika
0 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2019-03-01 23:56 UTC (permalink / raw)
To: Kahola, Mika; +Cc: intel-gfx
On Mon, Feb 25, 2019 at 06:17:13AM -0800, Mika Kahola wrote:
>Looks allright.
>
>On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
>> Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
>> offset for this transcoder. This allows platforms to be defined
>> without
>> eDP transcoder.
>>
>> Cc: Mika Kahola <mika.kahola@intel.com>
>> Cc: Imre Deak <imre.deak@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
>Reviewed-by: Mika Kahola <mika.kahola@intel.com>
humn.. this depends on the first patch. Is this r-b for both?
Lucas De Marchi
>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
>> drivers/gpu/drm/i915/intel_display.c | 5 ++++-
>> 3 files changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index cc09caf3870e..a8e9f0cf20f5 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2519,6 +2519,7 @@ static inline unsigned int
>> i915_sg_segment_size(void)
>> #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)-
>> >display.has_ddi)
>> #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
>> >has_fpga_dbg)
>> #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)-
>> >display.has_psr)
>> +#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)-
>> >trans_offsets[TRANSCODER_EDP] != 0)
>>
>> #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)-
>> >has_rc6)
>> #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)-
>> >has_rc6p)
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index ea83071a22c4..8eeffa027b74 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -1911,7 +1911,7 @@ bool intel_ddi_connector_get_hw_state(struct
>> intel_connector *intel_connector)
>> goto out;
>> }
>>
>> - if (port == PORT_A)
>> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
>> cpu_transcoder = TRANSCODER_EDP;
>> else
>> cpu_transcoder = (enum transcoder) pipe;
>> @@ -1973,7 +1973,7 @@ static void intel_ddi_get_encoder_pipes(struct
>> intel_encoder *encoder,
>> if (!(tmp & DDI_BUF_CTL_ENABLE))
>> goto out;
>>
>> - if (port == PORT_A) {
>> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
>> tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
>>
>> switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
>> @@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct
>> intel_encoder *encoder,
>> enum port port = encoder->port;
>> int ret;
>>
>> - if (port == PORT_A)
>> + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
>> pipe_config->cpu_transcoder = TRANSCODER_EDP;
>>
>> if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 9dfb99195144..8bf4bdf2006a 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct
>> intel_crtc *crtc,
>> struct drm_device *dev = crtc->base.dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>> enum intel_display_power_domain power_domain;
>> - unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
>> + unsigned long panel_transcoder_mask = 0;
>> unsigned long enabled_panel_transcoders = 0;
>> enum transcoder panel_transcoder;
>> u32 tmp;
>> @@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct
>> intel_crtc *crtc,
>> panel_transcoder_mask |=
>> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
>>
>> + if (HAS_TRANSCODER_EDP(dev_priv))
>> + panel_transcoder_mask |= BIT(TRANSCODER_EDP);
>> +
>> /*
>> * The pipe->transcoder mapping is fixed with the exception of
>> the eDP
>> * and DSI transcoders handled below.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: refactor transcoders reporting on error state
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
` (3 preceding siblings ...)
2019-02-23 5:22 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-03-04 12:38 ` Kahola, Mika
4 siblings, 0 replies; 9+ messages in thread
From: Kahola, Mika @ 2019-03-04 12:38 UTC (permalink / raw)
To: intel-gfx, De Marchi, Lucas
Looks ok.
On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
> Instead of keeping track of the number of transcoders, loop through
> all
> the interesting ones and check if there is a correspondent offset.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++---------
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index b1d63c32ca94..9dfb99195144 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -16374,8 +16374,6 @@ struct intel_display_error_state {
>
> u32 power_well_driver;
>
> - int num_transcoders;
> -
> struct intel_cursor_error_state {
> u32 control;
> u32 position;
> @@ -16400,6 +16398,7 @@ struct intel_display_error_state {
> } plane[I915_MAX_PIPES];
>
> struct intel_transcoder_error_state {
> + bool available;
> bool power_domain_on;
> enum transcoder cpu_transcoder;
>
> @@ -16426,6 +16425,8 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
> };
> int i;
>
> + BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error-
> >transcoder));
> +
> if (!HAS_DISPLAY(dev_priv))
> return NULL;
>
> @@ -16466,14 +16467,13 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
> error->pipe[i].stat = I915_READ(PIPESTAT(i));
> }
>
> - /* Note: this does not include DSI transcoders. */
> - error->num_transcoders = INTEL_INFO(dev_priv)->num_pipes;
> - if (HAS_DDI(dev_priv))
> - error->num_transcoders++; /* Account for eDP. */
> -
> - for (i = 0; i < error->num_transcoders; i++) {
> + for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> enum transcoder cpu_transcoder = transcoders[i];
>
> + if (!INTEL_INFO(dev_priv)-
> >trans_offsets[cpu_transcoder])
> + continue;
> +
> + error->transcoder[i].available = true;
> error->transcoder[i].power_domain_on =
> __intel_display_power_is_enabled(dev_priv,
> POWER_DOMAIN_TRANSCODER(cpu_transcoder)
> );
> @@ -16537,7 +16537,10 @@ intel_display_print_error_state(struct
> drm_i915_error_state_buf *m,
> err_printf(m, " BASE: %08x\n", error->cursor[i].base);
> }
>
> - for (i = 0; i < error->num_transcoders; i++) {
> + for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> + if (!error->transcoder[i].available)
> + continue;
> +
> err_printf(m, "CPU transcoder: %s\n",
> transcoder_name(error-
> >transcoder[i].cpu_transcoder));
> err_printf(m, " Power: %s\n",
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: allow platforms without eDP transcoder
2019-03-01 23:56 ` Lucas De Marchi
@ 2019-03-04 12:39 ` Kahola, Mika
0 siblings, 0 replies; 9+ messages in thread
From: Kahola, Mika @ 2019-03-04 12:39 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx
On Fri, 2019-03-01 at 15:56 -0800, Lucas De Marchi wrote:
> On Mon, Feb 25, 2019 at 06:17:13AM -0800, Mika Kahola wrote:
> > Looks allright.
> >
> > On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
> > > Define a HAS_TRANSCODER_EDP() macro that checks if we have
> > > defined an
> > > offset for this transcoder. This allows platforms to be defined
> > > without
> > > eDP transcoder.
> > >
> > > Cc: Mika Kahola <mika.kahola@intel.com>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > Reviewed-by: Mika Kahola <mika.kahola@intel.com>
>
> humn.. this depends on the first patch. Is this r-b for both?
I reviewed the first patch too. It looked ok so I gave my r-b on that
one too.
Cheers,
Mika
>
> Lucas De Marchi
>
> >
> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> > > drivers/gpu/drm/i915/intel_display.c | 5 ++++-
> > > 3 files changed, 8 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index cc09caf3870e..a8e9f0cf20f5 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2519,6 +2519,7 @@ static inline unsigned int
> > > i915_sg_segment_size(void)
> > > #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)-
> > > > display.has_ddi)
> > >
> > > #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
> > > > has_fpga_dbg)
> > >
> > > #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)-
> > > > display.has_psr)
> > >
> > > +#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)-
> > > > trans_offsets[TRANSCODER_EDP] != 0)
> > >
> > > #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)-
> > > > has_rc6)
> > >
> > > #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)-
> > > > has_rc6p)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index ea83071a22c4..8eeffa027b74 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -1911,7 +1911,7 @@ bool
> > > intel_ddi_connector_get_hw_state(struct
> > > intel_connector *intel_connector)
> > > goto out;
> > > }
> > >
> > > - if (port == PORT_A)
> > > + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> > > cpu_transcoder = TRANSCODER_EDP;
> > > else
> > > cpu_transcoder = (enum transcoder) pipe;
> > > @@ -1973,7 +1973,7 @@ static void
> > > intel_ddi_get_encoder_pipes(struct
> > > intel_encoder *encoder,
> > > if (!(tmp & DDI_BUF_CTL_ENABLE))
> > > goto out;
> > >
> > > - if (port == PORT_A) {
> > > + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
> > > tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> > >
> > > switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> > > @@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct
> > > intel_encoder *encoder,
> > > enum port port = encoder->port;
> > > int ret;
> > >
> > > - if (port == PORT_A)
> > > + if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> > > pipe_config->cpu_transcoder = TRANSCODER_EDP;
> > >
> > > if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index 9dfb99195144..8bf4bdf2006a 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct
> > > intel_crtc *crtc,
> > > struct drm_device *dev = crtc->base.dev;
> > > struct drm_i915_private *dev_priv = to_i915(dev);
> > > enum intel_display_power_domain power_domain;
> > > - unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
> > > + unsigned long panel_transcoder_mask = 0;
> > > unsigned long enabled_panel_transcoders = 0;
> > > enum transcoder panel_transcoder;
> > > u32 tmp;
> > > @@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct
> > > intel_crtc *crtc,
> > > panel_transcoder_mask |=
> > > BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
> > >
> > > + if (HAS_TRANSCODER_EDP(dev_priv))
> > > + panel_transcoder_mask |= BIT(TRANSCODER_EDP);
> > > +
> > > /*
> > > * The pipe->transcoder mapping is fixed with the exception of
> > > the eDP
> > > * and DSI transcoders handled below.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-03-04 12:39 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-22 23:02 [PATCH 1/2] drm/i915: refactor transcoders reporting on error state Lucas De Marchi
2019-02-22 23:02 ` [PATCH 2/2] drm/i915: allow platforms without eDP transcoder Lucas De Marchi
2019-02-25 14:17 ` Kahola, Mika
2019-03-01 23:56 ` Lucas De Marchi
2019-03-04 12:39 ` Kahola, Mika
2019-02-22 23:27 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: refactor transcoders reporting on error state Patchwork
2019-02-22 23:44 ` ✓ Fi.CI.BAT: success " Patchwork
2019-02-23 5:22 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-04 12:38 ` [PATCH 1/2] " Kahola, Mika
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