Re: [RFC v2 21/24] target/arm: cpu64: wrap TCG-only parts of aarch64_cpu_dump_state

From: Richard Henderson <richard.henderson@linaro.org>
To: Claudio Fontana <cfontana@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [RFC v2 21/24] target/arm: cpu64: wrap TCG-only parts of aarch64_cpu_dump_state
Date: Tue, 2 Mar 2021 10:49:25 -0800	[thread overview]
Message-ID: <0f8e5f5c-efd9-4206-f4c4-459ddc138643@linaro.org> (raw)
In-Reply-To: <cd93478c-00d3-c6b7-1529-7e52c33b2446@suse.de>

On 3/2/21 10:01 AM, Claudio Fontana wrote:
> On 3/2/21 5:56 PM, Richard Henderson wrote:
>> On 3/1/21 8:49 AM, Claudio Fontana wrote:
>>> -    if (cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) == 0) {
>>> +    if (tcg_enabled() &&
>>> +        cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) == 0) {
>>
>> There's nothing tcg-only about this -- kvm supports sve.
>>
>> r~
>>
> 
> Indeed, on my box I am using probably just the cpu_isar_feature check fails.

Yes, sve-enabled cpus are quite rare so far.

> This is basically an open question: do we need an sve_exception_el helper stub that always returns 0?

Hmm.  I think not -- this is checking first that sve is present in the cpu, and 
second that sve is actually enabled at runtime.  There's nothing tcg-specific 
in either test.

I think we'd want to keep the sve_exception_el check as-is.  Just document the 
use path.

r~