* [U-Boot] [PATCH 0/2] board: ge: bx50v3: Fix screen flickering
@ 2018-10-15 7:59 Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 1/2] board: ge: bx50v3: correct LDB clock Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 2/2] board: ge: bx50v3: b{4,6}50v3 modeline Fabien Lahoudere
0 siblings, 2 replies; 3+ messages in thread
From: Fabien Lahoudere @ 2018-10-15 7:59 UTC (permalink / raw)
To: u-boot
This patchset solves screen flickering observed at bootup on b650v3.
Steps to reproduce:
1) Connect B650 to power.
2) Switch On the Monitor.
3) Observe the display.
Ian Ray (2):
board: ge: bx50v3: correct LDB clock
board: ge: bx50v3: b{4,6}50v3 modeline
board/ge/bx50v3/bx50v3.c | 32 +++++++++++++++++++-------------
1 file changed, 19 insertions(+), 13 deletions(-)
--
1.8.3.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH 1/2] board: ge: bx50v3: correct LDB clock
2018-10-15 7:59 [U-Boot] [PATCH 0/2] board: ge: bx50v3: Fix screen flickering Fabien Lahoudere
@ 2018-10-15 7:59 ` Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 2/2] board: ge: bx50v3: b{4,6}50v3 modeline Fabien Lahoudere
1 sibling, 0 replies; 3+ messages in thread
From: Fabien Lahoudere @ 2018-10-15 7:59 UTC (permalink / raw)
To: u-boot
From: Ian Ray <ian.ray@ge.com>
Use Video PLL to provide 65MHz for all displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
---
board/ge/bx50v3/bx50v3.c | 30 +++++++++++++++++-------------
1 file changed, 17 insertions(+), 13 deletions(-)
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index b2d065c..f07141b 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -426,14 +426,22 @@ static void enable_videopll(void)
setbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN);
- /* set video pll to 910MHz (24MHz * (37+11/12))
- * video pll post div to 910/4 = 227.5MHz
- */
+ /* PLL_VIDEO 455MHz (24MHz * (37+11/12) / 2)
+ * |
+ * PLL5
+ * |
+ * CS2CDR[LDB_DI0_CLK_SEL]
+ * |
+ * +----> LDB_DI0_SERIAL_CLK_ROOT
+ * |
+ * +--> CSCMR2[LDB_DI0_IPU_DIV] --> LDB_DI0_IPU 455 / 7 = 65 MHz
+ */
+
clrsetbits_le32(&ccm->analog_pll_video,
BM_ANADIG_PLL_VIDEO_DIV_SELECT |
BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT,
BF_ANADIG_PLL_VIDEO_DIV_SELECT(37) |
- BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(0));
+ BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(1));
writel(BF_ANADIG_PLL_VIDEO_NUM_A(11), &ccm->analog_pll_video_num);
writel(BF_ANADIG_PLL_VIDEO_DENOM_B(12), &ccm->analog_pll_video_denom);
@@ -459,8 +467,8 @@ static void setup_display_b850v3(void)
enable_videopll();
- /* IPU1 D0 clock is 227.5 / 3.5 = 65MHz */
- clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
+ /* IPU1 DI0 clock is 455MHz / 7 = 65MHz */
+ setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
imx_setup_hdmi();
@@ -507,7 +515,7 @@ static void setup_display_bx50v3(void)
*/
mdelay(200);
- /* IPU1 DI0 clock is 480/7 = 68.5 MHz */
+ /* IPU1 DI0 clock is 455MHz / 7 = 65MHz */
setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
/* Set LDB_DI0 as clock source for IPU_DI0 */
@@ -683,12 +691,8 @@ int board_early_init_f(void)
setup_iomux_uart();
#if defined(CONFIG_VIDEO_IPUV3)
- if (is_b850v3())
- /* Set LDB clock to Video PLL */
- select_ldb_di_clock_source(MXC_PLL5_CLK);
- else
- /* Set LDB clock to USB PLL */
- select_ldb_di_clock_source(MXC_PLL3_SW_CLK);
+ /* Set LDB clock to Video PLL */
+ select_ldb_di_clock_source(MXC_PLL5_CLK);
#endif
return 0;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH 2/2] board: ge: bx50v3: b{4,6}50v3 modeline
2018-10-15 7:59 [U-Boot] [PATCH 0/2] board: ge: bx50v3: Fix screen flickering Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 1/2] board: ge: bx50v3: correct LDB clock Fabien Lahoudere
@ 2018-10-15 7:59 ` Fabien Lahoudere
1 sibling, 0 replies; 3+ messages in thread
From: Fabien Lahoudere @ 2018-10-15 7:59 UTC (permalink / raw)
To: u-boot
From: Ian Ray <ian.ray@ge.com>
The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise
the LVDS panel shows garbage.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
---
board/ge/bx50v3/bx50v3.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index f07141b..2eb1b65 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -809,6 +809,8 @@ int board_late_init(void)
if (is_b850v3())
env_set("videoargs", "video=DP-1:1024x768 at 60 video=HDMI-A-1:1024x768 at 60");
+ else
+ env_set("videoargs", "video=LVDS-1:1024x768 at 65");
/* board specific pmic init */
pmic_init();
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-10-15 7:59 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2018-10-15 7:59 [U-Boot] [PATCH 0/2] board: ge: bx50v3: Fix screen flickering Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 1/2] board: ge: bx50v3: correct LDB clock Fabien Lahoudere
2018-10-15 7:59 ` [U-Boot] [PATCH 2/2] board: ge: bx50v3: b{4,6}50v3 modeline Fabien Lahoudere
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