* [PATCH 1/2] drm/amdgpu: alway cancel uvd idle work
@ 2017-12-14 11:38 Jim Qu
[not found] ` <1513251492-31864-1-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Jim Qu @ 2017-12-14 11:38 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Jim Qu
Change-Id: I06e5460ece91e812cda28fb02a6b78676d921e18
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 916e516..343b682 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -294,6 +294,8 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev)
void *ptr;
int i;
+ cancel_delayed_work_sync(&adev->uvd.idle_work);
+
if (adev->uvd.vcpu_bo == NULL)
return 0;
@@ -304,8 +306,6 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev)
if (i == AMDGPU_MAX_UVD_HANDLES)
return 0;
- cancel_delayed_work_sync(&adev->uvd.idle_work);
-
size = amdgpu_bo_size(adev->uvd.vcpu_bo);
ptr = adev->uvd.cpu_addr;
--
1.9.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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* [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume [not found] ` <1513251492-31864-1-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org> @ 2017-12-14 11:38 ` Jim Qu [not found] ` <1513251492-31864-2-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org> 2017-12-14 12:02 ` [PATCH 1/2] drm/amdgpu: alway cancel uvd idle work Christian König 1 sibling, 1 reply; 7+ messages in thread From: Jim Qu @ 2017-12-14 11:38 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Jim Qu otherwise, uvd block will be never powered up in ring begin_use() callback. uvd ring test will be fail in resume in rumtime pm. Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 Signed-off-by: Jim Qu <Jim.Qu@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 ++++++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index 343b682..a2d0b84 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c @@ -293,6 +293,7 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) unsigned size; void *ptr; int i; + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; cancel_delayed_work_sync(&adev->uvd.idle_work); @@ -303,9 +304,11 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) if (atomic_read(&adev->uvd.handles[i])) break; - if (i == AMDGPU_MAX_UVD_HANDLES) + if (i == AMDGPU_MAX_UVD_HANDLES) { + if (drv->cpu_addr) + adev->uvd.fence_seq = le32_to_cpu(*drv->cpu_addr); return 0; - + } size = amdgpu_bo_size(adev->uvd.vcpu_bo); ptr = adev->uvd.cpu_addr; @@ -322,6 +325,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) { unsigned size; void *ptr; + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; if (adev->uvd.vcpu_bo == NULL) return -EINVAL; @@ -346,6 +350,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) ptr += le32_to_cpu(hdr->ucode_size_bytes); } memset_io(ptr, 0, size); + if (drv->cpu_addr) + *drv->cpu_addr = le32_to_cpu(adev->uvd.fence_seq); } return 0; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h index 32ea20b..88f6db9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h @@ -55,6 +55,7 @@ struct amdgpu_uvd { struct drm_sched_entity entity_enc; uint32_t srbm_soft_reset; unsigned num_enc_rings; + uint32_t fence_seq; }; int amdgpu_uvd_sw_init(struct amdgpu_device *adev); -- 1.9.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 7+ messages in thread
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* Re: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume [not found] ` <1513251492-31864-2-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org> @ 2017-12-14 12:57 ` Christian König [not found] ` <8b994351-2131-c1cc-692a-9ef4d28bd991-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 7+ messages in thread From: Christian König @ 2017-12-14 12:57 UTC (permalink / raw) To: Jim Qu, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Am 14.12.2017 um 12:38 schrieb Jim Qu: > otherwise, uvd block will be never powered up in ring begin_use() > callback. uvd ring test will be fail in resume in rumtime pm. NAK, that should already be done by amdgpu_fence_driver_start_ring(). If this doesn't work please try to figure out why amdgpu_fence_driver_start_ring() isn't called during resume (Or if it is called, but not in the right order or whatever really goes wrong here). Regards, Christian. > > Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 > Signed-off-by: Jim Qu <Jim.Qu@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 ++++++++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > index 343b682..a2d0b84 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > @@ -293,6 +293,7 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > unsigned size; > void *ptr; > int i; > + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; > > cancel_delayed_work_sync(&adev->uvd.idle_work); > > @@ -303,9 +304,11 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > if (atomic_read(&adev->uvd.handles[i])) > break; > > - if (i == AMDGPU_MAX_UVD_HANDLES) > + if (i == AMDGPU_MAX_UVD_HANDLES) { > + if (drv->cpu_addr) > + adev->uvd.fence_seq = le32_to_cpu(*drv->cpu_addr); > return 0; > - > + } > size = amdgpu_bo_size(adev->uvd.vcpu_bo); > ptr = adev->uvd.cpu_addr; > > @@ -322,6 +325,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) > { > unsigned size; > void *ptr; > + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; > > if (adev->uvd.vcpu_bo == NULL) > return -EINVAL; > @@ -346,6 +350,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) > ptr += le32_to_cpu(hdr->ucode_size_bytes); > } > memset_io(ptr, 0, size); > + if (drv->cpu_addr) > + *drv->cpu_addr = le32_to_cpu(adev->uvd.fence_seq); > } > > return 0; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > index 32ea20b..88f6db9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > @@ -55,6 +55,7 @@ struct amdgpu_uvd { > struct drm_sched_entity entity_enc; > uint32_t srbm_soft_reset; > unsigned num_enc_rings; > + uint32_t fence_seq; > }; > > int amdgpu_uvd_sw_init(struct amdgpu_device *adev); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
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* 答复: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume [not found] ` <8b994351-2131-c1cc-692a-9ef4d28bd991-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-12-14 13:50 ` Qu, Jim [not found] ` <DM3PR12MB08734613754A96A4A2128C8D990A0-4hRkV8tDpBiYEITDcfEJ8AdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org> 0 siblings, 1 reply; 7+ messages in thread From: Qu, Jim @ 2017-12-14 13:50 UTC (permalink / raw) To: Koenig, Christian, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Hi Christian, I remember the amdgpu_fence_driver_start_ring() function is called by amdgpu_ring_init (), so the function should never be called in amdgpu_device_resume(). Thanks JimQu -----邮件原件----- 发件人: Christian König [mailto:ckoenig.leichtzumerken@gmail.com] 发送时间: 2017年12月14日 20:57 收件人: Qu, Jim <Jim.Qu@amd.com>; amd-gfx@lists.freedesktop.org 主题: Re: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume Am 14.12.2017 um 12:38 schrieb Jim Qu: > otherwise, uvd block will be never powered up in ring begin_use() > callback. uvd ring test will be fail in resume in rumtime pm. NAK, that should already be done by amdgpu_fence_driver_start_ring(). If this doesn't work please try to figure out why amdgpu_fence_driver_start_ring() isn't called during resume (Or if it is called, but not in the right order or whatever really goes wrong here). Regards, Christian. > > Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 > Signed-off-by: Jim Qu <Jim.Qu@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 ++++++++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > index 343b682..a2d0b84 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > @@ -293,6 +293,7 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > unsigned size; > void *ptr; > int i; > + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; > > cancel_delayed_work_sync(&adev->uvd.idle_work); > > @@ -303,9 +304,11 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > if (atomic_read(&adev->uvd.handles[i])) > break; > > - if (i == AMDGPU_MAX_UVD_HANDLES) > + if (i == AMDGPU_MAX_UVD_HANDLES) { > + if (drv->cpu_addr) > + adev->uvd.fence_seq = le32_to_cpu(*drv->cpu_addr); > return 0; > - > + } > size = amdgpu_bo_size(adev->uvd.vcpu_bo); > ptr = adev->uvd.cpu_addr; > > @@ -322,6 +325,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) > { > unsigned size; > void *ptr; > + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; > > if (adev->uvd.vcpu_bo == NULL) > return -EINVAL; > @@ -346,6 +350,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) > ptr += le32_to_cpu(hdr->ucode_size_bytes); > } > memset_io(ptr, 0, size); > + if (drv->cpu_addr) > + *drv->cpu_addr = le32_to_cpu(adev->uvd.fence_seq); > } > > return 0; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > index 32ea20b..88f6db9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h > @@ -55,6 +55,7 @@ struct amdgpu_uvd { > struct drm_sched_entity entity_enc; > uint32_t srbm_soft_reset; > unsigned num_enc_rings; > + uint32_t fence_seq; > }; > > int amdgpu_uvd_sw_init(struct amdgpu_device *adev); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <DM3PR12MB08734613754A96A4A2128C8D990A0-4hRkV8tDpBiYEITDcfEJ8AdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>]
* Re: 答复: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume [not found] ` <DM3PR12MB08734613754A96A4A2128C8D990A0-4hRkV8tDpBiYEITDcfEJ8AdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org> @ 2017-12-14 14:02 ` Christian König [not found] ` <ac8d82b1-c792-9b88-fa95-7c2ff8a5936b-5C7GfCeVMHo@public.gmane.org> 0 siblings, 1 reply; 7+ messages in thread From: Christian König @ 2017-12-14 14:02 UTC (permalink / raw) To: Qu, Jim, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Hi Jim, ah yes, we dropped that because it shouldn't be necessary any more on amdgpu. The fences are written into a GTT BO and the content of that should be preserved even over a suspend & resume cycle. But there is an issue with that. Taking a look at amdgpu_fence_driver_start_ring() we still have the hack for ancient UVD versions to put the fence directly behind the UVD firmware instead of into the GTT BO. Can you try if it works as well if you disabled that? The workaround is most likely not needed any more with modern firmware. If that doesn't work you could try to call amdgpu_fence_driver_force_completion() in the UVD resume code that should have the same effect as your proposed patch, but is far less code. Regards, Christian. Am 14.12.2017 um 14:50 schrieb Qu, Jim: > Hi Christian, > > I remember the amdgpu_fence_driver_start_ring() function is called by amdgpu_ring_init (), so the function should never be called in amdgpu_device_resume(). > > Thanks > JimQu > -----邮件原件----- > 发件人: Christian König [mailto:ckoenig.leichtzumerken@gmail.com] > 发送时间: 2017年12月14日 20:57 > 收件人: Qu, Jim <Jim.Qu@amd.com>; amd-gfx@lists.freedesktop.org > 主题: Re: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume > > Am 14.12.2017 um 12:38 schrieb Jim Qu: >> otherwise, uvd block will be never powered up in ring begin_use() >> callback. uvd ring test will be fail in resume in rumtime pm. > NAK, that should already be done by amdgpu_fence_driver_start_ring(). > > If this doesn't work please try to figure out why > amdgpu_fence_driver_start_ring() isn't called during resume (Or if it is called, but not in the right order or whatever really goes wrong here). > > Regards, > Christian. > >> Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 >> Signed-off-by: Jim Qu <Jim.Qu@amd.com> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 ++++++++-- >> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + >> 2 files changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> index 343b682..a2d0b84 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> @@ -293,6 +293,7 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) >> unsigned size; >> void *ptr; >> int i; >> + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; >> >> cancel_delayed_work_sync(&adev->uvd.idle_work); >> >> @@ -303,9 +304,11 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) >> if (atomic_read(&adev->uvd.handles[i])) >> break; >> >> - if (i == AMDGPU_MAX_UVD_HANDLES) >> + if (i == AMDGPU_MAX_UVD_HANDLES) { >> + if (drv->cpu_addr) >> + adev->uvd.fence_seq = le32_to_cpu(*drv->cpu_addr); >> return 0; >> - >> + } >> size = amdgpu_bo_size(adev->uvd.vcpu_bo); >> ptr = adev->uvd.cpu_addr; >> >> @@ -322,6 +325,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) >> { >> unsigned size; >> void *ptr; >> + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; >> >> if (adev->uvd.vcpu_bo == NULL) >> return -EINVAL; >> @@ -346,6 +350,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) >> ptr += le32_to_cpu(hdr->ucode_size_bytes); >> } >> memset_io(ptr, 0, size); >> + if (drv->cpu_addr) >> + *drv->cpu_addr = le32_to_cpu(adev->uvd.fence_seq); >> } >> >> return 0; >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> index 32ea20b..88f6db9 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> @@ -55,6 +55,7 @@ struct amdgpu_uvd { >> struct drm_sched_entity entity_enc; >> uint32_t srbm_soft_reset; >> unsigned num_enc_rings; >> + uint32_t fence_seq; >> }; >> >> int amdgpu_uvd_sw_init(struct amdgpu_device *adev); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <ac8d82b1-c792-9b88-fa95-7c2ff8a5936b-5C7GfCeVMHo@public.gmane.org>]
* 答复: 答复: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume [not found] ` <ac8d82b1-c792-9b88-fa95-7c2ff8a5936b-5C7GfCeVMHo@public.gmane.org> @ 2017-12-14 14:13 ` Qu, Jim 0 siblings, 0 replies; 7+ messages in thread From: Qu, Jim @ 2017-12-14 14:13 UTC (permalink / raw) To: Koenig, Christian, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Hi Christian, Correctly, the problem really is that uvd fence memory is behind uvd firmware. In generic case, uvd firmware and fence will be saved in adev->uvd.saved_bo. In this issue, because of there is no uvd handles, so uvd firmware and fence memory are not saved in amdgpu_uvd_suspend(). In amdgpu_uvd_resume(), code run into 'else' case, it just restore the firmware. I will try your suggestion tomorrow. Thanks JimQu -----邮件原件----- 发件人: Koenig, Christian 发送时间: 2017年12月14日 22:02 收件人: Qu, Jim <Jim.Qu@amd.com>; amd-gfx@lists.freedesktop.org 主题: Re: 答复: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume Hi Jim, ah yes, we dropped that because it shouldn't be necessary any more on amdgpu. The fences are written into a GTT BO and the content of that should be preserved even over a suspend & resume cycle. But there is an issue with that. Taking a look at amdgpu_fence_driver_start_ring() we still have the hack for ancient UVD versions to put the fence directly behind the UVD firmware instead of into the GTT BO. Can you try if it works as well if you disabled that? The workaround is most likely not needed any more with modern firmware. If that doesn't work you could try to call amdgpu_fence_driver_force_completion() in the UVD resume code that should have the same effect as your proposed patch, but is far less code. Regards, Christian. Am 14.12.2017 um 14:50 schrieb Qu, Jim: > Hi Christian, > > I remember the amdgpu_fence_driver_start_ring() function is called by amdgpu_ring_init (), so the function should never be called in amdgpu_device_resume(). > > Thanks > JimQu > -----邮件原件----- > 发件人: Christian König [mailto:ckoenig.leichtzumerken@gmail.com] > 发送时间: 2017年12月14日 20:57 > 收件人: Qu, Jim <Jim.Qu@amd.com>; amd-gfx@lists.freedesktop.org > 主题: Re: [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number > in suspend/resume > > Am 14.12.2017 um 12:38 schrieb Jim Qu: >> otherwise, uvd block will be never powered up in ring begin_use() >> callback. uvd ring test will be fail in resume in rumtime pm. > NAK, that should already be done by amdgpu_fence_driver_start_ring(). > > If this doesn't work please try to figure out why > amdgpu_fence_driver_start_ring() isn't called during resume (Or if it is called, but not in the right order or whatever really goes wrong here). > > Regards, > Christian. > >> Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 >> Signed-off-by: Jim Qu <Jim.Qu@amd.com> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 ++++++++-- >> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + >> 2 files changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> index 343b682..a2d0b84 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c >> @@ -293,6 +293,7 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) >> unsigned size; >> void *ptr; >> int i; >> + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; >> >> cancel_delayed_work_sync(&adev->uvd.idle_work); >> >> @@ -303,9 +304,11 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) >> if (atomic_read(&adev->uvd.handles[i])) >> break; >> >> - if (i == AMDGPU_MAX_UVD_HANDLES) >> + if (i == AMDGPU_MAX_UVD_HANDLES) { >> + if (drv->cpu_addr) >> + adev->uvd.fence_seq = le32_to_cpu(*drv->cpu_addr); >> return 0; >> - >> + } >> size = amdgpu_bo_size(adev->uvd.vcpu_bo); >> ptr = adev->uvd.cpu_addr; >> >> @@ -322,6 +325,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) >> { >> unsigned size; >> void *ptr; >> + struct amdgpu_fence_driver *drv = &adev->uvd.ring.fence_drv; >> >> if (adev->uvd.vcpu_bo == NULL) >> return -EINVAL; >> @@ -346,6 +350,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) >> ptr += le32_to_cpu(hdr->ucode_size_bytes); >> } >> memset_io(ptr, 0, size); >> + if (drv->cpu_addr) >> + *drv->cpu_addr = le32_to_cpu(adev->uvd.fence_seq); >> } >> >> return 0; >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> index 32ea20b..88f6db9 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h >> @@ -55,6 +55,7 @@ struct amdgpu_uvd { >> struct drm_sched_entity entity_enc; >> uint32_t srbm_soft_reset; >> unsigned num_enc_rings; >> + uint32_t fence_seq; >> }; >> >> int amdgpu_uvd_sw_init(struct amdgpu_device *adev); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu: alway cancel uvd idle work [not found] ` <1513251492-31864-1-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org> 2017-12-14 11:38 ` [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume Jim Qu @ 2017-12-14 12:02 ` Christian König 1 sibling, 0 replies; 7+ messages in thread From: Christian König @ 2017-12-14 12:02 UTC (permalink / raw) To: Jim Qu, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Am 14.12.2017 um 12:38 schrieb Jim Qu: > Change-Id: I06e5460ece91e812cda28fb02a6b78676d921e18 > Signed-off-by: Jim Qu <Jim.Qu@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > index 916e516..343b682 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > @@ -294,6 +294,8 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > void *ptr; > int i; > > + cancel_delayed_work_sync(&adev->uvd.idle_work); > + > if (adev->uvd.vcpu_bo == NULL) > return 0; Good catch, but you moved it a bit to hight I think. When adev->uvd.vcpu_bo is NULL the delayed work item might never have been initialized. Not sure if that is a problem, but I would just move the cancel_delayed_work after the "if" just to be on the safe side. Christian. > > @@ -304,8 +306,6 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) > if (i == AMDGPU_MAX_UVD_HANDLES) > return 0; > > - cancel_delayed_work_sync(&adev->uvd.idle_work); > - > size = amdgpu_bo_size(adev->uvd.vcpu_bo); > ptr = adev->uvd.cpu_addr; > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
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2017-12-14 11:38 [PATCH 1/2] drm/amdgpu: alway cancel uvd idle work Jim Qu
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2017-12-14 11:38 ` [PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume Jim Qu
[not found] ` <1513251492-31864-2-git-send-email-Jim.Qu-5C7GfCeVMHo@public.gmane.org>
2017-12-14 12:57 ` Christian König
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2017-12-14 13:50 ` 答复: " Qu, Jim
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2017-12-14 14:02 ` Christian König
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2017-12-14 14:13 ` 答复: " Qu, Jim
2017-12-14 12:02 ` [PATCH 1/2] drm/amdgpu: alway cancel uvd idle work Christian König
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