[PATCH 0/2] ARM: EXYNOS: G2D clock support to Exynos4

[PATCH 0/2] ARM: EXYNOS: G2D clock support to Exynos4

[Sachin Kamat]

This patch series moves the SoC specific G2D clock entries from common clock 
file (clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c)
since G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs
and adds support for Exynos4x12 G2D clock.

This series is based on Kukjin Kim's latest for-next branch.

Sachin Kamat (2):
  ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file
  ARM: EXYNOS: Add G2D related clock entries for SMDK4X12

 arch/arm/mach-exynos/clock-exynos4.c    |   41 +-----------------------------
 arch/arm/mach-exynos/clock-exynos4.h    |    3 ++
 arch/arm/mach-exynos/clock-exynos4210.c |   37 ++++++++++++++++++++++++++++
 arch/arm/mach-exynos/clock-exynos4212.c |   41 +++++++++++++++++++++++++++++-
 4 files changed, 81 insertions(+), 41 deletions(-)

-- 
1.7.4.1

[PATCH 1/2] ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file

[Sachin Kamat]

G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs.
Hence moving the SoC specific G2D clock entries from common clock file
(clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c).

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
 arch/arm/mach-exynos/clock-exynos4.c    |   41 +-----------------------------
 arch/arm/mach-exynos/clock-exynos4.h    |    3 ++
 arch/arm/mach-exynos/clock-exynos4210.c |   37 ++++++++++++++++++++++++++++
 3 files changed, 42 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index bcb7db4..18d59d3 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -620,10 +620,6 @@ static struct clk exynos4_init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_peril_ctrl,
 		.ctrlbit	= (1 << 27),
 	}, {
-		.name		= "fimg2d",
-		.enable		= exynos4_clk_ip_image_ctrl,
-		.ctrlbit	= (1 << 0),
-	}, {
 		.name		= "mfc",
 		.devname	= "s5p-mfc",
 		.enable		= exynos4_clk_ip_mfc_ctrl,
@@ -819,47 +815,21 @@ static struct clk *exynos4_clkset_mout_g2d0_list[] = {
 	[1] = &exynos4_clk_sclk_apll.clk,
 };
 
-static struct clksrc_sources exynos4_clkset_mout_g2d0 = {
+struct clksrc_sources exynos4_clkset_mout_g2d0 = {
 	.sources	= exynos4_clkset_mout_g2d0_list,
 	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d0_list),
 };
 
-static struct clksrc_clk exynos4_clk_mout_g2d0 = {
-	.clk	= {
-		.name		= "mout_g2d0",
-	},
-	.sources = &exynos4_clkset_mout_g2d0,
-	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
-};
-
 static struct clk *exynos4_clkset_mout_g2d1_list[] = {
 	[0] = &exynos4_clk_mout_epll.clk,
 	[1] = &exynos4_clk_sclk_vpll.clk,
 };
 
-static struct clksrc_sources exynos4_clkset_mout_g2d1 = {
+struct clksrc_sources exynos4_clkset_mout_g2d1 = {
 	.sources	= exynos4_clkset_mout_g2d1_list,
 	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d1_list),
 };
 
-static struct clksrc_clk exynos4_clk_mout_g2d1 = {
-	.clk	= {
-		.name		= "mout_g2d1",
-	},
-	.sources = &exynos4_clkset_mout_g2d1,
-	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 },
-};
-
-static struct clk *exynos4_clkset_mout_g2d_list[] = {
-	[0] = &exynos4_clk_mout_g2d0.clk,
-	[1] = &exynos4_clk_mout_g2d1.clk,
-};
-
-static struct clksrc_sources exynos4_clkset_mout_g2d = {
-	.sources	= exynos4_clkset_mout_g2d_list,
-	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
-};
-
 static struct clk *exynos4_clkset_mout_mfc0_list[] = {
 	[0] = &exynos4_clk_mout_mpll.clk,
 	[1] = &exynos4_clk_sclk_apll.clk,
@@ -1126,13 +1096,6 @@ static struct clksrc_clk exynos4_clksrcs[] = {
 		.reg_div = { .reg = EXYNOS4_CLKDIV_LCD0, .shift = 0, .size = 4 },
 	}, {
 		.clk	= {
-			.name		= "sclk_fimg2d",
-		},
-		.sources = &exynos4_clkset_mout_g2d,
-		.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 },
-		.reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "sclk_mfc",
 			.devname	= "s5p-mfc",
 		},
diff --git a/arch/arm/mach-exynos/clock-exynos4.h b/arch/arm/mach-exynos/clock-exynos4.h
index 28a1197..bd12d5f 100644
--- a/arch/arm/mach-exynos/clock-exynos4.h
+++ b/arch/arm/mach-exynos/clock-exynos4.h
@@ -23,6 +23,9 @@ extern struct clksrc_sources exynos4_clkset_group;
 extern struct clk *exynos4_clkset_aclk_top_list[];
 extern struct clk *exynos4_clkset_group_list[];
 
+extern struct clksrc_sources exynos4_clkset_mout_g2d0;
+extern struct clksrc_sources exynos4_clkset_mout_g2d1;
+
 extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable);
 extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable);
 extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable);
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c
index b8689ff..0bf767a 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -48,6 +48,32 @@ static struct clksrc_clk *sysclks[] = {
 	/* nothing here yet */
 };
 
+static struct clksrc_clk exynos4_clk_mout_g2d0 = {
+	.clk	= {
+		.name		= "mout_g2d0",
+	},
+	.sources = &exynos4_clkset_mout_g2d0,
+	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk exynos4_clk_mout_g2d1 = {
+	.clk	= {
+		.name		= "mout_g2d1",
+	},
+	.sources = &exynos4_clkset_mout_g2d1,
+	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 },
+};
+
+static struct clk *exynos4_clkset_mout_g2d_list[] = {
+	[0] = &exynos4_clk_mout_g2d0.clk,
+	[1] = &exynos4_clk_mout_g2d1.clk,
+};
+
+static struct clksrc_sources exynos4_clkset_mout_g2d = {
+	.sources	= exynos4_clkset_mout_g2d_list,
+	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
+};
+
 static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable)
 {
 	return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable);
@@ -74,6 +100,13 @@ static struct clksrc_clk clksrcs[] = {
 		.sources = &exynos4_clkset_group,
 		.reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift = 0, .size = 4 },
 		.reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift = 0, .size = 4 },
+	}, {
+		.clk	= {
+			.name		= "sclk_fimg2d",
+		},
+		.sources = &exynos4_clkset_mout_g2d,
+		.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 },
+		.reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 },
 	},
 };
 
@@ -105,6 +138,10 @@ static struct clk init_clocks_off[] = {
 		.devname	= SYSMMU_CLOCK_DEVNAME(fimd1, 11),
 		.enable		= exynos4_clk_ip_lcd1_ctrl,
 		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "fimg2d",
+		.enable		= exynos4_clk_ip_image_ctrl,
+		.ctrlbit	= (1 << 0),
 	},
 };
 
-- 
1.7.4.1

[PATCH 2/2] ARM: EXYNOS: Add G2D related clock entries for SMDK4X12

[Sachin Kamat]

Adds G2D related clock entries for SMDK4X12 boards.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
 arch/arm/mach-exynos/clock-exynos4212.c |   41 +++++++++++++++++++++++++++++-
 1 files changed, 39 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index da397d2..fdc26ac 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -68,12 +68,45 @@ static struct clksrc_clk clk_mout_mpll_user = {
 	.reg_src	= { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 },
 };
 
+static struct clksrc_clk exynos4_clk_mout_g2d0 = {
+	.clk	= {
+		.name		= "mout_g2d0",
+	},
+	.sources = &exynos4_clkset_mout_g2d0,
+	.reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 20, .size = 1 },
+};
+
+static struct clksrc_clk exynos4_clk_mout_g2d1 = {
+	.clk	= {
+		.name		= "mout_g2d1",
+	},
+	.sources = &exynos4_clkset_mout_g2d1,
+	.reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 24, .size = 1 },
+};
+
+static struct clk *exynos4_clkset_mout_g2d_list[] = {
+	[0] = &exynos4_clk_mout_g2d0.clk,
+	[1] = &exynos4_clk_mout_g2d1.clk,
+};
+
+static struct clksrc_sources exynos4_clkset_mout_g2d = {
+	.sources	= exynos4_clkset_mout_g2d_list,
+	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
+};
+
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_mpll_user,
 };
 
 static struct clksrc_clk clksrcs[] = {
-	/* nothing here yet */
+	{
+		.clk	= {
+			.name		= "sclk_fimg2d",
+		},
+		.sources = &exynos4_clkset_mout_g2d,
+		.reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 28, .size = 1 },
+		.reg_div = { .reg = EXYNOS4_CLKDIV_DMC1, .shift = 0, .size = 4 },
+	},
 };
 
 static struct clk init_clocks_off[] = {
@@ -102,7 +135,11 @@ static struct clk init_clocks_off[] = {
 		.devname	= "exynos-fimc-lite.1",
 		.enable		= exynos4212_clk_ip_isp0_ctrl,
 		.ctrlbit	= (1 << 3),
-	}
+	}, {
+		.name		= "fimg2d",
+		.enable		= exynos4_clk_ip_dmc_ctrl,
+		.ctrlbit	= (1 << 23),
+	},
 };
 
 #ifdef CONFIG_PM_SLEEP
-- 
1.7.4.1

Re: [PATCH 0/2] ARM: EXYNOS: G2D clock support to Exynos4

[Sachin Kamat]

ping ...

On 18/05/2012, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> This patch series moves the SoC specific G2D clock entries from common clock
>
> file (clock-exynos4.c) to Exynos4210 specific clock file
> (clock-exynos4210.c)
> since G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs
> and adds support for Exynos4x12 G2D clock.
>
> This series is based on Kukjin Kim's latest for-next branch.
>
> Sachin Kamat (2):
>   ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file
>   ARM: EXYNOS: Add G2D related clock entries for SMDK4X12
>
>  arch/arm/mach-exynos/clock-exynos4.c    |   41
> +-----------------------------
>  arch/arm/mach-exynos/clock-exynos4.h    |    3 ++
>  arch/arm/mach-exynos/clock-exynos4210.c |   37
> ++++++++++++++++++++++++++++
>  arch/arm/mach-exynos/clock-exynos4212.c |   41
> +++++++++++++++++++++++++++++-
>  4 files changed, 81 insertions(+), 41 deletions(-)
>
> --
> 1.7.4.1
>
>


-- 
With warm regards,
Sachin

RE: [PATCH 1/2] ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file

[Kukjin Kim]

Sachin Kamat wrote:
> 
> G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs.
> Hence moving the SoC specific G2D clock entries from common clock file
> (clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c).
> 
Yeah, I agree but there are small comments.

[snip]

> +static struct clksrc_clk exynos4_clk_mout_g2d0 = {

In this case, 'exynos4210_clk_mout_g2d0' is clearer, it is static though.

> +	.clk	= {
> +		.name		= "mout_g2d0",
> +	},
> +	.sources = &exynos4_clkset_mout_g2d0,
> +	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
> +};
> +
> +static struct clksrc_clk exynos4_clk_mout_g2d1 = {

Same as above, exynos4210_clk_mout_g2d1.

> +	.clk	= {
> +		.name		= "mout_g2d1",
> +	},
> +	.sources = &exynos4_clkset_mout_g2d1,
> +	.reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 },
> +};
> +
> +static struct clk *exynos4_clkset_mout_g2d_list[] = {

Same, exynos4210_clkset_mout_g2d_list[]

> +	[0] = &exynos4_clk_mout_g2d0.clk,

exynos4210_clk_mout_g2d0.clk

> +	[1] = &exynos4_clk_mout_g2d1.clk,

exynos4210_clk_mout_g2d1.clk

> +};
> +
> +static struct clksrc_sources exynos4_clkset_mout_g2d = {

Same, exynos4210_clkset_mout_g2d

> +	.sources	= exynos4_clkset_mout_g2d_list,

exynos4210_clkset_mout_g2d_list

> +	.nr_sources	= ARRAY_SIZE(exynos4_clkset_mout_g2d_list),

exynos4210_clkset_mout_g2d_list

> +};
> +
>  static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable)
>  {
>  	return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable);
> @@ -74,6 +100,13 @@ static struct clksrc_clk clksrcs[] = {
>  		.sources = &exynos4_clkset_group,
>  		.reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift =
> 0, .size = 4 },
>  		.reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift =
> 0, .size = 4 },
> +	}, {
> +		.clk	= {
> +			.name		= "sclk_fimg2d",
> +		},
> +		.sources = &exynos4_clkset_mout_g2d,

exynos4210_clkset_mout_g2d

[snip]

Could you please re-submit this after re-working on top of my
next/devel-samsung.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

RE: [PATCH 2/2] ARM: EXYNOS: Add G2D related clock entries for SMDK4X12

[Kukjin Kim]

Sachin Kamat wrote:
> 
> Adds G2D related clock entries for SMDK4X12 boards.
> 
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> ---
>  arch/arm/mach-exynos/clock-exynos4212.c |   41
> +++++++++++++++++++++++++++++-
>  1 files changed, 39 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-
> exynos/clock-exynos4212.c
> index da397d2..fdc26ac 100644
> --- a/arch/arm/mach-exynos/clock-exynos4212.c
> +++ b/arch/arm/mach-exynos/clock-exynos4212.c
> @@ -68,12 +68,45 @@ static struct clksrc_clk clk_mout_mpll_user = {
>  	.reg_src	= { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size =
> 1 },
>  };
> 
> +static struct clksrc_clk exynos4_clk_mout_g2d0 = {

Same as previous comments, 'exynos4212_clk_mout_g2d0' is better here, or
exynos4x12_clk_mout_g2d0.

[snip]...

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH 1/2] ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file

[Sachin Kamat]

On 13 July 2012 19:08, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Sachin Kamat wrote:
>>
>> G2D clock registers are different in Exynos4210 and Exynos4X12 SoCs.
>> Hence moving the SoC specific G2D clock entries from common clock file
>> (clock-exynos4.c) to Exynos4210 specific clock file (clock-exynos4210.c).
>>
> Yeah, I agree but there are small comments.
>
> [snip]
>
>> +static struct clksrc_clk exynos4_clk_mout_g2d0 = {
>
> In this case, 'exynos4210_clk_mout_g2d0' is clearer, it is static though.
>
>> +     .clk    = {
>> +             .name           = "mout_g2d0",
>> +     },
>> +     .sources = &exynos4_clkset_mout_g2d0,
>> +     .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 },
>> +};
>> +
>> +static struct clksrc_clk exynos4_clk_mout_g2d1 = {
>
> Same as above, exynos4210_clk_mout_g2d1.
>
>> +     .clk    = {
>> +             .name           = "mout_g2d1",
>> +     },
>> +     .sources = &exynos4_clkset_mout_g2d1,
>> +     .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 },
>> +};
>> +
>> +static struct clk *exynos4_clkset_mout_g2d_list[] = {
>
> Same, exynos4210_clkset_mout_g2d_list[]
>
>> +     [0] = &exynos4_clk_mout_g2d0.clk,
>
> exynos4210_clk_mout_g2d0.clk
>
>> +     [1] = &exynos4_clk_mout_g2d1.clk,
>
> exynos4210_clk_mout_g2d1.clk
>
>> +};
>> +
>> +static struct clksrc_sources exynos4_clkset_mout_g2d = {
>
> Same, exynos4210_clkset_mout_g2d
>
>> +     .sources        = exynos4_clkset_mout_g2d_list,
>
> exynos4210_clkset_mout_g2d_list
>
>> +     .nr_sources     = ARRAY_SIZE(exynos4_clkset_mout_g2d_list),
>
> exynos4210_clkset_mout_g2d_list
>
>> +};
>> +
>>  static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable)
>>  {
>>       return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable);
>> @@ -74,6 +100,13 @@ static struct clksrc_clk clksrcs[] = {
>>               .sources = &exynos4_clkset_group,
>>               .reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift =
>> 0, .size = 4 },
>>               .reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift =
>> 0, .size = 4 },
>> +     }, {
>> +             .clk    = {
>> +                     .name           = "sclk_fimg2d",
>> +             },
>> +             .sources = &exynos4_clkset_mout_g2d,
>
> exynos4210_clkset_mout_g2d
>
> [snip]
>
> Could you please re-submit this after re-working on top of my
> next/devel-samsung.

Ok. I will update as per your suggestion and re-send.
Thanks for the review.

>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>



-- 
With warm regards,
Sachin