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From: Luca Weiss <luca@z3ntu.xyz>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Stephen Boyd <swboyd@chromium.org>,
	freedreno@lists.freedesktop.org,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: Re: [PATCH 2/5] drm/msm/mdss: enable optional core clock for MDP5 MDSS
Date: Sat, 18 Jun 2022 16:23:33 +0200	[thread overview]
Message-ID: <11998546.O9o76ZdvQC@g550jk> (raw)
In-Reply-To: <20220615135935.87381-2-dmitry.baryshkov@linaro.org>

Hi Dmitry,

On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> registers during the platform init.
> 

I believe you also need to update Documentation/devicetree/bindings/display/
msm/mdp5.txt with the new clock.

Regards
Luca

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/gpu/drm/msm/msm_mdss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index b41848bfff91..f7b4628986b8 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -288,7 +288,7 @@ static int msm_mdss_reset(struct device *dev)
>  /*
>   * MDP5 MDSS uses at most three specified clocks.
>   */
> -#define MDP5_MDSS_NUM_CLOCKS 3
> +#define MDP5_MDSS_NUM_CLOCKS 4
>  static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct
> clk_bulk_data **clocks) {
>  	struct clk_bulk_data *bulk;
> @@ -305,6 +305,7 @@ static int mdp5_mdss_parse_clock(struct platform_device
> *pdev, struct clk_bulk_d bulk[num_clocks++].id = "iface";
>  	bulk[num_clocks++].id = "bus";
>  	bulk[num_clocks++].id = "vsync";
> +	bulk[num_clocks++].id = "core"; /* for hw_rev access */
> 
>  	ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
>  	if (ret)





WARNING: multiple messages have this Message-ID (diff)
From: Luca Weiss <luca@z3ntu.xyz>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Stephen Boyd <swboyd@chromium.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	freedreno@lists.freedesktop.org
Subject: Re: [PATCH 2/5] drm/msm/mdss: enable optional core clock for MDP5 MDSS
Date: Sat, 18 Jun 2022 16:23:33 +0200	[thread overview]
Message-ID: <11998546.O9o76ZdvQC@g550jk> (raw)
In-Reply-To: <20220615135935.87381-2-dmitry.baryshkov@linaro.org>

Hi Dmitry,

On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> registers during the platform init.
> 

I believe you also need to update Documentation/devicetree/bindings/display/
msm/mdp5.txt with the new clock.

Regards
Luca

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/gpu/drm/msm/msm_mdss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index b41848bfff91..f7b4628986b8 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -288,7 +288,7 @@ static int msm_mdss_reset(struct device *dev)
>  /*
>   * MDP5 MDSS uses at most three specified clocks.
>   */
> -#define MDP5_MDSS_NUM_CLOCKS 3
> +#define MDP5_MDSS_NUM_CLOCKS 4
>  static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct
> clk_bulk_data **clocks) {
>  	struct clk_bulk_data *bulk;
> @@ -305,6 +305,7 @@ static int mdp5_mdss_parse_clock(struct platform_device
> *pdev, struct clk_bulk_d bulk[num_clocks++].id = "iface";
>  	bulk[num_clocks++].id = "bus";
>  	bulk[num_clocks++].id = "vsync";
> +	bulk[num_clocks++].id = "core"; /* for hw_rev access */
> 
>  	ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
>  	if (ret)





  reply	other threads:[~2022-06-18 14:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-15 13:59 [PATCH 1/5] drm/msm: less magic numbers in msm_mdss_enable Dmitry Baryshkov
2022-06-15 13:59 ` Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 2/5] drm/msm/mdss: enable optional core clock for MDP5 MDSS Dmitry Baryshkov
2022-06-15 13:59   ` Dmitry Baryshkov
2022-06-18 14:23   ` Luca Weiss [this message]
2022-06-18 14:23     ` Luca Weiss
2022-06-18 15:26     ` Dmitry Baryshkov
2022-06-18 15:26       ` Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 3/5] drm/msm/mdss: check for core clk before accessing HW_REV Dmitry Baryshkov
2022-06-15 13:59   ` Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 4/5] drm/msm/mdss: move is_mdp5 condition to msm_mdss_init Dmitry Baryshkov
2022-06-15 13:59   ` Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 5/5] arm64: dts: qcom: add mdp_clk clock to the MDSS device Dmitry Baryshkov
2022-06-15 13:59   ` Dmitry Baryshkov
2022-07-03  3:56   ` (subset) " Bjorn Andersson
2022-07-03  3:56     ` Bjorn Andersson

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