* Trouble moving custom MPC8548 board to U-boot 1.3
@ 2009-01-06 13:28 Pieter
2009-01-06 16:52 ` Jon Loeliger
0 siblings, 1 reply; 5+ messages in thread
From: Pieter @ 2009-01-06 13:28 UTC (permalink / raw)
To: linuxppc-dev
Hi all,
I have spent quite some time trying to move from U-Boot 1.2 to a newer
version.. I am stuck at the initialization of the ram. The ram checksum
fails and gives me a "total memory of 0". (the board has 512MB and work
when booting uboot 1.2)
can anyone pls. point me in the right direction?
My console output is as follows:
U-Boot 2008.10-00334-g90665e3-dirty-svn1154 (Jan 6 2009 -
13:40:47)
CPU: 8548E, Version: 1.1,
(0x80390011)
Core: E500, Version: 1.0,
(0x80210010)
Clock
Configuration:
CPU:990 MHz, CCB:396
MHz,
DDR:198 MHz (396 MT/s data rate), LBC:49.500
MHz
L1: D-cache 32 kB
enabled
I-cache 32 kB
enabled
Board: Equus
MPC8548
PCI1: 64 bit, 66 MHz,
sync
I2C:
ready
DRAM:
Initializing
fsl_ddr_sdram
starting at step 1
(STEP_GET_SPD)
SPD checksum unexpected. Checksum in SPD = 27, computed SPD =
74
DIMM 0: failed
checksum
Error: compute_dimm_parameters non-zero returned FATAL value for
memctl=0 dimm=0
Programming controller
0
No dimms present on controller 0; skipping
programming
total_memory =
0
DDR: only 16M, 32M, 64M, 128M, 256M, 512M, 1G and 2G are
supported.
DDR: 64
MB
Top of RAM usable for U-Boot at:
04000000
Reserving 266k for U-Boot at:
03fb0000
Reserving 136k for malloc() at:
03f8e000
Reserving 72 Bytes for Board Info at:
03f8dfb8
Reserving 64 Bytes for Global Data at:
03f8df78
Stack Pointer at:
03f8df58
New Stack Pointer is: 03f8df58
My DDR configuration is as follows:
/* DDR Setup */
#define CONFIG_VERY_BIG_RAM
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SPD_EEPROM
#define CONFIG_DDR_SPD
#define CONFIG_DDR_DLL
#define CONFIG_DDR_2T_TIMING
#define CONFIG_DDR_ECC
#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
thanks pieter
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Trouble moving custom MPC8548 board to U-boot 1.3
2009-01-06 13:28 Trouble moving custom MPC8548 board to U-boot 1.3 Pieter
@ 2009-01-06 16:52 ` Jon Loeliger
2009-01-09 13:32 ` Pieter
2009-01-09 13:32 ` Pieter
0 siblings, 2 replies; 5+ messages in thread
From: Jon Loeliger @ 2009-01-06 16:52 UTC (permalink / raw)
To: Pieter; +Cc: linuxppc-dev
On Tue, 2009-01-06 at 15:28 +0200, Pieter wrote:
> Hi all,
>
> I have spent quite some time trying to move from U-Boot 1.2 to a newer
> version.. I am stuck at the initialization of the ram. The ram checksum
> fails and gives me a "total memory of 0". (the board has 512MB and work
> when booting uboot 1.2)
>
> can anyone pls. point me in the right direction?
>
> My console output is as follows:
>
> U-Boot 2008.10-00334-g90665e3-dirty-svn1154 (Jan 6 2009 -
> 13:40:47)
>
>
> CPU: 8548E, Version: 1.1,
> (0x80390011)
> Core: E500, Version: 1.0,
> (0x80210010)
> Clock
> Configuration:
>
> CPU:990 MHz, CCB:396
> MHz,
> DDR:198 MHz (396 MT/s data rate), LBC:49.500
> MHz
> L1: D-cache 32 kB
> enabled
> I-cache 32 kB
> enabled
> Board: Equus
> MPC8548
> PCI1: 64 bit, 66 MHz,
> sync
> I2C:
> ready
>
> DRAM:
> Initializing
>
> fsl_ddr_sdram
>
> starting at step 1
> (STEP_GET_SPD)
> SPD checksum unexpected. Checksum in SPD = 27, computed SPD =
> 74
> DIMM 0: failed
This is your root cause: Unable to get the SPD information
for the DDR DIMM in slot 0 of controller 0.
What part are you using? Does it support SPD?
Is your I2C to it hooked up correctly?
Can you dump the SPD information that is read?
Does it match the part specs?
HTH,
jdl
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Trouble moving custom MPC8548 board to U-boot 1.3
2009-01-06 16:52 ` Jon Loeliger
@ 2009-01-09 13:32 ` Pieter
2009-01-09 13:32 ` Pieter
1 sibling, 0 replies; 5+ messages in thread
From: Pieter @ 2009-01-09 13:32 UTC (permalink / raw)
To: Jon Loeliger, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 2318 bytes --]
Hi all,
>> I have spent quite some time trying to move from U-Boot 1.2 to a newer
>> version.. I am stuck at the initialization of the ram. The ram checksum
>> fails and gives me a "total memory of 0". (the board has 512MB and work
>> when booting uboot 1.2)
>>
>> can anyone pls. point me in the right direction?
>>
>>
> This is your root cause: Unable to get the SPD information
> for the DDR DIMM in slot 0 of controller 0.
>
> What part are you using? Does it support SPD?
> Is your I2C to it hooked up correctly?
> Can you dump the SPD information that is read?
> Does it match the part specs?
>
> HTH,
> jdl
I have managed to read the SPD data for the dram. I also confirmed that
the dram control and timing settings correspond to the settings that
worked in the previous uboot.
I am now able to run uboot up to the "relocate_code". The new Stack
pointer is set to 0x0FF8DF58 witch is close enough to what i expected.
This is however where the board hangs. (The board also hang when running
the "testram"). I tried reading the data at the new stack pointer but
get "SAP: read access failed" i get the same error when trying to read
any address within the RAM or any address of other devices. This leads
me to think that my LAW or TLB setup is incorrect.
Looking at LAW setup: (based on board sbc8548)
/* LAW(Local Access Window) configuration:
* 0x0000_0000 0x1fff_ffff DDR 512M/Auto
* 0x8000_0000 0xbfff_ffff PCI1 MEM 1G
* 0xc000_0000 0xcfff_ffff PCI1 IO 16M
* 0xe000_0000 0xffff_ffff LBC 512M */
struct law_entry law_table[] = {
#ifndef CONFIG_SPD_EEPROM
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAWAR_SIZE_512M,
LAWAR_TRGT_IF_DDR),
#endif
SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAWAR_SIZE_1G,
LAWAR_TRGT_IF_PCI1 ),
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_16M,
LAWAR_TRGT_IF_PCI1),
SET_LAW(CONFIG_SYS_LBC_BASE, LAWAR_SIZE_512M, LAWAR_TRGT_IF_LBC)
};
Since my board uses SPD_EEPROM, where does the LAW entry for DDR done by
cpu/mpc8xxx/ddr/util.c and should not need changing, the base adders is
correct, as is the law_bar_target_id.
Could you pl suggest some other things i should should look at.
thanks pieter
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Trouble moving custom MPC8548 board to U-boot 1.3
2009-01-06 16:52 ` Jon Loeliger
2009-01-09 13:32 ` Pieter
@ 2009-01-09 13:32 ` Pieter
2009-01-09 15:38 ` Kumar Gala
1 sibling, 1 reply; 5+ messages in thread
From: Pieter @ 2009-01-09 13:32 UTC (permalink / raw)
To: Jon Loeliger, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 2230 bytes --]
Hi all,
>> I have spent quite some time trying to move from U-Boot 1.2 to a newer
>> version.. I am stuck at the initialization of the ram. The ram checksum
>> fails and gives me a "total memory of 0". (the board has 512MB and work
>> when booting uboot 1.2)
>>
>> can anyone pls. point me in the right direction?
>>
>>
> This is your root cause: Unable to get the SPD information
> for the DDR DIMM in slot 0 of controller 0.
>
> What part are you using? Does it support SPD?
> Is your I2C to it hooked up correctly?
> Can you dump the SPD information that is read?
> Does it match the part specs?
>
> HTH,
> jdl
I have managed to read the SPD data for the dram. I also confirmed that
the dram control and timing settings correspond to the settings that
worked in the previous uboot.
I am now able to run uboot up to the "relocate_code". The new Stack
pointer is set to 0x0FF8DF58 witch is close enough to what i expected.
This is however where the board hangs. (The board also hang when running
the "testram"). I tried reading the data at the new stack pointer but
get "SAP: read access failed" i get the same error when trying to read
any address within the RAM or any address of other devices. This leads
me to think that my LAW or TLB setup is incorrect.
Looking at LAW setup: (based on board sbc8548)
/* LAW(Local Access Window) configuration:
* 0x0000_0000 0x1fff_ffff DDR 512M/Auto
* 0x8000_0000 0xbfff_ffff PCI1 MEM 1G
* 0xc000_0000 0xcfff_ffff PCI1 IO 16M
* 0xe000_0000 0xffff_ffff LBC 512M */
struct law_entry law_table[] = {
#ifndef CONFIG_SPD_EEPROM
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAWAR_SIZE_512M,
LAWAR_TRGT_IF_DDR),
#endif
SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAWAR_SIZE_1G,
LAWAR_TRGT_IF_PCI1 ),
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_16M,
LAWAR_TRGT_IF_PCI1),
SET_LAW(CONFIG_SYS_LBC_BASE, LAWAR_SIZE_512M, LAWAR_TRGT_IF_LBC)
};
Since my board uses SPD_EEPROM, where does the LAW entry for DDR get
initilized or should the #ifndef statement be removed?
Am I on the right track to solving my problem?
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Trouble moving custom MPC8548 board to U-boot 1.3
2009-01-09 13:32 ` Pieter
@ 2009-01-09 15:38 ` Kumar Gala
0 siblings, 0 replies; 5+ messages in thread
From: Kumar Gala @ 2009-01-09 15:38 UTC (permalink / raw)
To: Pieter; +Cc: linuxppc-dev
On Jan 9, 2009, at 7:32 AM, Pieter wrote:
> Hi all,
>>> I have spent quite some time trying to move from U-Boot 1.2 to a
>>> newer
>>> version.. I am stuck at the initialization of the ram. The ram
>>> checksum
>>> fails and gives me a "total memory of 0". (the board has 512MB and
>>> work
>>> when booting uboot 1.2)
>>>
>>> can anyone pls. point me in the right direction?
>>>
>>>
>> This is your root cause: Unable to get the SPD information
>> for the DDR DIMM in slot 0 of controller 0.
>>
>> What part are you using? Does it support SPD?
>> Is your I2C to it hooked up correctly?
>> Can you dump the SPD information that is read?
>> Does it match the part specs?
>>
>> HTH,
>> jdl
> I have managed to read the SPD data for the dram. I also confirmed
> that
> the dram control and timing settings correspond to the settings that
> worked in the previous uboot.
> I am now able to run uboot up to the "relocate_code". The new Stack
> pointer is set to 0x0FF8DF58 witch is close enough to what i expected.
> This is however where the board hangs. (The board also hang when
> running
> the "testram"). I tried reading the data at the new stack pointer but
> get "SAP: read access failed" i get the same error when trying to
> read
> any address within the RAM or any address of other devices. This
> leads
> me to think that my LAW or TLB setup is incorrect.
>
> Looking at LAW setup: (based on board sbc8548)
>
> /* LAW(Local Access Window) configuration:
> * 0x0000_0000 0x1fff_ffff DDR 512M/Auto
> * 0x8000_0000 0xbfff_ffff PCI1 MEM 1G
> * 0xc000_0000 0xcfff_ffff PCI1 IO 16M
> * 0xe000_0000 0xffff_ffff LBC
> 512M */
>
> struct law_entry law_table[] = {
> #ifndef CONFIG_SPD_EEPROM
> SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAWAR_SIZE_512M,
> LAWAR_TRGT_IF_DDR),
> #endif
> SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAWAR_SIZE_1G,
> LAWAR_TRGT_IF_PCI1 ),
> SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_16M,
> LAWAR_TRGT_IF_PCI1),
> SET_LAW(CONFIG_SYS_LBC_BASE, LAWAR_SIZE_512M,
> LAWAR_TRGT_IF_LBC)
> };
>
> Since my board uses SPD_EEPROM, where does the LAW entry for DDR get
> initilized or should the #ifndef statement be removed?
>
>
>
> Am I on the right track to solving my problem?
>
This should be discussed on the u-boot list not the linuxppc-dev list
- k
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2009-01-09 15:40 UTC | newest]
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-- links below jump to the message on this page --
2009-01-06 13:28 Trouble moving custom MPC8548 board to U-boot 1.3 Pieter
2009-01-06 16:52 ` Jon Loeliger
2009-01-09 13:32 ` Pieter
2009-01-09 13:32 ` Pieter
2009-01-09 15:38 ` Kumar Gala
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