* [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries.
@ 2009-04-21 13:08 Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Santosh Shilimkar
2009-04-21 16:41 ` [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Kevin Hilman
0 siblings, 2 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch creates the architectural macros for OMAP4. The MULTI_OMAP
build is not yet supported by OMAP4.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/Kconfig | 16 +++++++++++++++-
arch/arm/plat-omap/Kconfig | 10 +++++++---
arch/arm/plat-omap/include/mach/cpu.h | 17 +++++++++++++++--
3 files changed, 37 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 64ab386..a28eb30 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -24,8 +24,18 @@ config ARCH_OMAP3430
depends on ARCH_OMAP3 && ARCH_OMAP34XX
select ARCH_OMAP_OTG
+config ARCH_OMAP44XX
+ bool "OMAP44xx Based System"
+ depends on ARCH_OMAP4
+
+config ARCH_OMAP4430
+ bool "OMAP4430 support"
+ depends on ARCH_OMAP4 && ARCH_OMAP44XX
+ select ARM_GIC
+
+
comment "OMAP Board Type"
- depends on ARCH_OMAP2 || ARCH_OMAP3
+ depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
config MACH_OMAP_GENERIC
bool "Generic OMAP board"
@@ -67,3 +77,7 @@ config MACH_OMAP_3430SDP
config MACH_NOKIA_RX51
bool "Nokia RX-51 board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
+
+config MACH_OMAP_4430SDP
+ bool "OMAP 4430 SDP board"
+ depends on ARCH_OMAP4 && ARCH_OMAP44XX
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 9dd68fa..e2086d4 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -23,6 +23,10 @@ config ARCH_OMAP3
select CPU_V7
select COMMON_CLKDEV
+config ARCH_OMAP4
+ bool "TI OMAP4"
+ select CPU_V7
+
endchoice
comment "OMAP Feature Selections"
@@ -128,13 +132,13 @@ config OMAP_MPU_TIMER
config OMAP_32K_TIMER
bool "Use 32KHz timer"
- depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
+ depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP44XX
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
- currently only available for OMAP16XX, 24XX and 34XX.
+ currently only available for OMAP16XX, 24XX, 34XX and 44XX.
endchoice
@@ -149,7 +153,7 @@ config OMAP_32K_TIMER_HZ
config OMAP_DM_TIMER
bool "Use dual-mode timer"
- depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
+ depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP44XX
help
Select this option if you want to use OMAP Dual-Mode timers.
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 98b1442..7920d6a 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -155,6 +155,8 @@ IS_OMAP_SUBCLASS(343x, 0x343)
#define cpu_is_omap243x() 0
#define cpu_is_omap34xx() 0
#define cpu_is_omap343x() 0
+#define cpu_is_omap44xx() 0
+#define cpu_is_omap443x() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
@@ -348,12 +350,21 @@ IS_OMAP_TYPE(3430, 0x3430)
# define cpu_is_omap3430() is_omap3430()
#endif
+# if defined(CONFIG_ARCH_OMAP44XX)
+# undef cpu_is_omap44xx
+# undef cpu_is_omap443x
+# define cpu_is_omap44xx() 1
+# define cpu_is_omap443x() 1
+# endif
+
/* Macros to detect if we have OMAP1 or OMAP2 */
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
-#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
+#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
+ cpu_is_omap44xx())
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024
@@ -370,6 +381,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP3430_REV_ES3_0 0x34303034
#define OMAP3430_REV_ES3_1 0x34304034
+#define OMAP443X_CLASS 0x44300034
+
/*
* omap_chip bits
*
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP.
2009-04-21 13:08 [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Santosh Shilimkar
2009-04-21 18:14 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Tony Lindgren
2009-04-21 16:41 ` [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Kevin Hilman
1 sibling, 2 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch creates the bare minimal board files to support
OMAP_4430SDP. Additinaly new omap44xx.h is created which contains
the base addresses for OMAP4430.File omap34xx.h is adapted to avoid
multiple definitions of common omap base address definitions.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/board-4430sdp.c | 91 +++++++++++++++++++++++
arch/arm/plat-omap/include/mach/board-4430sdp.h | 28 +++++++
arch/arm/plat-omap/include/mach/hardware.h | 1 +
arch/arm/plat-omap/include/mach/omap34xx.h | 8 +-
arch/arm/plat-omap/include/mach/omap44xx.h | 61 +++++++++++++++
5 files changed, 185 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-4430sdp.c
create mode 100644 arch/arm/plat-omap/include/mach/board-4430sdp.h
create mode 100644 arch/arm/plat-omap/include/mach/omap44xx.h
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
new file mode 100644
index 0000000..157e9e4
--- /dev/null
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -0,0 +1,91 @@
+/*
+ * Board support file for OMAP4430 SDP.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * Based on mach-omap2/board-3430sdp.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/gpio.h>
+#include <mach/board.h>
+#include <mach/common.h>
+#include <mach/control.h>
+#include <asm/hardware/gic.h>
+
+static struct platform_device sdp4430_lcd_device = {
+ .name = "sdp4430_lcd",
+ .id = -1,
+};
+
+static struct platform_device *sdp4430_devices[] __initdata = {
+ &sdp4430_lcd_device,
+};
+
+static struct omap_uart_config sdp4430_uart_config __initdata = {
+ .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
+static struct omap_lcd_config sdp4430_lcd_config __initdata = {
+ .ctrl_name = "internal",
+};
+
+static struct omap_board_config_kernel sdp4430_config[] __initdata = {
+ { OMAP_TAG_UART, &sdp4430_uart_config },
+ { OMAP_TAG_LCD, &sdp4430_lcd_config },
+};
+
+static void __init gic_init_irq(void)
+{
+ gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
+ gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+}
+
+static void __init omap_4430sdp_init_irq(void)
+{
+ omap2_init_common_hw(NULL);
+ gic_init_irq();
+ omap_gpio_init();
+}
+
+
+static void __init omap_4430sdp_init(void)
+{
+ platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
+ omap_board_config = sdp4430_config;
+ omap_board_config_size = ARRAY_SIZE(sdp4430_config);
+ omap_serial_init();
+
+}
+
+static void __init omap_4430sdp_map_io(void)
+{
+ omap2_set_globals_443x();
+ omap2_map_common_io();
+}
+
+MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
+ /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
+ .phys_io = 0x48000000,
+ .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
+ .boot_params = 0x80000100,
+ .map_io = omap_4430sdp_map_io,
+ .init_irq = omap_4430sdp_init_irq,
+ .init_machine = omap_4430sdp_init,
+ .timer = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/plat-omap/include/mach/board-4430sdp.h b/arch/arm/plat-omap/include/mach/board-4430sdp.h
new file mode 100644
index 0000000..5296779
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/board-4430sdp.h
@@ -0,0 +1,28 @@
+/*
+ * Board support header for OMAP4430 SDP.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * Based on arch/arm/plat-omap/include/mach/board-3430sdp.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
+#define __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
+
+extern void sdp4430_flash_init(void);
+
+/* NAND */
+#define DEBUG_BASE 0x08000000 /* debug board */
+#define NAND_BASE 0x0C000000 /* NAND flash */
+#define ONENAND_MAP 0x20000000 /* OneNand flash */
+
+/* various memory sizes */
+#define FLASH_SIZE_SDPV1 SZ_64M
+#define FLASH_SIZE_SDPV2 SZ_128M
+#endif
+
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 3dc423e..26c1fbf 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -285,5 +285,6 @@
#include "omap16xx.h"
#include "omap24xx.h"
#include "omap34xx.h"
+#include "omap44xx.h"
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h
index ab64015..32f2bde 100644
--- a/arch/arm/plat-omap/include/mach/omap34xx.h
+++ b/arch/arm/plat-omap/include/mach/omap34xx.h
@@ -31,13 +31,9 @@
#define L4_34XX_BASE 0x48000000
#define L4_WK_34XX_BASE 0x48300000
-#define L4_WK_OMAP_BASE L4_WK_34XX_BASE
#define L4_PER_34XX_BASE 0x49000000
-#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
#define L4_EMU_34XX_BASE 0x54000000
-#define L4_EMU_BASE L4_EMU_34XX_BASE
#define L3_34XX_BASE 0x68000000
-#define L3_OMAP_BASE L3_34XX_BASE
#define OMAP3430_32KSYNCT_BASE 0x48320000
#define OMAP3430_CM_BASE 0x48004800
@@ -85,6 +81,10 @@
#if defined(CONFIG_ARCH_OMAP3430)
+#define L4_WK_OMAP_BASE L4_WK_34XX_BASE
+#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
+#define L4_EMU_BASE L4_EMU_34XX_BASE
+#define L3_OMAP_BASE L3_34XX_BASE
#define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE
#define OMAP2_CM_BASE OMAP3430_CM_BASE
#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
new file mode 100644
index 0000000..7852ea6
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -0,0 +1,61 @@
+/*
+ * Address mappings and base address for OMAP4 interconnects
+ * and peripherals.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_OMAP44XX_H
+#define __ASM_ARCH_OMAP44XX_H
+
+/*
+ * Please place only base defines here and put the rest in device
+ * specific headers.
+ */
+#define L4_44XX_BASE 0x4A000000
+#define L4_WK_44XX_BASE 0x4A300000
+#define L4_PER_44XX_BASE 0x48000000
+#define L4_EMU_44XX_BASE 0x54000000
+#define L3_44XX_BASE 0x44000000
+#define OMAP4430_32KSYNCT_BASE 0x4A304000
+#define OMAP4430_CM_BASE 0x4A004000
+#define OMAP4430_PRM_BASE 0x48306000
+#define OMAP44XX_GPMC_BASE 0x50000000
+#define OMAP443X_SCM_BASE 0x4A002000
+#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE
+#define OMAP44XX_IC_BASE 0x48200000
+#define OMAP44XX_IVA_INTC_BASE 0x40000000
+#define IRQ_SIR_IRQ 0x0040
+#define OMAP44XX_GIC_DIST_BASE 0x48241000
+#define OMAP44XX_GIC_CPU_BASE 0x48240100
+#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define OMAP44XX_SCU_BASE 0x48240000
+#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE)
+#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
+#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
+#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
+#define OMAP44XX_WKUPGEN_BASE 0x48281000
+#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
+
+/* Common macros between OMAPs */
+
+#if defined(CONFIG_ARCH_OMAP44XX)
+
+#define L4_WK_OMAP_BASE L4_WK_44XX_BASE
+#define L4_PER_OMAP_BASE L4_PER_44XX_BASE
+#define L4_EMU_BASE L4_EMU_44XX_BASE
+#define L3_OMAP_BASE L3_44XX_BASE
+#define OMAP2_32KSYNCT_BASE OMAP4430_32KSYNCT_BASE
+#define OMAP2_CM_BASE OMAP4430_CM_BASE
+#define OMAP2_PRM_BASE OMAP4430_PRM_BASE
+#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP44XX_IC_BASE)
+
+#endif
+
+#endif /* __ASM_ARCH_OMAP44XX_H */
+
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-21 13:08 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
2009-04-21 18:26 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Tony Lindgren
2009-04-21 18:14 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Tony Lindgren
1 sibling, 2 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch updates the common platform headers files for OMAP4430.
On OMAP4, GIC is used instead of INTC, hence all the private peripheral
interrupts are shifted by an offset of 32. So if the hardcoding is not
done for IRQ lines in drivers, then this change won't impact any driver.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/include/mach/common.h | 1 +
arch/arm/plat-omap/include/mach/control.h | 3 +-
arch/arm/plat-omap/include/mach/debug-macro.S | 2 +-
arch/arm/plat-omap/include/mach/dma.h | 1 +
arch/arm/plat-omap/include/mach/entry-macro.S | 45 +++++-
arch/arm/plat-omap/include/mach/io.h | 34 ++++
arch/arm/plat-omap/include/mach/irqs.h | 205 +++++++++++++------------
arch/arm/plat-omap/include/mach/memory.h | 3 +-
arch/arm/plat-omap/include/mach/serial.h | 11 ++-
arch/arm/plat-omap/include/mach/system.h | 7 +
10 files changed, 206 insertions(+), 106 deletions(-)
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index 0ecf36d..4b18833 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -62,6 +62,7 @@ struct omap_globals {
void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_343x(void);
+void omap2_set_globals_443x(void);
/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 269147f..c5f47cd 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -190,7 +190,8 @@
#define OMAP2_PBIASLITEVMODE0 (1 << 0)
#ifndef __ASSEMBLY__
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
extern void __iomem *omap_ctrl_base_get(void);
extern u8 omap_ctrl_readb(u16 offset);
extern u16 omap_ctrl_readw(u16 offset);
diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S
index 1b11f5c..662f08f 100644
--- a/arch/arm/plat-omap/include/mach/debug-macro.S
+++ b/arch/arm/plat-omap/include/mach/debug-macro.S
@@ -36,7 +36,7 @@
add \rx, \rx, #0x00004000 @ UART 3
#endif
-#elif CONFIG_ARCH_OMAP3
+#elif (CONFIG_ARCH_OMAP3 || CONFIG_ARCH_OMAP4)
moveq \rx, #0x48000000 @ physical base address
movne \rx, #0xd8000000 @ virtual base
orr \rx, \rx, #0x0006a000
diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h
index 54fe966..8e05b6a 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -48,6 +48,7 @@
/* Hardware registers for omap2 and omap3 */
#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000)
+#define OMAP44XX_DMA4_BASE (L4_44XX_BASE + 0x56000)
#define OMAP_DMA4_REVISION 0x00
#define OMAP_DMA4_GCR 0x78
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 2276f89..7a9d40e 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -10,6 +10,9 @@
#include <mach/hardware.h>
#include <mach/io.h>
#include <mach/irqs.h>
+#ifdef CONFIG_ARCH_OMAP44XX
+#include <asm/hardware/gic.h>
+#endif
#if defined(CONFIG_ARCH_OMAP1)
@@ -56,7 +59,8 @@
.endm
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
#if defined(CONFIG_ARCH_OMAP24XX)
#include <mach/omap24xx.h>
@@ -64,7 +68,9 @@
#if defined(CONFIG_ARCH_OMAP34XX)
#include <mach/omap34xx.h>
#endif
-
+#if defined(CONFIG_ARCH_OMAP44XX)
+#include <mach/omap44xx.h>
+#endif
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
@@ -77,6 +83,7 @@
.macro arch_ret_to_user, tmp1, tmp2
.endm
+#ifndef CONFIG_ARCH_OMAP44XX
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =OMAP2_VA_IC_BASE
ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
@@ -92,6 +99,40 @@
and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
.endm
+#else
+ /*
+ * The interrupt numbering scheme is defined in the
+ * interrupt controller spec. To wit:
+ *
+ * Interrupts 0-15 are IPI
+ * 16-28 are reserved
+ * 29-31 are local. We allow 30 to be used for the watchdog.
+ * 32-1020 are global
+ * 1021-1022 are reserved
+ * 1023 is "spurious" (no interrupt)
+ *
+ * For now, we ignore all local interrupts so only return an
+ * interrupt if it's between 30 and 1020. The test_for_ipi
+ * routine below will pick up on IPIs.
+ * A simple read from the controller will tell us the number
+ * of the highest priority enabled interrupt.
+ * We then just need to check whether it is in the
+ * valid range for an IRQ (30-1020 inclusive).
+ */
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ ldr \base, =OMAP44XX_VA_GIC_CPU_BASE
+ ldr \irqstat, [\base, #GIC_CPU_INTACK]
+
+ ldr \tmp, =1021
+
+ bic \irqnr, \irqstat, #0x1c00
+
+ cmp \irqnr, #29
+ cmpcc \irqnr, \irqnr
+ cmpne \irqnr, \tmp
+ cmpcs \irqnr, \irqnr
+ .endm
+#endif
.macro irq_prio_table
.endm
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 0610d7e..f786471 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -157,6 +157,40 @@
#define DSP_MMU_34XX_VIRT 0xe2000000
#define DSP_MMU_34XX_SIZE SZ_4K
+
+#elif defined(CONFIG_ARCH_OMAP4)
+/* We map both L3 and L4 on OMAP4 */
+#define L3_44XX_PHYS L3_44XX_BASE
+#define L3_44XX_VIRT 0xd4000000
+#define L3_44XX_SIZE SZ_1M
+
+#define L4_44XX_PHYS L4_44XX_BASE
+#define L4_44XX_VIRT 0xda000000
+#define L4_44XX_SIZE SZ_4M
+
+
+#define L4_WK_44XX_PHYS L4_WK_44XX_BASE
+#define L4_WK_44XX_VIRT 0xda300000
+#define L4_WK_44XX_SIZE SZ_1M
+
+#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
+#define L4_PER_44XX_VIRT 0xd8000000
+#define L4_PER_44XX_SIZE SZ_4M
+
+#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
+#define L4_EMU_44XX_VIRT 0xe4000000
+#define L4_EMU_44XX_SIZE SZ_64M
+
+#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
+#define OMAP44XX_GPMC_VIRT 0xe0000000
+#define OMAP44XX_GPMC_SIZE SZ_1M
+
+
+#define IO_OFFSET 0x90000000
+#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
+
#endif
#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index 7f57ee6..81d5ab7 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -318,109 +318,114 @@
#define INT_850_DMA_CH15 (62 + IH2_BASE)
#define INT_850_NAND (63 + IH2_BASE)
-#define INT_24XX_SYS_NIRQ 7
-#define INT_24XX_SDMA_IRQ0 12
-#define INT_24XX_SDMA_IRQ1 13
-#define INT_24XX_SDMA_IRQ2 14
-#define INT_24XX_SDMA_IRQ3 15
-#define INT_24XX_CAM_IRQ 24
-#define INT_24XX_DSS_IRQ 25
-#define INT_24XX_MAIL_U0_MPU 26
-#define INT_24XX_DSP_UMA 27
-#define INT_24XX_DSP_MMU 28
-#define INT_24XX_GPIO_BANK1 29
-#define INT_24XX_GPIO_BANK2 30
-#define INT_24XX_GPIO_BANK3 31
-#define INT_24XX_GPIO_BANK4 32
-#define INT_24XX_GPIO_BANK5 33
-#define INT_24XX_MAIL_U3_MPU 34
-#define INT_24XX_GPTIMER1 37
-#define INT_24XX_GPTIMER2 38
-#define INT_24XX_GPTIMER3 39
-#define INT_24XX_GPTIMER4 40
-#define INT_24XX_GPTIMER5 41
-#define INT_24XX_GPTIMER6 42
-#define INT_24XX_GPTIMER7 43
-#define INT_24XX_GPTIMER8 44
-#define INT_24XX_GPTIMER9 45
-#define INT_24XX_GPTIMER10 46
-#define INT_24XX_GPTIMER11 47
-#define INT_24XX_GPTIMER12 48
-#define INT_24XX_SHA1MD5 51
-#define INT_24XX_MCBSP4_IRQ_TX 54
-#define INT_24XX_MCBSP4_IRQ_RX 55
-#define INT_24XX_I2C1_IRQ 56
-#define INT_24XX_I2C2_IRQ 57
-#define INT_24XX_HDQ_IRQ 58
-#define INT_24XX_MCBSP1_IRQ_TX 59
-#define INT_24XX_MCBSP1_IRQ_RX 60
-#define INT_24XX_MCBSP2_IRQ_TX 62
-#define INT_24XX_MCBSP2_IRQ_RX 63
-#define INT_24XX_SPI1_IRQ 65
-#define INT_24XX_SPI2_IRQ 66
-#define INT_24XX_UART1_IRQ 72
-#define INT_24XX_UART2_IRQ 73
-#define INT_24XX_UART3_IRQ 74
-#define INT_24XX_USB_IRQ_GEN 75
-#define INT_24XX_USB_IRQ_NISO 76
-#define INT_24XX_USB_IRQ_ISO 77
-#define INT_24XX_USB_IRQ_HGEN 78
-#define INT_24XX_USB_IRQ_HSOF 79
-#define INT_24XX_USB_IRQ_OTG 80
-#define INT_24XX_MCBSP5_IRQ_TX 81
-#define INT_24XX_MCBSP5_IRQ_RX 82
-#define INT_24XX_MMC_IRQ 83
-#define INT_24XX_MMC2_IRQ 86
-#define INT_24XX_MCBSP3_IRQ_TX 89
-#define INT_24XX_MCBSP3_IRQ_RX 90
-#define INT_24XX_SPI3_IRQ 91
+#ifdef CONFIG_ARCH_OMAP4
+#define IRQ_GIC_START 32
+#else
+#define IRQ_GIC_START 0
+#endif
-#define INT_243X_MCBSP2_IRQ 16
-#define INT_243X_MCBSP3_IRQ 17
-#define INT_243X_MCBSP4_IRQ 18
-#define INT_243X_MCBSP5_IRQ 19
-#define INT_243X_MCBSP1_IRQ 64
-#define INT_243X_HS_USB_MC 92
-#define INT_243X_HS_USB_DMA 93
-#define INT_243X_CARKIT_IRQ 94
+#define INT_24XX_SYS_NIRQ (7 + IRQ_GIC_START)
+#define INT_24XX_SDMA_IRQ0 (12 + IRQ_GIC_START)
+#define INT_24XX_SDMA_IRQ1 (13 + IRQ_GIC_START)
+#define INT_24XX_SDMA_IRQ2 (14 + IRQ_GIC_START)
+#define INT_24XX_SDMA_IRQ3 (15 + IRQ_GIC_START)
+#define INT_24XX_CAM_IRQ (24 + IRQ_GIC_START)
+#define INT_24XX_DSS_IRQ (25 + IRQ_GIC_START)
+#define INT_24XX_MAIL_U0_MPU (26 + IRQ_GIC_START)
+#define INT_24XX_DSP_UMA (27 + IRQ_GIC_START)
+#define INT_24XX_DSP_MMU (28 + IRQ_GIC_START)
+#define INT_24XX_GPIO_BANK1 (29 + IRQ_GIC_START)
+#define INT_24XX_GPIO_BANK2 (30 + IRQ_GIC_START)
+#define INT_24XX_GPIO_BANK3 (31 + IRQ_GIC_START)
+#define INT_24XX_GPIO_BANK4 (32 + IRQ_GIC_START)
+#define INT_24XX_GPIO_BANK5 (33 + IRQ_GIC_START)
+#define INT_24XX_MAIL_U3_MPU (34 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER1 (37 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER2 (38 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER3 (39 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER4 (40 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER5 (41 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER6 (42 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER7 (43 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER8 (44 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER9 (45 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER10 (46 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER11 (47 + IRQ_GIC_START)
+#define INT_24XX_GPTIMER12 (48 + IRQ_GIC_START)
+#define INT_24XX_SHA1MD5 (51 + IRQ_GIC_START)
+#define INT_24XX_MCBSP4_IRQ_TX (54 + IRQ_GIC_START)
+#define INT_24XX_MCBSP4_IRQ_RX (55 + IRQ_GIC_START)
+#define INT_24XX_I2C1_IRQ (56 + IRQ_GIC_START)
+#define INT_24XX_I2C2_IRQ (57 + IRQ_GIC_START)
+#define INT_24XX_HDQ_IRQ (58 + IRQ_GIC_START)
+#define INT_24XX_MCBSP1_IRQ_TX (59 + IRQ_GIC_START)
+#define INT_24XX_MCBSP1_IRQ_RX (60 + IRQ_GIC_START)
+#define INT_24XX_MCBSP2_IRQ_TX (62 + IRQ_GIC_START)
+#define INT_24XX_MCBSP2_IRQ_RX (63 + IRQ_GIC_START)
+#define INT_24XX_SPI1_IRQ (65 + IRQ_GIC_START)
+#define INT_24XX_SPI2_IRQ (66 + IRQ_GIC_START)
+#define INT_24XX_UART1_IRQ (72 + IRQ_GIC_START)
+#define INT_24XX_UART2_IRQ (73 + IRQ_GIC_START)
+#define INT_24XX_UART3_IRQ (74 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_GEN (75 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_NISO (76 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_ISO (77 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_HGEN (78 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_HSOF (79 + IRQ_GIC_START)
+#define INT_24XX_USB_IRQ_OTG (80 + IRQ_GIC_START)
+#define INT_24XX_MCBSP5_IRQ_TX (81 + IRQ_GIC_START)
+#define INT_24XX_MCBSP5_IRQ_RX (82 + IRQ_GIC_START)
+#define INT_24XX_MMC_IRQ (83 + IRQ_GIC_START)
+#define INT_24XX_MMC2_IRQ (86 + IRQ_GIC_START)
+#define INT_24XX_MCBSP3_IRQ_TX (89 + IRQ_GIC_START)
+#define INT_24XX_MCBSP3_IRQ_RX (90 + IRQ_GIC_START)
+#define INT_24XX_SPI3_IRQ (91 + IRQ_GIC_START)
-#define INT_34XX_BENCH_MPU_EMUL 3
-#define INT_34XX_ST_MCBSP2_IRQ 4
-#define INT_34XX_ST_MCBSP3_IRQ 5
-#define INT_34XX_SSM_ABORT_IRQ 6
-#define INT_34XX_SYS_NIRQ 7
-#define INT_34XX_D2D_FW_IRQ 8
-#define INT_34XX_PRCM_MPU_IRQ 11
-#define INT_34XX_MCBSP1_IRQ 16
-#define INT_34XX_MCBSP2_IRQ 17
-#define INT_34XX_MCBSP3_IRQ 22
-#define INT_34XX_MCBSP4_IRQ 23
-#define INT_34XX_CAM_IRQ 24
-#define INT_34XX_MCBSP5_IRQ 27
-#define INT_34XX_GPIO_BANK1 29
-#define INT_34XX_GPIO_BANK2 30
-#define INT_34XX_GPIO_BANK3 31
-#define INT_34XX_GPIO_BANK4 32
-#define INT_34XX_GPIO_BANK5 33
-#define INT_34XX_GPIO_BANK6 34
-#define INT_34XX_USIM_IRQ 35
-#define INT_34XX_WDT3_IRQ 36
-#define INT_34XX_SPI4_IRQ 48
-#define INT_34XX_SHA1MD52_IRQ 49
-#define INT_34XX_FPKA_READY_IRQ 50
-#define INT_34XX_SHA1MD51_IRQ 51
-#define INT_34XX_RNG_IRQ 52
-#define INT_34XX_I2C3_IRQ 61
-#define INT_34XX_FPKA_ERROR_IRQ 64
-#define INT_34XX_PBIAS_IRQ 75
-#define INT_34XX_OHCI_IRQ 76
-#define INT_34XX_EHCI_IRQ 77
-#define INT_34XX_TLL_IRQ 78
-#define INT_34XX_PARTHASH_IRQ 79
-#define INT_34XX_MMC3_IRQ 94
-#define INT_34XX_GPT12_IRQ 95
+#define INT_243X_MCBSP2_IRQ (16 + IRQ_GIC_START)
+#define INT_243X_MCBSP3_IRQ (17 + IRQ_GIC_START)
+#define INT_243X_MCBSP4_IRQ (18 + IRQ_GIC_START)
+#define INT_243X_MCBSP5_IRQ (19 + IRQ_GIC_START)
+#define INT_243X_MCBSP1_IRQ (64 + IRQ_GIC_START)
+#define INT_243X_HS_USB_MC (92 + IRQ_GIC_START)
+#define INT_243X_HS_USB_DMA (93 + IRQ_GIC_START)
+#define INT_243X_CARKIT_IRQ (94 + IRQ_GIC_START)
-#define INT_34XX_BENCH_MPU_EMUL 3
+#define INT_34XX_BENCH_MPU_EMUL (3 + IRQ_GIC_START)
+#define INT_34XX_ST_MCBSP2_IRQ (4 + IRQ_GIC_START)
+#define INT_34XX_ST_MCBSP3_IRQ (5 + IRQ_GIC_START)
+#define INT_34XX_SSM_ABORT_IRQ (6 + IRQ_GIC_START)
+#define INT_34XX_SYS_NIRQ (7 + IRQ_GIC_START)
+#define INT_34XX_D2D_FW_IRQ (8 + IRQ_GIC_START)
+#define INT_34XX_PRCM_MPU_IRQ (11 + IRQ_GIC_START)
+#define INT_34XX_MCBSP1_IRQ (16 + IRQ_GIC_START)
+#define INT_34XX_MCBSP2_IRQ (17 + IRQ_GIC_START)
+#define INT_34XX_MCBSP3_IRQ (22 + IRQ_GIC_START)
+#define INT_34XX_MCBSP4_IRQ (23 + IRQ_GIC_START)
+#define INT_34XX_CAM_IRQ (24 + IRQ_GIC_START)
+#define INT_34XX_MCBSP5_IRQ (27 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK1 (29 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK2 (30 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK3 (31 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK4 (32 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK5 (33 + IRQ_GIC_START)
+#define INT_34XX_GPIO_BANK6 (34 + IRQ_GIC_START)
+#define INT_34XX_USIM_IRQ (35 + IRQ_GIC_START)
+#define INT_34XX_WDT3_IRQ (36 + IRQ_GIC_START)
+#define INT_34XX_SPI4_IRQ (48 + IRQ_GIC_START)
+#define INT_34XX_SHA1MD52_IRQ (49 + IRQ_GIC_START)
+#define INT_34XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
+#define INT_34XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
+#define INT_34XX_RNG_IRQ (52 + IRQ_GIC_START)
+#define INT_34XX_I2C3_IRQ (61 + IRQ_GIC_START)
+#define INT_34XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
+#define INT_34XX_PBIAS_IRQ (75 + IRQ_GIC_START)
+#define INT_34XX_OHCI_IRQ (76 + IRQ_GIC_START)
+#define INT_34XX_EHCI_IRQ (77 + IRQ_GIC_START)
+#define INT_34XX_TLL_IRQ (78 + IRQ_GIC_START)
+#define INT_34XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
+#define INT_34XX_MMC3_IRQ (94 + IRQ_GIC_START)
+#define INT_34XX_GPT12_IRQ (95 + IRQ_GIC_START)
+#define INT_44XX_SPI5_IRQ (69 + IRQ_GIC_START)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index 99ed564..9ad41dc 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -38,7 +38,8 @@
*/
#if defined(CONFIG_ARCH_OMAP1)
#define PHYS_OFFSET UL(0x10000000)
-#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
#define PHYS_OFFSET UL(0x80000000)
#endif
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index 8a676a0..ed4738b 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -15,19 +15,28 @@
#define OMAP_UART1_BASE 0xfffb0000
#define OMAP_UART2_BASE 0xfffb0800
#define OMAP_UART3_BASE 0xfffb9800
+#define OMAP_MAX_NR_PORTS 3
#elif defined(CONFIG_ARCH_OMAP2)
/* OMAP2 serial ports */
#define OMAP_UART1_BASE 0x4806a000
#define OMAP_UART2_BASE 0x4806c000
#define OMAP_UART3_BASE 0x4806e000
+#define OMAP_MAX_NR_PORTS 3
#elif defined(CONFIG_ARCH_OMAP3)
/* OMAP3 serial ports */
#define OMAP_UART1_BASE 0x4806a000
#define OMAP_UART2_BASE 0x4806c000
#define OMAP_UART3_BASE 0x49020000
+#define OMAP_MAX_NR_PORTS 3
+#elif defined(CONFIG_ARCH_OMAP4)
+/* OMAP4 serial ports */
+#define OMAP_UART1_BASE 0x4806a000
+#define OMAP_UART2_BASE 0x4806c000
+#define OMAP_UART3_BASE 0x48020000
+#define OMAP_UART4_BASE 0x4806e000
+#define OMAP_MAX_NR_PORTS 4
#endif
-#define OMAP_MAX_NR_PORTS 3
#define OMAP1510_BASE_BAUD (12000000/16)
#define OMAP16XX_BASE_BAUD (48000000/16)
#define OMAP24XX_BASE_BAUD (48000000/16)
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index 1060e34..371f98a 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -48,4 +48,11 @@ static inline void arch_reset(char mode, const char *cmd)
omap_prcm_arch_reset(mode);
}
+#ifdef CONFIG_ARCH_OMAP4
+void omap_prcm_arch_reset(char mode)
+{
+ /* dummy hook for Linking */
+}
+#endif
+
#endif
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources.
2009-04-21 13:08 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
` (2 more replies)
2009-04-21 18:26 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Tony Lindgren
1 sibling, 3 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch updates the common platform source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/common.c | 29 +++++++++++-
arch/arm/plat-omap/devices.c | 2 +
arch/arm/plat-omap/dma.c | 10 +++-
arch/arm/plat-omap/dmtimer.c | 42 +++++++++++++++--
arch/arm/plat-omap/gpio.c | 109 ++++++++++++++++++++++++++++-------------
arch/arm/plat-omap/io.c | 18 +++++++-
arch/arm/plat-omap/mux.c | 3 +
arch/arm/plat-omap/sram.c | 20 ++++++++
8 files changed, 189 insertions(+), 44 deletions(-)
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d179714..ca2c382 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -177,7 +177,8 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
-#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
#endif
@@ -252,6 +253,16 @@ static void __init __omap2_set_globals(void)
#endif
+#if defined(CONFIG_ARCH_OMAP4) /* sdrc and sms are not needed on omap4*/
+static struct omap_globals *omap2_globals;
+
+static void __init __omap2_set_globals(void)
+{
+ omap2_set_globals_tap(omap2_globals);
+ omap2_set_globals_control(omap2_globals);
+}
+#endif
+
#if defined(CONFIG_ARCH_OMAP2420)
static struct omap_globals omap242x_globals = {
@@ -309,3 +320,19 @@ void __init omap2_set_globals_343x(void)
}
#endif
+#if defined(CONFIG_ARCH_OMAP4430)
+static struct omap_globals omap443x_globals = {
+ .class = OMAP443X_CLASS,
+ .tap = OMAP2_IO_ADDRESS(0x4830A000),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
+ .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
+};
+
+void __init omap2_set_globals_443x(void)
+{
+ omap2_globals = &omap443x_globals;
+ __omap2_set_globals();
+}
+#endif
+
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 87fb7ff..a016c6c 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -311,6 +311,8 @@ static void omap_init_wdt(void)
wdt_resources[0].start = 0x49016000; /* WDT2 */
else if (cpu_is_omap343x())
wdt_resources[0].start = 0x48314000; /* WDT2 */
+ else if (cpu_is_omap44xx())
+ wdt_resources[0].start = 0x4A314000;
else
return;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 21cc014..36d066d 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
}
l = dma_read(CCR(lch));
l &= ~((1 << 6) | (1 << 26));
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
else
l |= ((read_prio & 0x1) << 6);
@@ -1824,7 +1824,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
#define omap1_dma_irq_handler NULL
#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
static int omap2_dma_handle_ch(int ch)
{
@@ -2319,6 +2320,9 @@ static int __init omap_init_dma(void)
} else if (cpu_is_omap34xx()) {
omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
+ } else if (cpu_is_omap44xx()) {
+ omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+ dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
} else {
pr_err("DMA init failed for unsupported omap\n");
return -ENODEV;
@@ -2417,7 +2421,7 @@ static int __init omap_init_dma(void)
}
}
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
DMA_DEFAULT_FIFO_DEPTH, 0);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index bfd4757..d0e2119 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -150,7 +150,8 @@
struct omap_dm_timer {
unsigned long phys_base;
int irq;
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
struct clk *iclk, *fclk;
#endif
void __iomem *io_base;
@@ -250,6 +251,37 @@ static const char *omap3_dm_source_names[] __initdata = {
static struct clk **omap3_dm_source_clocks[2];
static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
+#elif defined(CONFIG_ARCH_OMAP4)
+
+#define omap_dm_clk_enable(x) clk_enable(x)
+#define omap_dm_clk_disable(x) clk_disable(x)
+#define omap1_dm_timers NULL
+#define omap2_dm_timers NULL
+#define omap2_dm_source_names NULL
+#define omap2_dm_source_clocks NULL
+
+static struct omap_dm_timer omap3_dm_timers[] = {
+ { .phys_base = 0x4A318000, .irq = INT_24XX_GPTIMER1 },
+ { .phys_base = 0x48032000, .irq = INT_24XX_GPTIMER2 },
+ { .phys_base = 0x48034000, .irq = INT_24XX_GPTIMER3 },
+ { .phys_base = 0x48036000, .irq = INT_24XX_GPTIMER4 },
+ { .phys_base = 0x40138000, .irq = INT_24XX_GPTIMER5 },
+ { .phys_base = 0x4013A000, .irq = INT_24XX_GPTIMER6 },
+ { .phys_base = 0x4013C000, .irq = INT_24XX_GPTIMER7 },
+ { .phys_base = 0x4013E000, .irq = INT_24XX_GPTIMER8 },
+ { .phys_base = 0x4803E000, .irq = INT_24XX_GPTIMER9 },
+ { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
+ { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
+ { .phys_base = 0x4A320000, .irq = INT_24XX_GPTIMER12 },
+};
+static const char *omap3_dm_source_names[] __initdata = {
+ "sys_ck",
+ "omap_32k_fck",
+ NULL
+};
+static struct clk **omap3_dm_source_clocks[2];
+static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
+
#else
#error OMAP architecture not supported!
@@ -461,7 +493,8 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
-#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
+#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
@@ -701,7 +734,7 @@ int __init omap_dm_timer_init(void)
dm_timers = omap2_dm_timers;
dm_source_names = (char **)omap2_dm_source_names;
dm_source_clocks = (struct clk **)omap2_dm_source_clocks;
- } else if (cpu_is_omap34xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
dm_timers = omap3_dm_timers;
dm_source_names = (char **)omap3_dm_source_names;
dm_source_clocks = (struct clk **)omap3_dm_source_clocks;
@@ -717,7 +750,8 @@ int __init omap_dm_timer_init(void)
for (i = 0; i < dm_timer_count; i++) {
timer = &dm_timers[i];
timer->io_base = IO_ADDRESS(timer->phys_base);
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
if (cpu_class_is_omap2()) {
char clk_name[16];
sprintf(clk_name, "gpt%d_ick", i + 1);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d3fa41e..8bfc819 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -136,15 +136,24 @@
#define OMAP24XX_GPIO_SETDATAOUT 0x0094
/*
- * omap34xx specific GPIO registers
+ * omap34xx, omap44xx specific GPIO registers
*/
+#ifdef CONFIG_ARCH_OMAP4430
+#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x4A310000)
+#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x48055000)
+#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x48057000)
+#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x48059000)
+#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x4805B000)
+#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x4805D000)
+#else
#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000)
#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000)
#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000)
#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000)
#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
+#endif
#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
@@ -153,11 +162,13 @@ struct gpio_bank {
u16 irq;
u16 virtual_irq_start;
int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
+ defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
u32 suspend_wakeup;
u32 saved_wakeup;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
@@ -239,7 +250,7 @@ static struct gpio_bank gpio_bank_243x[5] = {
#endif
-#ifdef CONFIG_ARCH_OMAP34XX
+#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
static struct gpio_bank gpio_bank_34xx[6] = {
{ OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
{ OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
@@ -275,6 +286,8 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
return &gpio_bank[gpio >> 5];
if (cpu_is_omap34xx())
return &gpio_bank[gpio >> 5];
+ if (cpu_is_omap44xx())
+ return &gpio_bank[gpio >> 5];
BUG();
return NULL;
}
@@ -287,6 +300,8 @@ static inline int get_gpio_index(int gpio)
return gpio & 0x1f;
if (cpu_is_omap34xx())
return gpio & 0x1f;
+ if (cpu_is_omap44xx())
+ return gpio & 0x1f;
return gpio & 0x0f;
}
@@ -309,6 +324,8 @@ static inline int gpio_valid(int gpio)
return 0;
if (cpu_is_omap34xx() && gpio < 160)
return 0;
+ if (cpu_is_omap44xx() && gpio < 160)
+ return 0;
return -1;
}
@@ -353,7 +370,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
reg += OMAP850_GPIO_DIR_CONTROL;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
break;
@@ -425,7 +443,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
l &= ~(1 << gpio);
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -476,7 +495,8 @@ static int __omap_get_gpio_datain(int gpio)
reg += OMAP850_GPIO_DATA_INPUT;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN;
break;
@@ -520,7 +540,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
else
goto done;
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
if (enable)
clk_enable(bank->dbck);
else
@@ -550,7 +570,8 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
}
EXPORT_SYMBOL(omap_set_gpio_debounce_time);
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
int trigger)
{
@@ -660,7 +681,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
goto bad;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
set_24xx_gpio_triggering(bank, gpio, trigger);
break;
@@ -745,7 +767,8 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
reg += OMAP850_GPIO_INT_STATUS;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQSTATUS1;
break;
@@ -810,7 +833,8 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
inv = 1;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQENABLE1;
mask = 0xffffffff;
@@ -883,7 +907,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
l |= gpio_mask;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -931,7 +956,8 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
if (bank->non_wakeup_gpios & (1 << gpio)) {
printk(KERN_ERR "Unable to modify wakeup on "
@@ -1019,7 +1045,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
if (bank->method == METHOD_GPIO_24XX) {
/* Disable wake-up during idle for dynamic tick */
void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -1071,7 +1098,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (bank->method == METHOD_GPIO_850)
isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
if (bank->method == METHOD_GPIO_24XX)
isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
#endif
@@ -1348,7 +1376,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
/*---------------------------------------------------------------------*/
static int initialized;
-#if !defined(CONFIG_ARCH_OMAP3)
+#if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4))
static struct clk * gpio_ick;
#endif
@@ -1361,7 +1389,7 @@ static struct clk * gpio5_ick;
static struct clk * gpio5_fck;
#endif
-#if defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
#endif
@@ -1421,8 +1449,8 @@ static int __init _omap_gpio_init(void)
}
#endif
-#if defined(CONFIG_ARCH_OMAP3)
- if (cpu_is_omap34xx()) {
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
sprintf(clk_name, "gpio%d_ick", i + 1);
gpio_iclks[i] = clk_get(NULL, clk_name);
@@ -1488,8 +1516,8 @@ static int __init _omap_gpio_init(void)
(rev >> 4) & 0x0f, rev & 0x0f);
}
#endif
-#ifdef CONFIG_ARCH_OMAP34XX
- if (cpu_is_omap34xx()) {
+#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
int rev;
gpio_bank_count = OMAP34XX_NR_GPIOS;
@@ -1522,7 +1550,8 @@ static int __init _omap_gpio_init(void)
gpio_count = 32; /* 730 has 32-bit GPIOs */
}
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
if (bank->method == METHOD_GPIO_24XX) {
static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040
@@ -1579,7 +1608,7 @@ static int __init _omap_gpio_init(void)
set_irq_chained_handler(bank->irq, gpio_irq_handler);
set_irq_data(bank->irq, bank);
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
sprintf(clk_name, "gpio%d_dbck", i + 1);
bank->dbck = clk_get(NULL, clk_name);
if (IS_ERR(bank->dbck))
@@ -1601,7 +1630,8 @@ static int __init _omap_gpio_init(void)
return 0;
}
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
+ defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{
int i;
@@ -1624,7 +1654,8 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -1665,7 +1696,8 @@ static int omap_gpio_resume(struct sys_device *dev)
wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
break;
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
case METHOD_GPIO_24XX:
wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
@@ -1697,7 +1729,8 @@ static struct sys_device omap_gpio_device = {
#endif
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
static int workaround_enabled;
@@ -1713,7 +1746,8 @@ void omap2_gpio_prepare_for_retention(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
@@ -1722,7 +1756,8 @@ void omap2_gpio_prepare_for_retention(void)
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
__raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
#endif
@@ -1747,7 +1782,8 @@ void omap2_gpio_resume_after_retention(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
__raw_writel(bank->saved_fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(bank->saved_risingdetect,
@@ -1757,14 +1793,16 @@ void omap2_gpio_resume_after_retention(void)
* state. If so, generate an IRQ by software. This is
* horribly racy, but it's the best we can do to work around
* this silicon bug. */
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
#endif
l ^= bank->saved_datain;
l &= bank->non_wakeup_gpios;
if (l) {
u32 old0, old1;
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP44XX)
old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
@@ -1800,7 +1838,8 @@ static int __init omap_gpio_sysinit(void)
mpuio_init();
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
+ defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
if (ret == 0) {
ret = sysdev_class_register(&omap_gpio_sysclass);
@@ -1889,7 +1928,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
irqstat = irq_desc[irq].status;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
- defined(CONFIG_ARCH_OMAP34XX)
+ defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
if (is_in && ((bank->suspend_wakeup & mask)
|| irqstat & IRQ_TYPE_SENSE_MASK)) {
char *trigger = NULL;
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index af326ef..a46f328 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -7,6 +7,7 @@
#include <mach/omap16xx.h>
#include <mach/omap24xx.h>
#include <mach/omap34xx.h>
+#include <mach/omap44xx.h>
#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
@@ -92,7 +93,22 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
}
#endif
-
+#ifdef CONFIG_ARCH_OMAP4
+ if (cpu_is_omap44xx()) {
+ if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
+ return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
+ if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
+ return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
+ if (BETWEEN(p, L4_WK_44XX_PHYS, L4_WK_44XX_SIZE))
+ return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT);
+ if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
+ return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
+ if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
+ return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
+ if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
+ return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
+ }
+#endif
return __arm_ioremap(p, size, type);
}
EXPORT_SYMBOL(omap_ioremap);
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 80b040f..8d329fb 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -54,6 +54,9 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
{
struct pin_config *reg;
+ if (cpu_is_omap44xx())
+ return 0;
+
if (mux_cfg == NULL) {
printk(KERN_ERR "Pin mux table not initialized\n");
return -ENODEV;
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index fa5297d..4f45d6c 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -44,6 +44,8 @@
#define OMAP3_SRAM_VA 0xd7000000
#define OMAP3_SRAM_PUB_PA 0x40208000
#define OMAP3_SRAM_PUB_VA 0xd7008000
+#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/
+#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#define SRAM_BOOTLOADER_SZ 0x00
@@ -87,6 +89,10 @@ static int is_sram_locked(void)
{
int type = 0;
+ if (cpu_is_omap44xx())
+ /* Not yet supported */
+ return 0;
+
if (cpu_is_omap242x())
type = omap_rev() & OMAP2_DEVICETYPE_MASK;
@@ -135,6 +141,10 @@ void __init omap_detect_sram(void)
omap_sram_base = OMAP3_SRAM_VA;
omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */
+ } else if (cpu_is_omap44xx()) {
+ omap_sram_base = OMAP4_SRAM_VA;
+ omap_sram_start = OMAP4_SRAM_PA;
+ omap_sram_size = 0x8000; /* 32K */
} else {
omap_sram_base = OMAP2_SRAM_VA;
omap_sram_start = OMAP2_SRAM_PA;
@@ -203,6 +213,12 @@ void __init omap_map_sram(void)
omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
}
+ if (cpu_is_omap44xx()) {
+ omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
+ base = OMAP4_SRAM_PA;
+ base = ROUND_DOWN(base, PAGE_SIZE);
+ omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
+ }
omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
@@ -242,10 +258,12 @@ void * omap_sram_push(void * start, unsigned long size)
return (void *)omap_sram_ceil;
}
+#ifndef CONFIG_ARCH_OMAP4 /* to remove compile time warning */
static void omap_sram_error(void)
{
panic("Uninitialized SRAM function\n");
}
+#endif
#ifdef CONFIG_ARCH_OMAP1
@@ -406,6 +424,8 @@ int __init omap_sram_init(void)
omap243x_sram_init();
else if (cpu_is_omap34xx())
omap34xx_sram_init();
+ else if (cpu_is_omap44xx())
+ omap34xx_sram_init(); /* REVISIT: */
return 0;
}
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources.
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
` (3 more replies)
2009-04-21 13:21 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Premi, Sanjeev
2009-04-21 18:33 ` Tony Lindgren
2 siblings, 4 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch updates the common machine spcific source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture. Lot of code
gets re-used because of this.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/gpmc.c | 3 ++
arch/arm/mach-omap2/id.c | 5 +++-
arch/arm/mach-omap2/io.c | 48 ++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/timer-gp.c | 6 ++++-
4 files changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2249049..07aea04 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -424,6 +424,9 @@ void __init gpmc_init(void)
} else if (cpu_is_omap34xx()) {
ck = "gpmc_fck";
l = OMAP34XX_GPMC_BASE;
+ } else if (cpu_is_omap44xx()) {
+ ck = "gpmc_fck";
+ l = OMAP44XX_GPMC_BASE;
}
gpmc_l3_clk = clk_get(NULL, ck);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 34b5914..f69384d 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -196,7 +196,10 @@ void __init omap2_check_revision(void)
* At this point we have an idea about the processor revision set
* earlier with omap2_set_globals_tap().
*/
- if (cpu_is_omap24xx())
+ if (cpu_is_omap44xx()) {
+ printk(KERN_INFO "CPU revision = OMAP4430\n"); /* Fix Me*/
+ return;
+ } else if (cpu_is_omap24xx())
omap24xx_check_revision();
else if (cpu_is_omap34xx())
omap34xx_check_revision();
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 916fcd3..3f7a7f5 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -30,6 +30,7 @@
#include <mach/sdrc.h>
#include <mach/gpmc.h>
+#ifndef CONFIG_ARCH_OMAP4 /* Clock framework is still not supported for OMAP4*/
#include "clock.h"
#include <mach/powerdomain.h>
@@ -38,6 +39,7 @@
#include <mach/clockdomain.h>
#include "clockdomains.h"
+#endif
/*
* The machine specific code may provide the extra mapping besides the
@@ -166,6 +168,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
},
};
#endif
+#ifdef CONFIG_ARCH_OMAP44XX
+static struct map_desc omap44xx_io_desc[] __initdata = {
+ {
+ .virtual = L3_44XX_VIRT,
+ .pfn = __phys_to_pfn(L3_44XX_PHYS),
+ .length = L3_44XX_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = L4_44XX_VIRT,
+ .pfn = __phys_to_pfn(L4_44XX_PHYS),
+ .length = L4_44XX_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = L4_WK_44XX_VIRT,
+ .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
+ .length = L4_WK_44XX_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = OMAP44XX_GPMC_VIRT,
+ .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
+ .length = OMAP44XX_GPMC_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = L4_PER_44XX_VIRT,
+ .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
+ .length = L4_PER_44XX_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = L4_EMU_44XX_VIRT,
+ .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
+ .length = L4_EMU_44XX_SIZE,
+ .type = MT_DEVICE
+ },
+};
+#endif
void __init omap2_map_common_io(void)
{
@@ -183,6 +225,10 @@ void __init omap2_map_common_io(void)
iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
#endif
+#if defined(CONFIG_ARCH_OMAP44XX)
+ iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
+#endif
+
/* Normally devicemaps_init() would flush caches and tlb after
* mdesc->map_io(), but we must also do it here because of the CPU
* revision check below.
@@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
{
omap2_mux_init();
+#ifndef CONFIG_ARCH_OMAP4 /* REVISIT: to avoid build errors */
pwrdm_init(powerdomains_omap);
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
omap2_clk_init();
omap2_sdrc_init(sp);
+#endif
gpmc_init();
}
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 9fc13a2..f9f41df 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -75,7 +75,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_PERIODIC:
period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
period -= 1;
-
+ if (cpu_is_omap44xx())
+ period = 0xFF;
omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
break;
case CLOCK_EVT_MODE_ONESHOT:
@@ -108,6 +109,9 @@ static void __init omap2_gp_clockevent_init(void)
omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
#endif
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
+ if (cpu_is_omap44xx())
+ /* Assuming 32kHz clk is driving GPT1 */
+ tick_rate = 32768;
omap2_gp_timer_irq.dev_id = (void *)gptimer;
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in.
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 7/7][RFC] OMAP4: Enable basic build support Santosh Shilimkar
2009-04-21 18:37 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Tony Lindgren
2009-04-21 13:24 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Dasgupta, Romit
` (2 subsequent siblings)
3 siblings, 2 replies; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch update the cooomon clock.c file for OMAP4. The clk_get() and
clk_put() sunctions are moved to common place in arch/arm/common/clkdev.c
Since on current OMAP$ platform clk management is still not supported, the
internal file is hacked.
Once the framework is ready the CONFIG_CLKDEV will be used.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/clock.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 2e06145..7eb96a0 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,10 +36,30 @@ static struct clk_functions *arch_clock;
* Standard clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
+/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
+ * clock framework is not up , it is defined here to avoid rework in
+ * every driver */
+
+/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
+#if defined(CONFIG_ARCH_OMAP4)
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+#endif
int clk_enable(struct clk *clk)
{
unsigned long flags;
int ret = 0;
+ if (cpu_is_omap44xx())
+ /* OMAP4 clk framework not supported yet */
+ return 0;
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
@@ -56,6 +76,9 @@ EXPORT_SYMBOL(clk_enable);
void clk_disable(struct clk *clk)
{
unsigned long flags;
+ if (cpu_is_omap44xx())
+ /* OMAP4 clk framework not supported yet */
+ return ;
if (clk == NULL || IS_ERR(clk))
return;
@@ -80,6 +103,9 @@ unsigned long clk_get_rate(struct clk *clk)
{
unsigned long flags;
unsigned long ret = 0;
+ if (cpu_is_omap44xx())
+ /* OMAP4 clk framework not supported yet */
+ return 0;
if (clk == NULL || IS_ERR(clk))
return 0;
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 7/7][RFC] OMAP4: Enable basic build support.
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
@ 2009-04-21 13:08 ` Santosh Shilimkar
2009-04-21 18:39 ` Tony Lindgren
2009-04-21 18:37 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Tony Lindgren
1 sibling, 1 reply; 30+ messages in thread
From: Santosh Shilimkar @ 2009-04-21 13:08 UTC (permalink / raw)
To: linux-omap; +Cc: Santosh Shilimkar
This patch updates the Makefile and defconfig for OMAP4. Minimal set of
drivers are enabled fot the kernel bootup.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/Makefile | 1 +
arch/arm/configs/omap_4430sdp_defconfig | 807 +++++++++++++++++++++++++++++++
arch/arm/mach-omap2/Makefile | 6 +-
3 files changed, 813 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/configs/omap_4430sdp_defconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e84729b..676d10d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -127,6 +127,7 @@ endif
machine-$(CONFIG_ARCH_OMAP1) := omap1
machine-$(CONFIG_ARCH_OMAP2) := omap2
machine-$(CONFIG_ARCH_OMAP3) := omap2
+ machine-$(CONFIG_ARCH_OMAP4) := omap2
plat-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
new file mode 100644
index 0000000..1b509f3
--- /dev/null
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -0,0 +1,807 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29
+# Fri April 19 19:58:24 20089
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_ARCH_OMAP=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+
+#
+# TI OMAP Implementations
+#
+# CONFIG_ARCH_OMAP1 is not set
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_ARCH_OMAP3 is not set
+CONFIG_ARCH_OMAP4=y
+
+#
+# OMAP Feature Selections
+#
+# CONFIG_OMAP_RESET_CLOCKS is not set
+# CONFIG_OMAP_COMPONENT_VERSION is not set
+# CONFIG_OMAP_GPIO_SWITCH is not set
+# CONFIG_OMAP_MUX is not set
+# CONFIG_OMAP_MCBSP is not set
+# CONFIG_OMAP_MBOX_FWK is not set
+# CONFIG_OMAP_MPU_TIMER is not set
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_32K_TIMER_HZ=128
+CONFIG_OMAP_DM_TIMER=y
+CONFIG_OMAP_LL_DEBUG_UART1=y
+# CONFIG_OMAP_LL_DEBUG_UART2 is not set
+# CONFIG_OMAP_LL_DEBUG_UART3 is not set
+CONFIG_ARCH_OMAP44XX=y
+CONFIG_ARCH_OMAP4430=y
+
+#
+# OMAP Board Type
+#
+CONFIG_MACH_OMAP_4430SDP=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_IFAR=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_DCACHE_DISABLE=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_GIC=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=128
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_UNEVICTABLE_LRU is not set
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_NEON is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_MISC=y
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# CBUS support
+#
+# CONFIG_CBUS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QUOTA_TREE=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c49d9bf..68d50a8 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,9 +3,13 @@
#
# Common support
+ifeq ($(CONFIG_ARCH_OMAP4),y)
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
+else
obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \
devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
clockdomain.o
+endif
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
@@ -44,7 +48,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
mmc-twl4030.o
obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
mmc-twl4030.o
-
+obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
board-rx51-peripherals.o \
mmc-twl4030.o
--
1.5.4.7
^ permalink raw reply related [flat|nested] 30+ messages in thread
* RE: [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources.
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
@ 2009-04-21 13:21 ` Premi, Sanjeev
2009-04-21 13:34 ` Shilimkar, Santosh
2009-04-21 18:33 ` Tony Lindgren
2 siblings, 1 reply; 30+ messages in thread
From: Premi, Sanjeev @ 2009-04-21 13:21 UTC (permalink / raw)
To: linux-omap; +Cc: Shilimkar, Santosh
Any specific reason to use omap2 structures?
Best regards,
Sanjeev
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> Santosh Shilimkar
> Sent: Tuesday, April 21, 2009 6:38 PM
> To: linux-omap@vger.kernel.org
> Cc: Shilimkar, Santosh
> Subject: [PATCH 4/7][RFC] OMAP4: Update common omap platform
> common sources.
>
> This patch updates the common platform source files for OMAP4430.
> Few OMAP4 peripherals are common with OMAP3 architecture.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/common.c | 29 +++++++++++-
> arch/arm/plat-omap/devices.c | 2 +
> arch/arm/plat-omap/dma.c | 10 +++-
> arch/arm/plat-omap/dmtimer.c | 42 +++++++++++++++--
> arch/arm/plat-omap/gpio.c | 109
> ++++++++++++++++++++++++++++-------------
> arch/arm/plat-omap/io.c | 18 +++++++-
> arch/arm/plat-omap/mux.c | 3 +
> arch/arm/plat-omap/sram.c | 20 ++++++++
> 8 files changed, 189 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
> index d179714..ca2c382 100644
> --- a/arch/arm/plat-omap/common.c
> +++ b/arch/arm/plat-omap/common.c
> @@ -177,7 +177,8 @@ console_initcall(omap_add_serial_console);
>
> #if defined(CONFIG_ARCH_OMAP16XX)
> #define TIMER_32K_SYNCHRONIZED 0xfffbc410
> -#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#elif defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> #define TIMER_32K_SYNCHRONIZED
> (OMAP2_32KSYNCT_BASE + 0x10)
> #endif
>
> @@ -252,6 +253,16 @@ static void __init __omap2_set_globals(void)
>
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP4) /* sdrc and sms are not
> needed on omap4*/
> +static struct omap_globals *omap2_globals;
> +
> +static void __init __omap2_set_globals(void)
> +{
> + omap2_set_globals_tap(omap2_globals);
> + omap2_set_globals_control(omap2_globals);
> +}
> +#endif
> +
> #if defined(CONFIG_ARCH_OMAP2420)
>
> static struct omap_globals omap242x_globals = {
> @@ -309,3 +320,19 @@ void __init omap2_set_globals_343x(void)
> }
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP4430)
> +static struct omap_globals omap443x_globals = {
> + .class = OMAP443X_CLASS,
> + .tap = OMAP2_IO_ADDRESS(0x4830A000),
> + .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
> + .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
> + .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
> +};
> +
> +void __init omap2_set_globals_443x(void)
> +{
> + omap2_globals = &omap443x_globals;
> + __omap2_set_globals();
> +}
> +#endif
> +
> diff --git a/arch/arm/plat-omap/devices.c
> b/arch/arm/plat-omap/devices.c
> index 87fb7ff..a016c6c 100644
> --- a/arch/arm/plat-omap/devices.c
> +++ b/arch/arm/plat-omap/devices.c
> @@ -311,6 +311,8 @@ static void omap_init_wdt(void)
> wdt_resources[0].start = 0x49016000; /* WDT2 */
> else if (cpu_is_omap343x())
> wdt_resources[0].start = 0x48314000; /* WDT2 */
> + else if (cpu_is_omap44xx())
> + wdt_resources[0].start = 0x4A314000;
> else
> return;
>
> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
> index 21cc014..36d066d 100644
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned
> char read_prio,
> }
> l = dma_read(CCR(lch));
> l &= ~((1 << 6) | (1 << 26));
> - if (cpu_is_omap2430() || cpu_is_omap34xx())
> + if (cpu_is_omap2430() || cpu_is_omap34xx() ||
> cpu_is_omap44xx())
> l |= ((read_prio & 0x1) << 6) | ((write_prio &
> 0x1) << 26);
> else
> l |= ((read_prio & 0x1) << 6);
> @@ -1824,7 +1824,8 @@ static irqreturn_t
> omap1_dma_irq_handler(int irq, void *dev_id)
> #define omap1_dma_irq_handler NULL
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
>
> static int omap2_dma_handle_ch(int ch)
> {
> @@ -2319,6 +2320,9 @@ static int __init omap_init_dma(void)
> } else if (cpu_is_omap34xx()) {
> omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
> dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
> + } else if (cpu_is_omap44xx()) {
> + omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
> + dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
> } else {
> pr_err("DMA init failed for unsupported omap\n");
> return -ENODEV;
> @@ -2417,7 +2421,7 @@ static int __init omap_init_dma(void)
> }
> }
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx())
> + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
> omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
> DMA_DEFAULT_FIFO_DEPTH, 0);
>
> diff --git a/arch/arm/plat-omap/dmtimer.c
> b/arch/arm/plat-omap/dmtimer.c
> index bfd4757..d0e2119 100644
> --- a/arch/arm/plat-omap/dmtimer.c
> +++ b/arch/arm/plat-omap/dmtimer.c
> @@ -150,7 +150,8 @@
> struct omap_dm_timer {
> unsigned long phys_base;
> int irq;
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> struct clk *iclk, *fclk;
> #endif
> void __iomem *io_base;
> @@ -250,6 +251,37 @@ static const char
> *omap3_dm_source_names[] __initdata = {
> static struct clk **omap3_dm_source_clocks[2];
> static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
>
> +#elif defined(CONFIG_ARCH_OMAP4)
> +
> +#define omap_dm_clk_enable(x) clk_enable(x)
> +#define omap_dm_clk_disable(x) clk_disable(x)
> +#define omap1_dm_timers NULL
> +#define omap2_dm_timers NULL
> +#define omap2_dm_source_names NULL
> +#define omap2_dm_source_clocks NULL
> +
> +static struct omap_dm_timer omap3_dm_timers[] = {
> + { .phys_base = 0x4A318000, .irq = INT_24XX_GPTIMER1 },
> + { .phys_base = 0x48032000, .irq = INT_24XX_GPTIMER2 },
> + { .phys_base = 0x48034000, .irq = INT_24XX_GPTIMER3 },
> + { .phys_base = 0x48036000, .irq = INT_24XX_GPTIMER4 },
> + { .phys_base = 0x40138000, .irq = INT_24XX_GPTIMER5 },
> + { .phys_base = 0x4013A000, .irq = INT_24XX_GPTIMER6 },
> + { .phys_base = 0x4013C000, .irq = INT_24XX_GPTIMER7 },
> + { .phys_base = 0x4013E000, .irq = INT_24XX_GPTIMER8 },
> + { .phys_base = 0x4803E000, .irq = INT_24XX_GPTIMER9 },
> + { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
> + { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
> + { .phys_base = 0x4A320000, .irq = INT_24XX_GPTIMER12 },
> +};
> +static const char *omap3_dm_source_names[] __initdata = {
> + "sys_ck",
> + "omap_32k_fck",
> + NULL
> +};
> +static struct clk **omap3_dm_source_clocks[2];
> +static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
> +
> #else
>
> #error OMAP architecture not supported!
> @@ -461,7 +493,8 @@ __u32
> omap_dm_timer_modify_idlect_mask(__u32 inputmask)
> }
> EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>
> -#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
> +#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
>
> struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
> {
> @@ -701,7 +734,7 @@ int __init omap_dm_timer_init(void)
> dm_timers = omap2_dm_timers;
> dm_source_names = (char **)omap2_dm_source_names;
> dm_source_clocks = (struct clk
> **)omap2_dm_source_clocks;
> - } else if (cpu_is_omap34xx()) {
> + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> dm_timers = omap3_dm_timers;
> dm_source_names = (char **)omap3_dm_source_names;
> dm_source_clocks = (struct clk
> **)omap3_dm_source_clocks;
> @@ -717,7 +750,8 @@ int __init omap_dm_timer_init(void)
> for (i = 0; i < dm_timer_count; i++) {
> timer = &dm_timers[i];
> timer->io_base = IO_ADDRESS(timer->phys_base);
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> if (cpu_class_is_omap2()) {
> char clk_name[16];
> sprintf(clk_name, "gpt%d_ick", i + 1);
> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
> index d3fa41e..8bfc819 100644
> --- a/arch/arm/plat-omap/gpio.c
> +++ b/arch/arm/plat-omap/gpio.c
> @@ -136,15 +136,24 @@
> #define OMAP24XX_GPIO_SETDATAOUT 0x0094
>
> /*
> - * omap34xx specific GPIO registers
> + * omap34xx, omap44xx specific GPIO registers
> */
>
> +#ifdef CONFIG_ARCH_OMAP4430
> +#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x4A310000)
> +#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x48055000)
> +#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x48057000)
> +#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x48059000)
> +#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x4805B000)
> +#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x4805D000)
> +#else
> #define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000)
> #define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000)
> #define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000)
> #define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000)
> #define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
> #define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
> +#endif
>
> #define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
>
> @@ -153,11 +162,13 @@ struct gpio_bank {
> u16 irq;
> u16 virtual_irq_start;
> int method;
> -#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) ||
> defined(CONFIG_ARCH_OMAP44XX)
> u32 suspend_wakeup;
> u32 saved_wakeup;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> u32 non_wakeup_gpios;
> u32 enabled_non_wakeup_gpios;
>
> @@ -239,7 +250,7 @@ static struct gpio_bank gpio_bank_243x[5] = {
>
> #endif
>
> -#ifdef CONFIG_ARCH_OMAP34XX
> +#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> static struct gpio_bank gpio_bank_34xx[6] = {
> { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1,
> IH_GPIO_BASE, METHOD_GPIO_24XX },
> { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2,
> IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
> @@ -275,6 +286,8 @@ static inline struct gpio_bank
> *get_gpio_bank(int gpio)
> return &gpio_bank[gpio >> 5];
> if (cpu_is_omap34xx())
> return &gpio_bank[gpio >> 5];
> + if (cpu_is_omap44xx())
> + return &gpio_bank[gpio >> 5];
> BUG();
> return NULL;
> }
> @@ -287,6 +300,8 @@ static inline int get_gpio_index(int gpio)
> return gpio & 0x1f;
> if (cpu_is_omap34xx())
> return gpio & 0x1f;
> + if (cpu_is_omap44xx())
> + return gpio & 0x1f;
> return gpio & 0x0f;
> }
>
> @@ -309,6 +324,8 @@ static inline int gpio_valid(int gpio)
> return 0;
> if (cpu_is_omap34xx() && gpio < 160)
> return 0;
> + if (cpu_is_omap44xx() && gpio < 160)
> + return 0;
> return -1;
> }
>
> @@ -353,7 +370,8 @@ static void _set_gpio_direction(struct
> gpio_bank *bank, int gpio, int is_input)
> reg += OMAP850_GPIO_DIR_CONTROL;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_OE;
> break;
> @@ -425,7 +443,8 @@ static void _set_gpio_dataout(struct
> gpio_bank *bank, int gpio, int enable)
> l &= ~(1 << gpio);
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (enable)
> reg += OMAP24XX_GPIO_SETDATAOUT;
> @@ -476,7 +495,8 @@ static int __omap_get_gpio_datain(int gpio)
> reg += OMAP850_GPIO_DATA_INPUT;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_DATAIN;
> break;
> @@ -520,7 +540,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
> else
> goto done;
>
> - if (cpu_is_omap34xx()) {
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> if (enable)
> clk_enable(bank->dbck);
> else
> @@ -550,7 +570,8 @@ void omap_set_gpio_debounce_time(int
> gpio, int enc_time)
> }
> EXPORT_SYMBOL(omap_set_gpio_debounce_time);
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> static inline void set_24xx_gpio_triggering(struct gpio_bank
> *bank, int gpio,
> int trigger)
> {
> @@ -660,7 +681,8 @@ static int _set_gpio_triggering(struct
> gpio_bank *bank, int gpio, int trigger)
> goto bad;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> set_24xx_gpio_triggering(bank, gpio, trigger);
> break;
> @@ -745,7 +767,8 @@ static void _clear_gpio_irqbank(struct
> gpio_bank *bank, int gpio_mask)
> reg += OMAP850_GPIO_INT_STATUS;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_IRQSTATUS1;
> break;
> @@ -810,7 +833,8 @@ static u32 _get_gpio_irqbank_mask(struct
> gpio_bank *bank)
> inv = 1;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_IRQENABLE1;
> mask = 0xffffffff;
> @@ -883,7 +907,8 @@ static void _enable_gpio_irqbank(struct
> gpio_bank *bank, int gpio_mask, int enab
> l |= gpio_mask;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (enable)
> reg += OMAP24XX_GPIO_SETIRQENABLE1;
> @@ -931,7 +956,8 @@ static int _set_gpio_wakeup(struct
> gpio_bank *bank, int gpio, int enable)
> spin_unlock_irqrestore(&bank->lock, flags);
> return 0;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (bank->non_wakeup_gpios & (1 << gpio)) {
> printk(KERN_ERR "Unable to modify wakeup on "
> @@ -1019,7 +1045,8 @@ static void omap_gpio_free(struct
> gpio_chip *chip, unsigned offset)
> __raw_writel(1 << offset, reg);
> }
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX) {
> /* Disable wake-up during idle for dynamic tick */
> void __iomem *reg = bank->base +
> OMAP24XX_GPIO_CLEARWKUENA;
> @@ -1071,7 +1098,8 @@ static void gpio_irq_handler(unsigned
> int irq, struct irq_desc *desc)
> if (bank->method == METHOD_GPIO_850)
> isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX)
> isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
> #endif
> @@ -1348,7 +1376,7 @@ static int gpio_2irq(struct gpio_chip
> *chip, unsigned offset)
>
> /*------------------------------------------------------------
> ---------*/
>
> static int initialized;
> -#if !defined(CONFIG_ARCH_OMAP3)
> +#if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4))
> static struct clk * gpio_ick;
> #endif
>
> @@ -1361,7 +1389,7 @@ static struct clk * gpio5_ick;
> static struct clk * gpio5_fck;
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
> static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
> #endif
>
> @@ -1421,8 +1449,8 @@ static int __init _omap_gpio_init(void)
> }
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP3)
> - if (cpu_is_omap34xx()) {
> +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
> sprintf(clk_name, "gpio%d_ick", i + 1);
> gpio_iclks[i] = clk_get(NULL, clk_name);
> @@ -1488,8 +1516,8 @@ static int __init _omap_gpio_init(void)
> (rev >> 4) & 0x0f, rev & 0x0f);
> }
> #endif
> -#ifdef CONFIG_ARCH_OMAP34XX
> - if (cpu_is_omap34xx()) {
> +#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> int rev;
>
> gpio_bank_count = OMAP34XX_NR_GPIOS;
> @@ -1522,7 +1550,8 @@ static int __init _omap_gpio_init(void)
> gpio_count = 32; /* 730 has 32-bit GPIOs */
> }
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX) {
> static const u32 non_wakeup_gpios[] = {
> 0xe203ffc0, 0x08700040
> @@ -1579,7 +1608,7 @@ static int __init _omap_gpio_init(void)
> set_irq_chained_handler(bank->irq, gpio_irq_handler);
> set_irq_data(bank->irq, bank);
>
> - if (cpu_is_omap34xx()) {
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> sprintf(clk_name, "gpio%d_dbck", i + 1);
> bank->dbck = clk_get(NULL, clk_name);
> if (IS_ERR(bank->dbck))
> @@ -1601,7 +1630,8 @@ static int __init _omap_gpio_init(void)
> return 0;
> }
>
> -#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) ||
> defined(CONFIG_ARCH_OMAP44XX)
> static int omap_gpio_suspend(struct sys_device *dev,
> pm_message_t mesg)
> {
> int i;
> @@ -1624,7 +1654,8 @@ static int omap_gpio_suspend(struct
> sys_device *dev, pm_message_t mesg)
> wake_set = bank->base +
> OMAP1610_GPIO_SET_WAKEUPENA;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> wake_status = bank->base +
> OMAP24XX_GPIO_WAKE_EN;
> wake_clear = bank->base +
> OMAP24XX_GPIO_CLEARWKUENA;
> @@ -1665,7 +1696,8 @@ static int omap_gpio_resume(struct
> sys_device *dev)
> wake_set = bank->base +
> OMAP1610_GPIO_SET_WAKEUPENA;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> wake_clear = bank->base +
> OMAP24XX_GPIO_CLEARWKUENA;
> wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> @@ -1697,7 +1729,8 @@ static struct sys_device omap_gpio_device = {
>
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
>
> static int workaround_enabled;
>
> @@ -1713,7 +1746,8 @@ void omap2_gpio_prepare_for_retention(void)
>
> if (!(bank->enabled_non_wakeup_gpios))
> continue;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> bank->saved_datain = __raw_readl(bank->base +
> OMAP24XX_GPIO_DATAIN);
> l1 = __raw_readl(bank->base +
> OMAP24XX_GPIO_FALLINGDETECT);
> l2 = __raw_readl(bank->base +
> OMAP24XX_GPIO_RISINGDETECT);
> @@ -1722,7 +1756,8 @@ void omap2_gpio_prepare_for_retention(void)
> bank->saved_risingdetect = l2;
> l1 &= ~bank->enabled_non_wakeup_gpios;
> l2 &= ~bank->enabled_non_wakeup_gpios;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> __raw_writel(l1, bank->base +
> OMAP24XX_GPIO_FALLINGDETECT);
> __raw_writel(l2, bank->base +
> OMAP24XX_GPIO_RISINGDETECT);
> #endif
> @@ -1747,7 +1782,8 @@ void omap2_gpio_resume_after_retention(void)
>
> if (!(bank->enabled_non_wakeup_gpios))
> continue;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> __raw_writel(bank->saved_fallingdetect,
> bank->base +
> OMAP24XX_GPIO_FALLINGDETECT);
> __raw_writel(bank->saved_risingdetect,
> @@ -1757,14 +1793,16 @@ void omap2_gpio_resume_after_retention(void)
> * state. If so, generate an IRQ by software. This is
> * horribly racy, but it's the best we can do
> to work around
> * this silicon bug. */
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
> #endif
> l ^= bank->saved_datain;
> l &= bank->non_wakeup_gpios;
> if (l) {
> u32 old0, old1;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) ||
> defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> old0 = __raw_readl(bank->base +
> OMAP24XX_GPIO_LEVELDETECT0);
> old1 = __raw_readl(bank->base +
> OMAP24XX_GPIO_LEVELDETECT1);
> __raw_writel(old0 | l, bank->base +
> OMAP24XX_GPIO_LEVELDETECT0);
> @@ -1800,7 +1838,8 @@ static int __init omap_gpio_sysinit(void)
>
> mpuio_init();
>
> -#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) ||
> defined(CONFIG_ARCH_OMAP44XX)
> if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
> if (ret == 0) {
> ret =
> sysdev_class_register(&omap_gpio_sysclass);
> @@ -1889,7 +1928,7 @@ static int dbg_gpio_show(struct
> seq_file *s, void *unused)
>
> irqstat = irq_desc[irq].status;
> #if defined(CONFIG_ARCH_OMAP16XX) ||
> defined(CONFIG_ARCH_OMAP24XX) || \
> - defined(CONFIG_ARCH_OMAP34XX)
> + defined(CONFIG_ARCH_OMAP34XX) ||
> defined(CONFIG_ARCH_OMAP44XX)
> if (is_in && ((bank->suspend_wakeup & mask)
> || irqstat &
> IRQ_TYPE_SENSE_MASK)) {
> char *trigger = NULL;
> diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
> index af326ef..a46f328 100644
> --- a/arch/arm/plat-omap/io.c
> +++ b/arch/arm/plat-omap/io.c
> @@ -7,6 +7,7 @@
> #include <mach/omap16xx.h>
> #include <mach/omap24xx.h>
> #include <mach/omap34xx.h>
> +#include <mach/omap44xx.h>
>
> #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
> #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
> @@ -92,7 +93,22 @@ void __iomem *omap_ioremap(unsigned long
> p, size_t size, unsigned int type)
> return XLATE(p, L4_EMU_34XX_PHYS,
> L4_EMU_34XX_VIRT);
> }
> #endif
> -
> +#ifdef CONFIG_ARCH_OMAP4
> + if (cpu_is_omap44xx()) {
> + if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
> + return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
> + if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
> + return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
> + if (BETWEEN(p, L4_WK_44XX_PHYS, L4_WK_44XX_SIZE))
> + return XLATE(p, L4_WK_44XX_PHYS,
> L4_WK_44XX_VIRT);
> + if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
> + return XLATE(p, OMAP44XX_GPMC_PHYS,
> OMAP44XX_GPMC_VIRT);
> + if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
> + return XLATE(p, L4_PER_44XX_PHYS,
> L4_PER_44XX_VIRT);
> + if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
> + return XLATE(p, L4_EMU_44XX_PHYS,
> L4_EMU_44XX_VIRT);
> + }
> +#endif
> return __arm_ioremap(p, size, type);
> }
> EXPORT_SYMBOL(omap_ioremap);
> diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
> index 80b040f..8d329fb 100644
> --- a/arch/arm/plat-omap/mux.c
> +++ b/arch/arm/plat-omap/mux.c
> @@ -54,6 +54,9 @@ int __init_or_module omap_cfg_reg(const
> unsigned long index)
> {
> struct pin_config *reg;
>
> + if (cpu_is_omap44xx())
> + return 0;
> +
> if (mux_cfg == NULL) {
> printk(KERN_ERR "Pin mux table not initialized\n");
> return -ENODEV;
> diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
> index fa5297d..4f45d6c 100644
> --- a/arch/arm/plat-omap/sram.c
> +++ b/arch/arm/plat-omap/sram.c
> @@ -44,6 +44,8 @@
> #define OMAP3_SRAM_VA 0xd7000000
> #define OMAP3_SRAM_PUB_PA 0x40208000
> #define OMAP3_SRAM_PUB_VA 0xd7008000
> +#define OMAP4_SRAM_PA 0x40200000
> /*0x402f0000*/
> +#define OMAP4_SRAM_VA 0xd7000000
> /*0xd70f0000*/
>
> #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> #define SRAM_BOOTLOADER_SZ 0x00
> @@ -87,6 +89,10 @@ static int is_sram_locked(void)
> {
> int type = 0;
>
> + if (cpu_is_omap44xx())
> + /* Not yet supported */
> + return 0;
> +
> if (cpu_is_omap242x())
> type = omap_rev() & OMAP2_DEVICETYPE_MASK;
>
> @@ -135,6 +141,10 @@ void __init omap_detect_sram(void)
> omap_sram_base = OMAP3_SRAM_VA;
> omap_sram_start = OMAP3_SRAM_PA;
> omap_sram_size = 0x10000; /* 64K */
> + } else if (cpu_is_omap44xx()) {
> + omap_sram_base = OMAP4_SRAM_VA;
> + omap_sram_start = OMAP4_SRAM_PA;
> + omap_sram_size = 0x8000; /* 32K */
> } else {
> omap_sram_base = OMAP2_SRAM_VA;
> omap_sram_start = OMAP2_SRAM_PA;
> @@ -203,6 +213,12 @@ void __init omap_map_sram(void)
> omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
> }
>
> + if (cpu_is_omap44xx()) {
> + omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
> + base = OMAP4_SRAM_PA;
> + base = ROUND_DOWN(base, PAGE_SIZE);
> + omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
> + }
> omap_sram_io_desc[0].length = 1024 * 1024; /* Use
> section desc */
> iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
>
> @@ -242,10 +258,12 @@ void * omap_sram_push(void * start,
> unsigned long size)
> return (void *)omap_sram_ceil;
> }
>
> +#ifndef CONFIG_ARCH_OMAP4 /* to remove compile time warning */
> static void omap_sram_error(void)
> {
> panic("Uninitialized SRAM function\n");
> }
> +#endif
>
> #ifdef CONFIG_ARCH_OMAP1
>
> @@ -406,6 +424,8 @@ int __init omap_sram_init(void)
> omap243x_sram_init();
> else if (cpu_is_omap34xx())
> omap34xx_sram_init();
> + else if (cpu_is_omap44xx())
> + omap34xx_sram_init(); /* REVISIT: */
>
> return 0;
> }
> --
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe
> linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources.
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
@ 2009-04-21 13:24 ` Dasgupta, Romit
2009-04-21 16:23 ` Kevin Hilman
2009-04-21 18:36 ` Tony Lindgren
3 siblings, 0 replies; 30+ messages in thread
From: Dasgupta, Romit @ 2009-04-21 13:24 UTC (permalink / raw)
To: linux-omap; +Cc: Shilimkar, Santosh
> case CLOCK_EVT_MODE_ONESHOT:
>@@ -108,6 +109,9 @@ static void __init omap2_gp_clockevent_init(void)
> omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
> #endif
> tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
>+ if (cpu_is_omap44xx())
>+ /* Assuming 32kHz clk is driving GPT1 */
>+ tick_rate = 32768;
[Romit] This should be read from CM_CLKSEL_WKUP.CLKSEL_GPT1 to be proper.
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources.
2009-04-21 13:21 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Premi, Sanjeev
@ 2009-04-21 13:34 ` Shilimkar, Santosh
2009-04-21 13:38 ` Shilimkar, Santosh
0 siblings, 1 reply; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-21 13:34 UTC (permalink / raw)
To: Premi, Sanjeev, linux-omap
> -----Original Message-----
> From: Premi, Sanjeev
> Sent: Tuesday, April 21, 2009 6:51 PM
> To: Shilimkar, Santosh; linux-omap@vger.kernel.org
> Cc: Shilimkar, Santosh
> Subject: RE: [PATCH 4/7][RFC] OMAP4: Update common omap
> platform common sources.
>
> Any specific reason to use omap2 structures?
These are not actually the omap2 structures. Most of the common omap code uses something like
'omap2_xxxxx_xxx'.
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources.
2009-04-21 13:34 ` Shilimkar, Santosh
@ 2009-04-21 13:38 ` Shilimkar, Santosh
0 siblings, 0 replies; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-21 13:38 UTC (permalink / raw)
To: Shilimkar, Santosh, Premi, Sanjeev, linux-omap
-----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> Shilimkar, Santosh
> Sent: Tuesday, April 21, 2009 7:05 PM
> To: Premi, Sanjeev; linux-omap@vger.kernel.org
> Subject: RE: [PATCH 4/7][RFC] OMAP4: Update common omap
> platform common sources.
>
> > -----Original Message-----
> > From: Premi, Sanjeev
> > Sent: Tuesday, April 21, 2009 6:51 PM
> > To: Shilimkar, Santosh; linux-omap@vger.kernel.org
> > Cc: Shilimkar, Santosh
> > Subject: RE: [PATCH 4/7][RFC] OMAP4: Update common omap
> > platform common sources.
> >
> > Any specific reason to use omap2 structures?
>
> These are not actually the omap2 structures. Most of the
> common omap code uses something like
> 'omap2_xxxxx_xxx'.
Not sure but may be mostly because of the common feautres beteen OMAP2, OMAP3 and now OMAp4 as well.
cpu_class_omap2() ==> omap2/omap3/omap4.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources.
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
2009-04-21 13:24 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Dasgupta, Romit
@ 2009-04-21 16:23 ` Kevin Hilman
2009-04-21 18:36 ` Tony Lindgren
3 siblings, 0 replies; 30+ messages in thread
From: Kevin Hilman @ 2009-04-21 16:23 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> This patch updates the common machine spcific source files for OMAP4430.
> Few OMAP4 peripherals are common with OMAP3 architecture. Lot of code
> gets re-used because of this.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[...]
> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
> index 916fcd3..3f7a7f5 100644
> --- a/arch/arm/mach-omap2/io.c
> +++ b/arch/arm/mach-omap2/io.c
> @@ -30,6 +30,7 @@
> #include <mach/sdrc.h>
> #include <mach/gpmc.h>
>
> +#ifndef CONFIG_ARCH_OMAP4 /* Clock framework is still not supported for OMAP4*/
> #include "clock.h"
>
> #include <mach/powerdomain.h>
> @@ -38,6 +39,7 @@
>
> #include <mach/clockdomain.h>
> #include "clockdomains.h"
> +#endif
Clock fw is not supported, but including these files should be harmless.
[...]
> void __init omap2_map_common_io(void)
> {
> @@ -183,6 +225,10 @@ void __init omap2_map_common_io(void)
> iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP44XX)
> + iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
> +#endif
> +
> /* Normally devicemaps_init() would flush caches and tlb after
> * mdesc->map_io(), but we must also do it here because of the CPU
> * revision check below.
> @@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
> void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
> {
> omap2_mux_init();
> +#ifndef CONFIG_ARCH_OMAP4 /* REVISIT: to avoid build errors */
> pwrdm_init(powerdomains_omap);
> clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
> omap2_clk_init();
> omap2_sdrc_init(sp);
> +#endif
Rather than the #ifdef here, can you stub these out in the relevant
files instead.
> gpmc_init();
> }
> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> index 9fc13a2..f9f41df 100644
> --- a/arch/arm/mach-omap2/timer-gp.c
> +++ b/arch/arm/mach-omap2/timer-gp.c
> @@ -75,7 +75,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
> case CLOCK_EVT_MODE_PERIODIC:
> period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
> period -= 1;
> -
> + if (cpu_is_omap44xx())
> + period = 0xFF;
Put a FIXME here noting that this should be removed when clk fw is
implemented.
> omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
> break;
> case CLOCK_EVT_MODE_ONESHOT:
> @@ -108,6 +109,9 @@ static void __init omap2_gp_clockevent_init(void)
> omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
> #endif
> tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
> + if (cpu_is_omap44xx())
> + /* Assuming 32kHz clk is driving GPT1 */
> + tick_rate = 32768;
>
ditto
Kevin
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries.
2009-04-21 13:08 [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Santosh Shilimkar
@ 2009-04-21 16:41 ` Kevin Hilman
1 sibling, 0 replies; 30+ messages in thread
From: Kevin Hilman @ 2009-04-21 16:41 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> This patch creates the architectural macros for OMAP4. The MULTI_OMAP
> build is not yet supported by OMAP4.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/Kconfig | 16 +++++++++++++++-
> arch/arm/plat-omap/Kconfig | 10 +++++++---
> arch/arm/plat-omap/include/mach/cpu.h | 17 +++++++++++++++--
> 3 files changed, 37 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index 64ab386..a28eb30 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -24,8 +24,18 @@ config ARCH_OMAP3430
> depends on ARCH_OMAP3 && ARCH_OMAP34XX
> select ARCH_OMAP_OTG
>
> +config ARCH_OMAP44XX
> + bool "OMAP44xx Based System"
> + depends on ARCH_OMAP4
> +
I see this config option used only once in io.c, and that one should likely
just use CONFIG_ARCH_OMAP4.
I'm worried about creating too many Kconfig options for CPU types
which we don't really need. All the CPU-type and revision detection
is done at runtime so IMHO, we shouldn't have Kconfig options for chip
revisions.
Also helps to avoid confusion if OMAP45xx and OMAP46xx chips come out
as the case with OMAP3.
I know OMAP3 has ARCH_OMAP3 and ARCH_OMAP34XX and ARCH_OMAP3430, but
for OMAP4, I think we should get rid of all of these except
CONFIG_ARCH_OMAP4.
> +config ARCH_OMAP4430
> + bool "OMAP4430 support"
> + depends on ARCH_OMAP4 && ARCH_OMAP44XX
> + select ARM_GIC
> +
> +
And this one isn't used at all, so further emphasizes my point.
Then all the ARCH_OMAP4* below could be simply replaced by ARCH_OMAP4
Kevin
> comment "OMAP Board Type"
> - depends on ARCH_OMAP2 || ARCH_OMAP3
> + depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
>
> config MACH_OMAP_GENERIC
> bool "Generic OMAP board"
> @@ -67,3 +77,7 @@ config MACH_OMAP_3430SDP
> config MACH_NOKIA_RX51
> bool "Nokia RX-51 board"
> depends on ARCH_OMAP3 && ARCH_OMAP34XX
> +
> +config MACH_OMAP_4430SDP
> + bool "OMAP 4430 SDP board"
> + depends on ARCH_OMAP4 && ARCH_OMAP44XX
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 9dd68fa..e2086d4 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -23,6 +23,10 @@ config ARCH_OMAP3
> select CPU_V7
> select COMMON_CLKDEV
>
> +config ARCH_OMAP4
> + bool "TI OMAP4"
> + select CPU_V7
> +
> endchoice
>
> comment "OMAP Feature Selections"
> @@ -128,13 +132,13 @@ config OMAP_MPU_TIMER
>
> config OMAP_32K_TIMER
> bool "Use 32KHz timer"
> - depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
> + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP44XX
> help
> Select this option if you want to enable the OMAP 32KHz timer.
> This timer saves power compared to the OMAP_MPU_TIMER, and has
> support for no tick during idle. The 32KHz timer provides less
> intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
> - currently only available for OMAP16XX, 24XX and 34XX.
> + currently only available for OMAP16XX, 24XX, 34XX and 44XX.
>
> endchoice
>
> @@ -149,7 +153,7 @@ config OMAP_32K_TIMER_HZ
>
> config OMAP_DM_TIMER
> bool "Use dual-mode timer"
> - depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
> + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP44XX
> help
> Select this option if you want to use OMAP Dual-Mode timers.
>
> diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
> index 98b1442..7920d6a 100644
> --- a/arch/arm/plat-omap/include/mach/cpu.h
> +++ b/arch/arm/plat-omap/include/mach/cpu.h
> @@ -155,6 +155,8 @@ IS_OMAP_SUBCLASS(343x, 0x343)
> #define cpu_is_omap243x() 0
> #define cpu_is_omap34xx() 0
> #define cpu_is_omap343x() 0
> +#define cpu_is_omap44xx() 0
> +#define cpu_is_omap443x() 0
>
> #if defined(MULTI_OMAP1)
> # if defined(CONFIG_ARCH_OMAP730)
> @@ -348,12 +350,21 @@ IS_OMAP_TYPE(3430, 0x3430)
> # define cpu_is_omap3430() is_omap3430()
> #endif
>
> +# if defined(CONFIG_ARCH_OMAP44XX)
> +# undef cpu_is_omap44xx
> +# undef cpu_is_omap443x
> +# define cpu_is_omap44xx() 1
> +# define cpu_is_omap443x() 1
> +# endif
> +
> /* Macros to detect if we have OMAP1 or OMAP2 */
> #define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
> cpu_is_omap16xx())
> -#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
> +#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
> + cpu_is_omap44xx())
>
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
>
> /* Various silicon revisions for omap2 */
> #define OMAP242X_CLASS 0x24200024
> @@ -370,6 +381,8 @@ IS_OMAP_TYPE(3430, 0x3430)
> #define OMAP3430_REV_ES3_0 0x34303034
> #define OMAP3430_REV_ES3_1 0x34304034
>
> +#define OMAP443X_CLASS 0x44300034
> +
> /*
> * omap_chip bits
> *
> --
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP.
2009-04-21 13:08 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Santosh Shilimkar
@ 2009-04-21 18:14 ` Tony Lindgren
2009-04-22 4:47 ` Shilimkar, Santosh
1 sibling, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:14 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch creates the bare minimal board files to support
> OMAP_4430SDP. Additinaly new omap44xx.h is created which contains
> the base addresses for OMAP4430.File omap34xx.h is adapted to avoid
> multiple definitions of common omap base address definitions.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/board-4430sdp.c | 91 +++++++++++++++++++++++
> arch/arm/plat-omap/include/mach/board-4430sdp.h | 28 +++++++
> arch/arm/plat-omap/include/mach/hardware.h | 1 +
> arch/arm/plat-omap/include/mach/omap34xx.h | 8 +-
> arch/arm/plat-omap/include/mach/omap44xx.h | 61 +++++++++++++++
> 5 files changed, 185 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/mach-omap2/board-4430sdp.c
> create mode 100644 arch/arm/plat-omap/include/mach/board-4430sdp.h
> create mode 100644 arch/arm/plat-omap/include/mach/omap44xx.h
>
> diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
> new file mode 100644
> index 0000000..157e9e4
> --- /dev/null
> +++ b/arch/arm/mach-omap2/board-4430sdp.c
> @@ -0,0 +1,91 @@
> +/*
> + * Board support file for OMAP4430 SDP.
> + *
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
> + *
> + * Based on mach-omap2/board-3430sdp.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +
> +#include <mach/hardware.h>
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +
> +#include <mach/gpio.h>
> +#include <mach/board.h>
> +#include <mach/common.h>
> +#include <mach/control.h>
> +#include <asm/hardware/gic.h>
> +
> +static struct platform_device sdp4430_lcd_device = {
> + .name = "sdp4430_lcd",
> + .id = -1,
> +};
> +
> +static struct platform_device *sdp4430_devices[] __initdata = {
> + &sdp4430_lcd_device,
> +};
> +
> +static struct omap_uart_config sdp4430_uart_config __initdata = {
> + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
> +};
> +
> +static struct omap_lcd_config sdp4430_lcd_config __initdata = {
> + .ctrl_name = "internal",
> +};
> +
> +static struct omap_board_config_kernel sdp4430_config[] __initdata = {
> + { OMAP_TAG_UART, &sdp4430_uart_config },
> + { OMAP_TAG_LCD, &sdp4430_lcd_config },
> +};
> +
> +static void __init gic_init_irq(void)
> +{
> + gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
> + gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
> +}
> +
> +static void __init omap_4430sdp_init_irq(void)
> +{
> + omap2_init_common_hw(NULL);
> + gic_init_irq();
> + omap_gpio_init();
> +}
> +
> +
> +static void __init omap_4430sdp_init(void)
> +{
> + platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
> + omap_board_config = sdp4430_config;
> + omap_board_config_size = ARRAY_SIZE(sdp4430_config);
> + omap_serial_init();
> +
> +}
> +
> +static void __init omap_4430sdp_map_io(void)
> +{
> + omap2_set_globals_443x();
> + omap2_map_common_io();
> +}
> +
> +MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
> + /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
> + .phys_io = 0x48000000,
> + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
> + .boot_params = 0x80000100,
> + .map_io = omap_4430sdp_map_io,
> + .init_irq = omap_4430sdp_init_irq,
> + .init_machine = omap_4430sdp_init,
> + .timer = &omap_timer,
> +MACHINE_END
> diff --git a/arch/arm/plat-omap/include/mach/board-4430sdp.h b/arch/arm/plat-omap/include/mach/board-4430sdp.h
> new file mode 100644
> index 0000000..5296779
> --- /dev/null
> +++ b/arch/arm/plat-omap/include/mach/board-4430sdp.h
> @@ -0,0 +1,28 @@
> +/*
> + * Board support header for OMAP4430 SDP.
> + *
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
> + *
> + * Based on arch/arm/plat-omap/include/mach/board-3430sdp.h
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
> +#define __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
> +
> +extern void sdp4430_flash_init(void);
> +
> +/* NAND */
> +#define DEBUG_BASE 0x08000000 /* debug board */
> +#define NAND_BASE 0x0C000000 /* NAND flash */
> +#define ONENAND_MAP 0x20000000 /* OneNand flash */
> +
> +/* various memory sizes */
> +#define FLASH_SIZE_SDPV1 SZ_64M
> +#define FLASH_SIZE_SDPV2 SZ_128M
> +#endif
> +
Let's leave out the board-4430sdp.h and move the defines to the board-4430sdp.c.
Also it sounds like the NAND defines are not yet needed. I'm thinking
that we should have just a generic gpmc-onenand.c file based on the
board-n800-flash.c that works for all boards with onenand connected
to the GPMC.
> diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
> index 3dc423e..26c1fbf 100644
> --- a/arch/arm/plat-omap/include/mach/hardware.h
> +++ b/arch/arm/plat-omap/include/mach/hardware.h
> @@ -285,5 +285,6 @@
> #include "omap16xx.h"
> #include "omap24xx.h"
> #include "omap34xx.h"
> +#include "omap44xx.h"
>
> #endif /* __ASM_ARCH_OMAP_HARDWARE_H */
> diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h
> index ab64015..32f2bde 100644
> --- a/arch/arm/plat-omap/include/mach/omap34xx.h
> +++ b/arch/arm/plat-omap/include/mach/omap34xx.h
> @@ -31,13 +31,9 @@
>
> #define L4_34XX_BASE 0x48000000
> #define L4_WK_34XX_BASE 0x48300000
> -#define L4_WK_OMAP_BASE L4_WK_34XX_BASE
> #define L4_PER_34XX_BASE 0x49000000
> -#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
> #define L4_EMU_34XX_BASE 0x54000000
> -#define L4_EMU_BASE L4_EMU_34XX_BASE
> #define L3_34XX_BASE 0x68000000
> -#define L3_OMAP_BASE L3_34XX_BASE
>
> #define OMAP3430_32KSYNCT_BASE 0x48320000
> #define OMAP3430_CM_BASE 0x48004800
> @@ -85,6 +81,10 @@
>
> #if defined(CONFIG_ARCH_OMAP3430)
>
> +#define L4_WK_OMAP_BASE L4_WK_34XX_BASE
> +#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
> +#define L4_EMU_BASE L4_EMU_34XX_BASE
> +#define L3_OMAP_BASE L3_34XX_BASE
> #define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE
> #define OMAP2_CM_BASE OMAP3430_CM_BASE
> #define OMAP2_PRM_BASE OMAP3430_PRM_BASE
These defines should be set up in a way where they don't block
compile for multi-omap. OK to keep for now, I'll post some
clean-up patches for all processors under mach-omap2.
> diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
> new file mode 100644
> index 0000000..7852ea6
> --- /dev/null
> +++ b/arch/arm/plat-omap/include/mach/omap44xx.h
> @@ -0,0 +1,61 @@
> +/*
> + * Address mappings and base address for OMAP4 interconnects
> + * and peripherals.
> + *
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ASM_ARCH_OMAP44XX_H
> +#define __ASM_ARCH_OMAP44XX_H
> +
> +/*
> + * Please place only base defines here and put the rest in device
> + * specific headers.
> + */
> +#define L4_44XX_BASE 0x4A000000
> +#define L4_WK_44XX_BASE 0x4A300000
> +#define L4_PER_44XX_BASE 0x48000000
> +#define L4_EMU_44XX_BASE 0x54000000
> +#define L3_44XX_BASE 0x44000000
> +#define OMAP4430_32KSYNCT_BASE 0x4A304000
> +#define OMAP4430_CM_BASE 0x4A004000
> +#define OMAP4430_PRM_BASE 0x48306000
> +#define OMAP44XX_GPMC_BASE 0x50000000
> +#define OMAP443X_SCM_BASE 0x4A002000
> +#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE
> +#define OMAP44XX_IC_BASE 0x48200000
> +#define OMAP44XX_IVA_INTC_BASE 0x40000000
> +#define IRQ_SIR_IRQ 0x0040
> +#define OMAP44XX_GIC_DIST_BASE 0x48241000
> +#define OMAP44XX_GIC_CPU_BASE 0x48240100
> +#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
> +#define OMAP44XX_SCU_BASE 0x48240000
> +#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE)
> +#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
> +#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
> +#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
> +#define OMAP44XX_WKUPGEN_BASE 0x48281000
> +#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
Could these defines have just OMAP4_ prefix? If some later omap4
changes these, we can define them separately with the correct
prefix.
> +
> +/* Common macros between OMAPs */
> +
> +#if defined(CONFIG_ARCH_OMAP44XX)
> +
> +#define L4_WK_OMAP_BASE L4_WK_44XX_BASE
> +#define L4_PER_OMAP_BASE L4_PER_44XX_BASE
> +#define L4_EMU_BASE L4_EMU_44XX_BASE
> +#define L3_OMAP_BASE L3_44XX_BASE
> +#define OMAP2_32KSYNCT_BASE OMAP4430_32KSYNCT_BASE
> +#define OMAP2_CM_BASE OMAP4430_CM_BASE
> +#define OMAP2_PRM_BASE OMAP4430_PRM_BASE
> +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP44XX_IC_BASE)
> +
> +#endif
> +
> +#endif /* __ASM_ARCH_OMAP44XX_H */
These defines will be cleaned up too for all processors during
this cycle as they block compile for multi-omap. Just FYI,
some minor rebasing will be needed at some point later on.
Regards,
Tony
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-21 13:08 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
@ 2009-04-21 18:26 ` Tony Lindgren
2009-04-22 4:10 ` Shilimkar, Santosh
1 sibling, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:26 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch updates the common platform headers files for OMAP4430.
> On OMAP4, GIC is used instead of INTC, hence all the private peripheral
> interrupts are shifted by an offset of 32. So if the hardcoding is not
> done for IRQ lines in drivers, then this change won't impact any driver.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/include/mach/common.h | 1 +
> arch/arm/plat-omap/include/mach/control.h | 3 +-
> arch/arm/plat-omap/include/mach/debug-macro.S | 2 +-
> arch/arm/plat-omap/include/mach/dma.h | 1 +
> arch/arm/plat-omap/include/mach/entry-macro.S | 45 +++++-
> arch/arm/plat-omap/include/mach/io.h | 34 ++++
> arch/arm/plat-omap/include/mach/irqs.h | 205 +++++++++++++------------
> arch/arm/plat-omap/include/mach/memory.h | 3 +-
> arch/arm/plat-omap/include/mach/serial.h | 11 ++-
> arch/arm/plat-omap/include/mach/system.h | 7 +
> 10 files changed, 206 insertions(+), 106 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
> index 0ecf36d..4b18833 100644
> --- a/arch/arm/plat-omap/include/mach/common.h
> +++ b/arch/arm/plat-omap/include/mach/common.h
> @@ -62,6 +62,7 @@ struct omap_globals {
> void omap2_set_globals_242x(void);
> void omap2_set_globals_243x(void);
> void omap2_set_globals_343x(void);
> +void omap2_set_globals_443x(void);
>
> /* These get called from omap2_set_globals_xxxx(), do not call these */
> void omap2_set_globals_tap(struct omap_globals *);
> diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
> index 269147f..c5f47cd 100644
> --- a/arch/arm/plat-omap/include/mach/control.h
> +++ b/arch/arm/plat-omap/include/mach/control.h
> @@ -190,7 +190,8 @@
> #define OMAP2_PBIASLITEVMODE0 (1 << 0)
>
> #ifndef __ASSEMBLY__
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> extern void __iomem *omap_ctrl_base_get(void);
> extern u8 omap_ctrl_readb(u16 offset);
> extern u16 omap_ctrl_readw(u16 offset);
> diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S
> index 1b11f5c..662f08f 100644
> --- a/arch/arm/plat-omap/include/mach/debug-macro.S
> +++ b/arch/arm/plat-omap/include/mach/debug-macro.S
> @@ -36,7 +36,7 @@
> add \rx, \rx, #0x00004000 @ UART 3
> #endif
>
> -#elif CONFIG_ARCH_OMAP3
> +#elif (CONFIG_ARCH_OMAP3 || CONFIG_ARCH_OMAP4)
> moveq \rx, #0x48000000 @ physical base address
> movne \rx, #0xd8000000 @ virtual base
> orr \rx, \rx, #0x0006a000
> diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h
> index 54fe966..8e05b6a 100644
> --- a/arch/arm/plat-omap/include/mach/dma.h
> +++ b/arch/arm/plat-omap/include/mach/dma.h
> @@ -48,6 +48,7 @@
> /* Hardware registers for omap2 and omap3 */
> #define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
> #define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000)
> +#define OMAP44XX_DMA4_BASE (L4_44XX_BASE + 0x56000)
>
> #define OMAP_DMA4_REVISION 0x00
> #define OMAP_DMA4_GCR 0x78
> diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
> index 2276f89..7a9d40e 100644
> --- a/arch/arm/plat-omap/include/mach/entry-macro.S
> +++ b/arch/arm/plat-omap/include/mach/entry-macro.S
> @@ -10,6 +10,9 @@
> #include <mach/hardware.h>
> #include <mach/io.h>
> #include <mach/irqs.h>
> +#ifdef CONFIG_ARCH_OMAP44XX
> +#include <asm/hardware/gic.h>
> +#endif
>
> #if defined(CONFIG_ARCH_OMAP1)
>
> @@ -56,7 +59,8 @@
> .endm
>
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
>
> #if defined(CONFIG_ARCH_OMAP24XX)
> #include <mach/omap24xx.h>
> @@ -64,7 +68,9 @@
> #if defined(CONFIG_ARCH_OMAP34XX)
> #include <mach/omap34xx.h>
> #endif
> -
> +#if defined(CONFIG_ARCH_OMAP44XX)
> +#include <mach/omap44xx.h>
> +#endif
> #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
> #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
>
> @@ -77,6 +83,7 @@
> .macro arch_ret_to_user, tmp1, tmp2
> .endm
>
> +#ifndef CONFIG_ARCH_OMAP44XX
> .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
> ldr \base, =OMAP2_VA_IC_BASE
> ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
> @@ -92,6 +99,40 @@
> and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
>
> .endm
> +#else
> + /*
> + * The interrupt numbering scheme is defined in the
> + * interrupt controller spec. To wit:
> + *
> + * Interrupts 0-15 are IPI
> + * 16-28 are reserved
> + * 29-31 are local. We allow 30 to be used for the watchdog.
> + * 32-1020 are global
> + * 1021-1022 are reserved
> + * 1023 is "spurious" (no interrupt)
> + *
> + * For now, we ignore all local interrupts so only return an
> + * interrupt if it's between 30 and 1020. The test_for_ipi
> + * routine below will pick up on IPIs.
> + * A simple read from the controller will tell us the number
> + * of the highest priority enabled interrupt.
> + * We then just need to check whether it is in the
> + * valid range for an IRQ (30-1020 inclusive).
> + */
> + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
> + ldr \base, =OMAP44XX_VA_GIC_CPU_BASE
> + ldr \irqstat, [\base, #GIC_CPU_INTACK]
> +
> + ldr \tmp, =1021
> +
> + bic \irqnr, \irqstat, #0x1c00
> +
> + cmp \irqnr, #29
> + cmpcc \irqnr, \irqnr
> + cmpne \irqnr, \tmp
> + cmpcs \irqnr, \irqnr
> + .endm
> +#endif
>
> .macro irq_prio_table
> .endm
> diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
> index 0610d7e..f786471 100644
> --- a/arch/arm/plat-omap/include/mach/io.h
> +++ b/arch/arm/plat-omap/include/mach/io.h
> @@ -157,6 +157,40 @@
> #define DSP_MMU_34XX_VIRT 0xe2000000
> #define DSP_MMU_34XX_SIZE SZ_4K
>
> +
> +#elif defined(CONFIG_ARCH_OMAP4)
> +/* We map both L3 and L4 on OMAP4 */
> +#define L3_44XX_PHYS L3_44XX_BASE
> +#define L3_44XX_VIRT 0xd4000000
> +#define L3_44XX_SIZE SZ_1M
> +
> +#define L4_44XX_PHYS L4_44XX_BASE
> +#define L4_44XX_VIRT 0xda000000
> +#define L4_44XX_SIZE SZ_4M
> +
> +
> +#define L4_WK_44XX_PHYS L4_WK_44XX_BASE
> +#define L4_WK_44XX_VIRT 0xda300000
> +#define L4_WK_44XX_SIZE SZ_1M
> +
> +#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
> +#define L4_PER_44XX_VIRT 0xd8000000
> +#define L4_PER_44XX_SIZE SZ_4M
> +
> +#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
> +#define L4_EMU_44XX_VIRT 0xe4000000
> +#define L4_EMU_44XX_SIZE SZ_64M
> +
> +#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
> +#define OMAP44XX_GPMC_VIRT 0xe0000000
> +#define OMAP44XX_GPMC_SIZE SZ_1M
> +
> +
> +#define IO_OFFSET 0x90000000
> +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
> +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
> +#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
> +
> #endif
>
> #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
> diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
> index 7f57ee6..81d5ab7 100644
> --- a/arch/arm/plat-omap/include/mach/irqs.h
> +++ b/arch/arm/plat-omap/include/mach/irqs.h
> @@ -318,109 +318,114 @@
> #define INT_850_DMA_CH15 (62 + IH2_BASE)
> #define INT_850_NAND (63 + IH2_BASE)
>
> -#define INT_24XX_SYS_NIRQ 7
> -#define INT_24XX_SDMA_IRQ0 12
> -#define INT_24XX_SDMA_IRQ1 13
> -#define INT_24XX_SDMA_IRQ2 14
> -#define INT_24XX_SDMA_IRQ3 15
> -#define INT_24XX_CAM_IRQ 24
> -#define INT_24XX_DSS_IRQ 25
> -#define INT_24XX_MAIL_U0_MPU 26
> -#define INT_24XX_DSP_UMA 27
> -#define INT_24XX_DSP_MMU 28
> -#define INT_24XX_GPIO_BANK1 29
> -#define INT_24XX_GPIO_BANK2 30
> -#define INT_24XX_GPIO_BANK3 31
> -#define INT_24XX_GPIO_BANK4 32
> -#define INT_24XX_GPIO_BANK5 33
> -#define INT_24XX_MAIL_U3_MPU 34
> -#define INT_24XX_GPTIMER1 37
> -#define INT_24XX_GPTIMER2 38
> -#define INT_24XX_GPTIMER3 39
> -#define INT_24XX_GPTIMER4 40
> -#define INT_24XX_GPTIMER5 41
> -#define INT_24XX_GPTIMER6 42
> -#define INT_24XX_GPTIMER7 43
> -#define INT_24XX_GPTIMER8 44
> -#define INT_24XX_GPTIMER9 45
> -#define INT_24XX_GPTIMER10 46
> -#define INT_24XX_GPTIMER11 47
> -#define INT_24XX_GPTIMER12 48
> -#define INT_24XX_SHA1MD5 51
> -#define INT_24XX_MCBSP4_IRQ_TX 54
> -#define INT_24XX_MCBSP4_IRQ_RX 55
> -#define INT_24XX_I2C1_IRQ 56
> -#define INT_24XX_I2C2_IRQ 57
> -#define INT_24XX_HDQ_IRQ 58
> -#define INT_24XX_MCBSP1_IRQ_TX 59
> -#define INT_24XX_MCBSP1_IRQ_RX 60
> -#define INT_24XX_MCBSP2_IRQ_TX 62
> -#define INT_24XX_MCBSP2_IRQ_RX 63
> -#define INT_24XX_SPI1_IRQ 65
> -#define INT_24XX_SPI2_IRQ 66
> -#define INT_24XX_UART1_IRQ 72
> -#define INT_24XX_UART2_IRQ 73
> -#define INT_24XX_UART3_IRQ 74
> -#define INT_24XX_USB_IRQ_GEN 75
> -#define INT_24XX_USB_IRQ_NISO 76
> -#define INT_24XX_USB_IRQ_ISO 77
> -#define INT_24XX_USB_IRQ_HGEN 78
> -#define INT_24XX_USB_IRQ_HSOF 79
> -#define INT_24XX_USB_IRQ_OTG 80
> -#define INT_24XX_MCBSP5_IRQ_TX 81
> -#define INT_24XX_MCBSP5_IRQ_RX 82
> -#define INT_24XX_MMC_IRQ 83
> -#define INT_24XX_MMC2_IRQ 86
> -#define INT_24XX_MCBSP3_IRQ_TX 89
> -#define INT_24XX_MCBSP3_IRQ_RX 90
> -#define INT_24XX_SPI3_IRQ 91
> +#ifdef CONFIG_ARCH_OMAP4
> +#define IRQ_GIC_START 32
> +#else
> +#define IRQ_GIC_START 0
> +#endif
This ifdef we don't want to do as it blocks the compile
for multi-omap.
> -#define INT_243X_MCBSP2_IRQ 16
> -#define INT_243X_MCBSP3_IRQ 17
> -#define INT_243X_MCBSP4_IRQ 18
> -#define INT_243X_MCBSP5_IRQ 19
> -#define INT_243X_MCBSP1_IRQ 64
> -#define INT_243X_HS_USB_MC 92
> -#define INT_243X_HS_USB_DMA 93
> -#define INT_243X_CARKIT_IRQ 94
> +#define INT_24XX_SYS_NIRQ (7 + IRQ_GIC_START)
> +#define INT_24XX_SDMA_IRQ0 (12 + IRQ_GIC_START)
> +#define INT_24XX_SDMA_IRQ1 (13 + IRQ_GIC_START)
> +#define INT_24XX_SDMA_IRQ2 (14 + IRQ_GIC_START)
> +#define INT_24XX_SDMA_IRQ3 (15 + IRQ_GIC_START)
> +#define INT_24XX_CAM_IRQ (24 + IRQ_GIC_START)
> +#define INT_24XX_DSS_IRQ (25 + IRQ_GIC_START)
> +#define INT_24XX_MAIL_U0_MPU (26 + IRQ_GIC_START)
> +#define INT_24XX_DSP_UMA (27 + IRQ_GIC_START)
> +#define INT_24XX_DSP_MMU (28 + IRQ_GIC_START)
> +#define INT_24XX_GPIO_BANK1 (29 + IRQ_GIC_START)
> +#define INT_24XX_GPIO_BANK2 (30 + IRQ_GIC_START)
> +#define INT_24XX_GPIO_BANK3 (31 + IRQ_GIC_START)
> +#define INT_24XX_GPIO_BANK4 (32 + IRQ_GIC_START)
> +#define INT_24XX_GPIO_BANK5 (33 + IRQ_GIC_START)
> +#define INT_24XX_MAIL_U3_MPU (34 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER1 (37 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER2 (38 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER3 (39 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER4 (40 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER5 (41 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER6 (42 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER7 (43 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER8 (44 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER9 (45 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER10 (46 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER11 (47 + IRQ_GIC_START)
> +#define INT_24XX_GPTIMER12 (48 + IRQ_GIC_START)
> +#define INT_24XX_SHA1MD5 (51 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP4_IRQ_TX (54 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP4_IRQ_RX (55 + IRQ_GIC_START)
> +#define INT_24XX_I2C1_IRQ (56 + IRQ_GIC_START)
> +#define INT_24XX_I2C2_IRQ (57 + IRQ_GIC_START)
> +#define INT_24XX_HDQ_IRQ (58 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP1_IRQ_TX (59 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP1_IRQ_RX (60 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP2_IRQ_TX (62 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP2_IRQ_RX (63 + IRQ_GIC_START)
> +#define INT_24XX_SPI1_IRQ (65 + IRQ_GIC_START)
> +#define INT_24XX_SPI2_IRQ (66 + IRQ_GIC_START)
> +#define INT_24XX_UART1_IRQ (72 + IRQ_GIC_START)
> +#define INT_24XX_UART2_IRQ (73 + IRQ_GIC_START)
> +#define INT_24XX_UART3_IRQ (74 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_GEN (75 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_NISO (76 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_ISO (77 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_HGEN (78 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_HSOF (79 + IRQ_GIC_START)
> +#define INT_24XX_USB_IRQ_OTG (80 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP5_IRQ_TX (81 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP5_IRQ_RX (82 + IRQ_GIC_START)
> +#define INT_24XX_MMC_IRQ (83 + IRQ_GIC_START)
> +#define INT_24XX_MMC2_IRQ (86 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP3_IRQ_TX (89 + IRQ_GIC_START)
> +#define INT_24XX_MCBSP3_IRQ_RX (90 + IRQ_GIC_START)
> +#define INT_24XX_SPI3_IRQ (91 + IRQ_GIC_START)
>
> -#define INT_34XX_BENCH_MPU_EMUL 3
> -#define INT_34XX_ST_MCBSP2_IRQ 4
> -#define INT_34XX_ST_MCBSP3_IRQ 5
> -#define INT_34XX_SSM_ABORT_IRQ 6
> -#define INT_34XX_SYS_NIRQ 7
> -#define INT_34XX_D2D_FW_IRQ 8
> -#define INT_34XX_PRCM_MPU_IRQ 11
> -#define INT_34XX_MCBSP1_IRQ 16
> -#define INT_34XX_MCBSP2_IRQ 17
> -#define INT_34XX_MCBSP3_IRQ 22
> -#define INT_34XX_MCBSP4_IRQ 23
> -#define INT_34XX_CAM_IRQ 24
> -#define INT_34XX_MCBSP5_IRQ 27
> -#define INT_34XX_GPIO_BANK1 29
> -#define INT_34XX_GPIO_BANK2 30
> -#define INT_34XX_GPIO_BANK3 31
> -#define INT_34XX_GPIO_BANK4 32
> -#define INT_34XX_GPIO_BANK5 33
> -#define INT_34XX_GPIO_BANK6 34
> -#define INT_34XX_USIM_IRQ 35
> -#define INT_34XX_WDT3_IRQ 36
> -#define INT_34XX_SPI4_IRQ 48
> -#define INT_34XX_SHA1MD52_IRQ 49
> -#define INT_34XX_FPKA_READY_IRQ 50
> -#define INT_34XX_SHA1MD51_IRQ 51
> -#define INT_34XX_RNG_IRQ 52
> -#define INT_34XX_I2C3_IRQ 61
> -#define INT_34XX_FPKA_ERROR_IRQ 64
> -#define INT_34XX_PBIAS_IRQ 75
> -#define INT_34XX_OHCI_IRQ 76
> -#define INT_34XX_EHCI_IRQ 77
> -#define INT_34XX_TLL_IRQ 78
> -#define INT_34XX_PARTHASH_IRQ 79
> -#define INT_34XX_MMC3_IRQ 94
> -#define INT_34XX_GPT12_IRQ 95
> +#define INT_243X_MCBSP2_IRQ (16 + IRQ_GIC_START)
> +#define INT_243X_MCBSP3_IRQ (17 + IRQ_GIC_START)
> +#define INT_243X_MCBSP4_IRQ (18 + IRQ_GIC_START)
> +#define INT_243X_MCBSP5_IRQ (19 + IRQ_GIC_START)
> +#define INT_243X_MCBSP1_IRQ (64 + IRQ_GIC_START)
> +#define INT_243X_HS_USB_MC (92 + IRQ_GIC_START)
> +#define INT_243X_HS_USB_DMA (93 + IRQ_GIC_START)
> +#define INT_243X_CARKIT_IRQ (94 + IRQ_GIC_START)
>
> -#define INT_34XX_BENCH_MPU_EMUL 3
> +#define INT_34XX_BENCH_MPU_EMUL (3 + IRQ_GIC_START)
> +#define INT_34XX_ST_MCBSP2_IRQ (4 + IRQ_GIC_START)
> +#define INT_34XX_ST_MCBSP3_IRQ (5 + IRQ_GIC_START)
> +#define INT_34XX_SSM_ABORT_IRQ (6 + IRQ_GIC_START)
> +#define INT_34XX_SYS_NIRQ (7 + IRQ_GIC_START)
> +#define INT_34XX_D2D_FW_IRQ (8 + IRQ_GIC_START)
> +#define INT_34XX_PRCM_MPU_IRQ (11 + IRQ_GIC_START)
> +#define INT_34XX_MCBSP1_IRQ (16 + IRQ_GIC_START)
> +#define INT_34XX_MCBSP2_IRQ (17 + IRQ_GIC_START)
> +#define INT_34XX_MCBSP3_IRQ (22 + IRQ_GIC_START)
> +#define INT_34XX_MCBSP4_IRQ (23 + IRQ_GIC_START)
> +#define INT_34XX_CAM_IRQ (24 + IRQ_GIC_START)
> +#define INT_34XX_MCBSP5_IRQ (27 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK1 (29 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK2 (30 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK3 (31 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK4 (32 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK5 (33 + IRQ_GIC_START)
> +#define INT_34XX_GPIO_BANK6 (34 + IRQ_GIC_START)
> +#define INT_34XX_USIM_IRQ (35 + IRQ_GIC_START)
> +#define INT_34XX_WDT3_IRQ (36 + IRQ_GIC_START)
> +#define INT_34XX_SPI4_IRQ (48 + IRQ_GIC_START)
> +#define INT_34XX_SHA1MD52_IRQ (49 + IRQ_GIC_START)
> +#define INT_34XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
> +#define INT_34XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
> +#define INT_34XX_RNG_IRQ (52 + IRQ_GIC_START)
> +#define INT_34XX_I2C3_IRQ (61 + IRQ_GIC_START)
> +#define INT_34XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
> +#define INT_34XX_PBIAS_IRQ (75 + IRQ_GIC_START)
> +#define INT_34XX_OHCI_IRQ (76 + IRQ_GIC_START)
> +#define INT_34XX_EHCI_IRQ (77 + IRQ_GIC_START)
> +#define INT_34XX_TLL_IRQ (78 + IRQ_GIC_START)
> +#define INT_34XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
> +#define INT_34XX_MMC3_IRQ (94 + IRQ_GIC_START)
> +#define INT_34XX_GPT12_IRQ (95 + IRQ_GIC_START)
> +#define INT_44XX_SPI5_IRQ (69 + IRQ_GIC_START)
How about just add extra + 32 to the omap4 specific
defines? Something like this maybe:
#define OMAP4_GIC_OFFSET 32
#define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
It's OK to define the numbers separately for each processors:
#define INT_34XX_TLL_IRQ (78 + IRQ_GIC_START)
...
#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
>
> /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
> * 16 MPUIO lines */
> diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
> index 99ed564..9ad41dc 100644
> --- a/arch/arm/plat-omap/include/mach/memory.h
> +++ b/arch/arm/plat-omap/include/mach/memory.h
> @@ -38,7 +38,8 @@
> */
> #if defined(CONFIG_ARCH_OMAP1)
> #define PHYS_OFFSET UL(0x10000000)
> -#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> #define PHYS_OFFSET UL(0x80000000)
> #endif
>
> diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
> index 8a676a0..ed4738b 100644
> --- a/arch/arm/plat-omap/include/mach/serial.h
> +++ b/arch/arm/plat-omap/include/mach/serial.h
> @@ -15,19 +15,28 @@
> #define OMAP_UART1_BASE 0xfffb0000
> #define OMAP_UART2_BASE 0xfffb0800
> #define OMAP_UART3_BASE 0xfffb9800
> +#define OMAP_MAX_NR_PORTS 3
> #elif defined(CONFIG_ARCH_OMAP2)
> /* OMAP2 serial ports */
> #define OMAP_UART1_BASE 0x4806a000
> #define OMAP_UART2_BASE 0x4806c000
> #define OMAP_UART3_BASE 0x4806e000
> +#define OMAP_MAX_NR_PORTS 3
> #elif defined(CONFIG_ARCH_OMAP3)
> /* OMAP3 serial ports */
> #define OMAP_UART1_BASE 0x4806a000
> #define OMAP_UART2_BASE 0x4806c000
> #define OMAP_UART3_BASE 0x49020000
> +#define OMAP_MAX_NR_PORTS 3
> +#elif defined(CONFIG_ARCH_OMAP4)
> +/* OMAP4 serial ports */
> +#define OMAP_UART1_BASE 0x4806a000
> +#define OMAP_UART2_BASE 0x4806c000
> +#define OMAP_UART3_BASE 0x48020000
> +#define OMAP_UART4_BASE 0x4806e000
> +#define OMAP_MAX_NR_PORTS 4
> #endif
>
> -#define OMAP_MAX_NR_PORTS 3
> #define OMAP1510_BASE_BAUD (12000000/16)
> #define OMAP16XX_BASE_BAUD (48000000/16)
> #define OMAP24XX_BASE_BAUD (48000000/16)
Again, we should fix the serial defines so we don't have ifdef for the
various processors. I think this is already in Kevin's uart patches,
just FYI, OK to keep for now.
> diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
> index 1060e34..371f98a 100644
> --- a/arch/arm/plat-omap/include/mach/system.h
> +++ b/arch/arm/plat-omap/include/mach/system.h
> @@ -48,4 +48,11 @@ static inline void arch_reset(char mode, const char *cmd)
> omap_prcm_arch_reset(mode);
> }
>
> +#ifdef CONFIG_ARCH_OMAP4
> +void omap_prcm_arch_reset(char mode)
> +{
> + /* dummy hook for Linking */
> +}
> +#endif
> +
> #endif
This should be named omap4_prcm_arch_reset() and then we just set
the right function pointer. Otherwise we'll break multi-omap
unnecessarily!
Tony
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources.
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
2009-04-21 13:21 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Premi, Sanjeev
@ 2009-04-21 18:33 ` Tony Lindgren
2 siblings, 0 replies; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:33 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch updates the common platform source files for OMAP4430.
> Few OMAP4 peripherals are common with OMAP3 architecture.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/common.c | 29 +++++++++++-
> arch/arm/plat-omap/devices.c | 2 +
> arch/arm/plat-omap/dma.c | 10 +++-
> arch/arm/plat-omap/dmtimer.c | 42 +++++++++++++++--
> arch/arm/plat-omap/gpio.c | 109 ++++++++++++++++++++++++++++-------------
> arch/arm/plat-omap/io.c | 18 +++++++-
> arch/arm/plat-omap/mux.c | 3 +
> arch/arm/plat-omap/sram.c | 20 ++++++++
> 8 files changed, 189 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
> index d179714..ca2c382 100644
> --- a/arch/arm/plat-omap/common.c
> +++ b/arch/arm/plat-omap/common.c
> @@ -177,7 +177,8 @@ console_initcall(omap_add_serial_console);
>
> #if defined(CONFIG_ARCH_OMAP16XX)
> #define TIMER_32K_SYNCHRONIZED 0xfffbc410
> -#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> #define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
> #endif
>
> @@ -252,6 +253,16 @@ static void __init __omap2_set_globals(void)
>
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP4) /* sdrc and sms are not needed on omap4*/
> +static struct omap_globals *omap2_globals;
> +
> +static void __init __omap2_set_globals(void)
> +{
> + omap2_set_globals_tap(omap2_globals);
> + omap2_set_globals_control(omap2_globals);
> +}
> +#endif
> +
> #if defined(CONFIG_ARCH_OMAP2420)
>
> static struct omap_globals omap242x_globals = {
> @@ -309,3 +320,19 @@ void __init omap2_set_globals_343x(void)
> }
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP4430)
> +static struct omap_globals omap443x_globals = {
> + .class = OMAP443X_CLASS,
> + .tap = OMAP2_IO_ADDRESS(0x4830A000),
> + .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
> + .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
> + .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
> +};
> +
> +void __init omap2_set_globals_443x(void)
> +{
> + omap2_globals = &omap443x_globals;
> + __omap2_set_globals();
> +}
> +#endif
> +
> diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
> index 87fb7ff..a016c6c 100644
> --- a/arch/arm/plat-omap/devices.c
> +++ b/arch/arm/plat-omap/devices.c
> @@ -311,6 +311,8 @@ static void omap_init_wdt(void)
> wdt_resources[0].start = 0x49016000; /* WDT2 */
> else if (cpu_is_omap343x())
> wdt_resources[0].start = 0x48314000; /* WDT2 */
> + else if (cpu_is_omap44xx())
> + wdt_resources[0].start = 0x4A314000;
> else
> return;
>
> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
> index 21cc014..36d066d 100644
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
> }
> l = dma_read(CCR(lch));
> l &= ~((1 << 6) | (1 << 26));
> - if (cpu_is_omap2430() || cpu_is_omap34xx())
> + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
> l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
> else
> l |= ((read_prio & 0x1) << 6);
> @@ -1824,7 +1824,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
> #define omap1_dma_irq_handler NULL
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
>
> static int omap2_dma_handle_ch(int ch)
> {
> @@ -2319,6 +2320,9 @@ static int __init omap_init_dma(void)
> } else if (cpu_is_omap34xx()) {
> omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
> dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
> + } else if (cpu_is_omap44xx()) {
> + omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
> + dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
> } else {
> pr_err("DMA init failed for unsupported omap\n");
> return -ENODEV;
> @@ -2417,7 +2421,7 @@ static int __init omap_init_dma(void)
> }
> }
>
> - if (cpu_is_omap2430() || cpu_is_omap34xx())
> + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
> omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
> DMA_DEFAULT_FIFO_DEPTH, 0);
>
> diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
> index bfd4757..d0e2119 100644
> --- a/arch/arm/plat-omap/dmtimer.c
> +++ b/arch/arm/plat-omap/dmtimer.c
> @@ -150,7 +150,8 @@
> struct omap_dm_timer {
> unsigned long phys_base;
> int irq;
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> struct clk *iclk, *fclk;
> #endif
> void __iomem *io_base;
> @@ -250,6 +251,37 @@ static const char *omap3_dm_source_names[] __initdata = {
> static struct clk **omap3_dm_source_clocks[2];
> static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
>
> +#elif defined(CONFIG_ARCH_OMAP4)
> +
> +#define omap_dm_clk_enable(x) clk_enable(x)
> +#define omap_dm_clk_disable(x) clk_disable(x)
> +#define omap1_dm_timers NULL
> +#define omap2_dm_timers NULL
> +#define omap2_dm_source_names NULL
> +#define omap2_dm_source_clocks NULL
> +
> +static struct omap_dm_timer omap3_dm_timers[] = {
> + { .phys_base = 0x4A318000, .irq = INT_24XX_GPTIMER1 },
> + { .phys_base = 0x48032000, .irq = INT_24XX_GPTIMER2 },
> + { .phys_base = 0x48034000, .irq = INT_24XX_GPTIMER3 },
> + { .phys_base = 0x48036000, .irq = INT_24XX_GPTIMER4 },
> + { .phys_base = 0x40138000, .irq = INT_24XX_GPTIMER5 },
> + { .phys_base = 0x4013A000, .irq = INT_24XX_GPTIMER6 },
> + { .phys_base = 0x4013C000, .irq = INT_24XX_GPTIMER7 },
> + { .phys_base = 0x4013E000, .irq = INT_24XX_GPTIMER8 },
> + { .phys_base = 0x4803E000, .irq = INT_24XX_GPTIMER9 },
> + { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
> + { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
> + { .phys_base = 0x4A320000, .irq = INT_24XX_GPTIMER12 },
> +};
> +static const char *omap3_dm_source_names[] __initdata = {
> + "sys_ck",
> + "omap_32k_fck",
> + NULL
> +};
> +static struct clk **omap3_dm_source_clocks[2];
> +static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
> +
> #else
>
> #error OMAP architecture not supported!
> @@ -461,7 +493,8 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
> }
> EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>
> -#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
> +#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
>
> struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
> {
> @@ -701,7 +734,7 @@ int __init omap_dm_timer_init(void)
> dm_timers = omap2_dm_timers;
> dm_source_names = (char **)omap2_dm_source_names;
> dm_source_clocks = (struct clk **)omap2_dm_source_clocks;
> - } else if (cpu_is_omap34xx()) {
> + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> dm_timers = omap3_dm_timers;
> dm_source_names = (char **)omap3_dm_source_names;
> dm_source_clocks = (struct clk **)omap3_dm_source_clocks;
> @@ -717,7 +750,8 @@ int __init omap_dm_timer_init(void)
> for (i = 0; i < dm_timer_count; i++) {
> timer = &dm_timers[i];
> timer->io_base = IO_ADDRESS(timer->phys_base);
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
> + defined(CONFIG_ARCH_OMAP4)
> if (cpu_class_is_omap2()) {
> char clk_name[16];
> sprintf(clk_name, "gpt%d_ick", i + 1);
> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
> index d3fa41e..8bfc819 100644
> --- a/arch/arm/plat-omap/gpio.c
> +++ b/arch/arm/plat-omap/gpio.c
> @@ -136,15 +136,24 @@
> #define OMAP24XX_GPIO_SETDATAOUT 0x0094
>
> /*
> - * omap34xx specific GPIO registers
> + * omap34xx, omap44xx specific GPIO registers
> */
>
> +#ifdef CONFIG_ARCH_OMAP4430
> +#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x4A310000)
> +#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x48055000)
> +#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x48057000)
> +#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x48059000)
> +#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x4805B000)
> +#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x4805D000)
> +#else
> #define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000)
> #define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000)
> #define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000)
> #define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000)
> #define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
> #define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
> +#endif
>
> #define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
>
Above you should just define separate GPIO banks for omap4, otherwise
multi-omap build will break.
> @@ -153,11 +162,13 @@ struct gpio_bank {
> u16 irq;
> u16 virtual_irq_start;
> int method;
> -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> u32 suspend_wakeup;
> u32 saved_wakeup;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> u32 non_wakeup_gpios;
> u32 enabled_non_wakeup_gpios;
>
> @@ -239,7 +250,7 @@ static struct gpio_bank gpio_bank_243x[5] = {
>
> #endif
>
> -#ifdef CONFIG_ARCH_OMAP34XX
> +#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> static struct gpio_bank gpio_bank_34xx[6] = {
> { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
> { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
> @@ -275,6 +286,8 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
> return &gpio_bank[gpio >> 5];
> if (cpu_is_omap34xx())
> return &gpio_bank[gpio >> 5];
> + if (cpu_is_omap44xx())
> + return &gpio_bank[gpio >> 5];
> BUG();
> return NULL;
> }
> @@ -287,6 +300,8 @@ static inline int get_gpio_index(int gpio)
> return gpio & 0x1f;
> if (cpu_is_omap34xx())
> return gpio & 0x1f;
> + if (cpu_is_omap44xx())
> + return gpio & 0x1f;
> return gpio & 0x0f;
> }
>
> @@ -309,6 +324,8 @@ static inline int gpio_valid(int gpio)
> return 0;
> if (cpu_is_omap34xx() && gpio < 160)
> return 0;
> + if (cpu_is_omap44xx() && gpio < 160)
> + return 0;
> return -1;
> }
>
> @@ -353,7 +370,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
> reg += OMAP850_GPIO_DIR_CONTROL;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_OE;
> break;
> @@ -425,7 +443,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
> l &= ~(1 << gpio);
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (enable)
> reg += OMAP24XX_GPIO_SETDATAOUT;
> @@ -476,7 +495,8 @@ static int __omap_get_gpio_datain(int gpio)
> reg += OMAP850_GPIO_DATA_INPUT;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_DATAIN;
> break;
> @@ -520,7 +540,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
> else
> goto done;
>
> - if (cpu_is_omap34xx()) {
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> if (enable)
> clk_enable(bank->dbck);
> else
> @@ -550,7 +570,8 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
> }
> EXPORT_SYMBOL(omap_set_gpio_debounce_time);
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> int trigger)
> {
> @@ -660,7 +681,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> goto bad;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> set_24xx_gpio_triggering(bank, gpio, trigger);
> break;
> @@ -745,7 +767,8 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
> reg += OMAP850_GPIO_INT_STATUS;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_IRQSTATUS1;
> break;
> @@ -810,7 +833,8 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
> inv = 1;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> reg += OMAP24XX_GPIO_IRQENABLE1;
> mask = 0xffffffff;
> @@ -883,7 +907,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
> l |= gpio_mask;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (enable)
> reg += OMAP24XX_GPIO_SETIRQENABLE1;
> @@ -931,7 +956,8 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
> spin_unlock_irqrestore(&bank->lock, flags);
> return 0;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> if (bank->non_wakeup_gpios & (1 << gpio)) {
> printk(KERN_ERR "Unable to modify wakeup on "
> @@ -1019,7 +1045,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
> __raw_writel(1 << offset, reg);
> }
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX) {
> /* Disable wake-up during idle for dynamic tick */
> void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> @@ -1071,7 +1098,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
> if (bank->method == METHOD_GPIO_850)
> isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX)
> isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
> #endif
> @@ -1348,7 +1376,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
> /*---------------------------------------------------------------------*/
>
> static int initialized;
> -#if !defined(CONFIG_ARCH_OMAP3)
> +#if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4))
> static struct clk * gpio_ick;
> #endif
>
> @@ -1361,7 +1389,7 @@ static struct clk * gpio5_ick;
> static struct clk * gpio5_fck;
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP3)
> +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
> static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
> #endif
>
> @@ -1421,8 +1449,8 @@ static int __init _omap_gpio_init(void)
> }
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP3)
> - if (cpu_is_omap34xx()) {
> +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
> sprintf(clk_name, "gpio%d_ick", i + 1);
> gpio_iclks[i] = clk_get(NULL, clk_name);
> @@ -1488,8 +1516,8 @@ static int __init _omap_gpio_init(void)
> (rev >> 4) & 0x0f, rev & 0x0f);
> }
> #endif
> -#ifdef CONFIG_ARCH_OMAP34XX
> - if (cpu_is_omap34xx()) {
> +#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> int rev;
>
> gpio_bank_count = OMAP34XX_NR_GPIOS;
> @@ -1522,7 +1550,8 @@ static int __init _omap_gpio_init(void)
> gpio_count = 32; /* 730 has 32-bit GPIOs */
> }
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> if (bank->method == METHOD_GPIO_24XX) {
> static const u32 non_wakeup_gpios[] = {
> 0xe203ffc0, 0x08700040
> @@ -1579,7 +1608,7 @@ static int __init _omap_gpio_init(void)
> set_irq_chained_handler(bank->irq, gpio_irq_handler);
> set_irq_data(bank->irq, bank);
>
> - if (cpu_is_omap34xx()) {
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> sprintf(clk_name, "gpio%d_dbck", i + 1);
> bank->dbck = clk_get(NULL, clk_name);
> if (IS_ERR(bank->dbck))
> @@ -1601,7 +1630,8 @@ static int __init _omap_gpio_init(void)
> return 0;
> }
>
> -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> {
> int i;
> @@ -1624,7 +1654,8 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
> wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> @@ -1665,7 +1696,8 @@ static int omap_gpio_resume(struct sys_device *dev)
> wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> break;
> #endif
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> case METHOD_GPIO_24XX:
> wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> @@ -1697,7 +1729,8 @@ static struct sys_device omap_gpio_device = {
>
> #endif
>
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
>
> static int workaround_enabled;
>
> @@ -1713,7 +1746,8 @@ void omap2_gpio_prepare_for_retention(void)
>
> if (!(bank->enabled_non_wakeup_gpios))
> continue;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
> l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
> l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
> @@ -1722,7 +1756,8 @@ void omap2_gpio_prepare_for_retention(void)
> bank->saved_risingdetect = l2;
> l1 &= ~bank->enabled_non_wakeup_gpios;
> l2 &= ~bank->enabled_non_wakeup_gpios;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
> __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
> #endif
> @@ -1747,7 +1782,8 @@ void omap2_gpio_resume_after_retention(void)
>
> if (!(bank->enabled_non_wakeup_gpios))
> continue;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> __raw_writel(bank->saved_fallingdetect,
> bank->base + OMAP24XX_GPIO_FALLINGDETECT);
> __raw_writel(bank->saved_risingdetect,
> @@ -1757,14 +1793,16 @@ void omap2_gpio_resume_after_retention(void)
> * state. If so, generate an IRQ by software. This is
> * horribly racy, but it's the best we can do to work around
> * this silicon bug. */
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
> #endif
> l ^= bank->saved_datain;
> l &= bank->non_wakeup_gpios;
> if (l) {
> u32 old0, old1;
> -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
> + defined(CONFIG_ARCH_OMAP44XX)
> old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
> old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
> __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
> @@ -1800,7 +1838,8 @@ static int __init omap_gpio_sysinit(void)
>
> mpuio_init();
>
> -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
> + defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
> if (ret == 0) {
> ret = sysdev_class_register(&omap_gpio_sysclass);
> @@ -1889,7 +1928,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
>
> irqstat = irq_desc[irq].status;
> #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
> - defined(CONFIG_ARCH_OMAP34XX)
> + defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP44XX)
> if (is_in && ((bank->suspend_wakeup & mask)
> || irqstat & IRQ_TYPE_SENSE_MASK)) {
> char *trigger = NULL;
> diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
> index af326ef..a46f328 100644
> --- a/arch/arm/plat-omap/io.c
> +++ b/arch/arm/plat-omap/io.c
> @@ -7,6 +7,7 @@
> #include <mach/omap16xx.h>
> #include <mach/omap24xx.h>
> #include <mach/omap34xx.h>
> +#include <mach/omap44xx.h>
>
> #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
> #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
> @@ -92,7 +93,22 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
> return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
> }
> #endif
> -
> +#ifdef CONFIG_ARCH_OMAP4
> + if (cpu_is_omap44xx()) {
> + if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
> + return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
> + if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
> + return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
> + if (BETWEEN(p, L4_WK_44XX_PHYS, L4_WK_44XX_SIZE))
> + return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT);
> + if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
> + return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
> + if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
> + return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
> + if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
> + return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
> + }
> +#endif
> return __arm_ioremap(p, size, type);
> }
> EXPORT_SYMBOL(omap_ioremap);
> diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
> index 80b040f..8d329fb 100644
> --- a/arch/arm/plat-omap/mux.c
> +++ b/arch/arm/plat-omap/mux.c
> @@ -54,6 +54,9 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
> {
> struct pin_config *reg;
>
> + if (cpu_is_omap44xx())
> + return 0;
> +
> if (mux_cfg == NULL) {
> printk(KERN_ERR "Pin mux table not initialized\n");
> return -ENODEV;
> diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
> index fa5297d..4f45d6c 100644
> --- a/arch/arm/plat-omap/sram.c
> +++ b/arch/arm/plat-omap/sram.c
> @@ -44,6 +44,8 @@
> #define OMAP3_SRAM_VA 0xd7000000
> #define OMAP3_SRAM_PUB_PA 0x40208000
> #define OMAP3_SRAM_PUB_VA 0xd7008000
> +#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/
> +#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/
Please add spaces around the comments above, like /* 0xd70f0000 */.
>
> #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> #define SRAM_BOOTLOADER_SZ 0x00
> @@ -87,6 +89,10 @@ static int is_sram_locked(void)
> {
> int type = 0;
>
> + if (cpu_is_omap44xx())
> + /* Not yet supported */
> + return 0;
> +
> if (cpu_is_omap242x())
> type = omap_rev() & OMAP2_DEVICETYPE_MASK;
>
> @@ -135,6 +141,10 @@ void __init omap_detect_sram(void)
> omap_sram_base = OMAP3_SRAM_VA;
> omap_sram_start = OMAP3_SRAM_PA;
> omap_sram_size = 0x10000; /* 64K */
> + } else if (cpu_is_omap44xx()) {
> + omap_sram_base = OMAP4_SRAM_VA;
> + omap_sram_start = OMAP4_SRAM_PA;
> + omap_sram_size = 0x8000; /* 32K */
> } else {
> omap_sram_base = OMAP2_SRAM_VA;
> omap_sram_start = OMAP2_SRAM_PA;
> @@ -203,6 +213,12 @@ void __init omap_map_sram(void)
> omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
> }
>
> + if (cpu_is_omap44xx()) {
> + omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
> + base = OMAP4_SRAM_PA;
> + base = ROUND_DOWN(base, PAGE_SIZE);
> + omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
> + }
> omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
> iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
>
> @@ -242,10 +258,12 @@ void * omap_sram_push(void * start, unsigned long size)
> return (void *)omap_sram_ceil;
> }
>
> +#ifndef CONFIG_ARCH_OMAP4 /* to remove compile time warning */
> static void omap_sram_error(void)
> {
> panic("Uninitialized SRAM function\n");
> }
> +#endif
How about just add something like this instead of the ifndef?
if (cpu_is_omap44xx())
return;
Then add a REVISIT comment there so we'll remember to remove it later :)
> #ifdef CONFIG_ARCH_OMAP1
>
> @@ -406,6 +424,8 @@ int __init omap_sram_init(void)
> omap243x_sram_init();
> else if (cpu_is_omap34xx())
> omap34xx_sram_init();
> + else if (cpu_is_omap44xx())
> + omap34xx_sram_init(); /* REVISIT: */
>
> return 0;
> }
> --
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources.
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
` (2 preceding siblings ...)
2009-04-21 16:23 ` Kevin Hilman
@ 2009-04-21 18:36 ` Tony Lindgren
2009-04-22 4:40 ` Shilimkar, Santosh
3 siblings, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:36 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch updates the common machine spcific source files for OMAP4430.
> Few OMAP4 peripherals are common with OMAP3 architecture. Lot of code
> gets re-used because of this.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/mach-omap2/gpmc.c | 3 ++
> arch/arm/mach-omap2/id.c | 5 +++-
> arch/arm/mach-omap2/io.c | 48 ++++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/timer-gp.c | 6 ++++-
> 4 files changed, 60 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
> index 2249049..07aea04 100644
> --- a/arch/arm/mach-omap2/gpmc.c
> +++ b/arch/arm/mach-omap2/gpmc.c
> @@ -424,6 +424,9 @@ void __init gpmc_init(void)
> } else if (cpu_is_omap34xx()) {
> ck = "gpmc_fck";
> l = OMAP34XX_GPMC_BASE;
> + } else if (cpu_is_omap44xx()) {
> + ck = "gpmc_fck";
> + l = OMAP44XX_GPMC_BASE;
> }
>
> gpmc_l3_clk = clk_get(NULL, ck);
> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> index 34b5914..f69384d 100644
> --- a/arch/arm/mach-omap2/id.c
> +++ b/arch/arm/mach-omap2/id.c
> @@ -196,7 +196,10 @@ void __init omap2_check_revision(void)
> * At this point we have an idea about the processor revision set
> * earlier with omap2_set_globals_tap().
> */
> - if (cpu_is_omap24xx())
> + if (cpu_is_omap44xx()) {
> + printk(KERN_INFO "CPU revision = OMAP4430\n"); /* Fix Me*/
> + return;
> + } else if (cpu_is_omap24xx())
> omap24xx_check_revision();
> else if (cpu_is_omap34xx())
> omap34xx_check_revision();
> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
> index 916fcd3..3f7a7f5 100644
> --- a/arch/arm/mach-omap2/io.c
> +++ b/arch/arm/mach-omap2/io.c
> @@ -30,6 +30,7 @@
> #include <mach/sdrc.h>
> #include <mach/gpmc.h>
>
> +#ifndef CONFIG_ARCH_OMAP4 /* Clock framework is still not supported for OMAP4*/
> #include "clock.h"
>
> #include <mach/powerdomain.h>
> @@ -38,6 +39,7 @@
>
> #include <mach/clockdomain.h>
> #include "clockdomains.h"
> +#endif
>
> /*
> * The machine specific code may provide the extra mapping besides the
> @@ -166,6 +168,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
> },
> };
> #endif
> +#ifdef CONFIG_ARCH_OMAP44XX
> +static struct map_desc omap44xx_io_desc[] __initdata = {
> + {
> + .virtual = L3_44XX_VIRT,
> + .pfn = __phys_to_pfn(L3_44XX_PHYS),
> + .length = L3_44XX_SIZE,
> + .type = MT_DEVICE
> + },
> + {
> + .virtual = L4_44XX_VIRT,
> + .pfn = __phys_to_pfn(L4_44XX_PHYS),
> + .length = L4_44XX_SIZE,
> + .type = MT_DEVICE
> + },
> + {
> + .virtual = L4_WK_44XX_VIRT,
> + .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
> + .length = L4_WK_44XX_SIZE,
> + .type = MT_DEVICE
> + },
> + {
> + .virtual = OMAP44XX_GPMC_VIRT,
> + .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
> + .length = OMAP44XX_GPMC_SIZE,
> + .type = MT_DEVICE
> + },
> + {
> + .virtual = L4_PER_44XX_VIRT,
> + .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
> + .length = L4_PER_44XX_SIZE,
> + .type = MT_DEVICE
> + },
> + {
> + .virtual = L4_EMU_44XX_VIRT,
> + .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
> + .length = L4_EMU_44XX_SIZE,
> + .type = MT_DEVICE
> + },
> +};
> +#endif
>
> void __init omap2_map_common_io(void)
> {
> @@ -183,6 +225,10 @@ void __init omap2_map_common_io(void)
> iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
> #endif
>
> +#if defined(CONFIG_ARCH_OMAP44XX)
> + iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
> +#endif
> +
This will break multi-omap. The cpu_is_omap44xx() works very early
during the boot nowadays as the omap2_set_globals_44xx() initializes
that, so please use that instead.
> /* Normally devicemaps_init() would flush caches and tlb after
> * mdesc->map_io(), but we must also do it here because of the CPU
> * revision check below.
> @@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
> void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
> {
> omap2_mux_init();
> +#ifndef CONFIG_ARCH_OMAP4 /* REVISIT: to avoid build errors */
> pwrdm_init(powerdomains_omap);
> clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
> omap2_clk_init();
> omap2_sdrc_init(sp);
> +#endif
> gpmc_init();
> }
Please use cpu_is_omap44xx() here too instead of the ifndef.
> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> index 9fc13a2..f9f41df 100644
> --- a/arch/arm/mach-omap2/timer-gp.c
> +++ b/arch/arm/mach-omap2/timer-gp.c
> @@ -75,7 +75,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
> case CLOCK_EVT_MODE_PERIODIC:
> period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
> period -= 1;
> -
> + if (cpu_is_omap44xx())
> + period = 0xFF;
> omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
> break;
> case CLOCK_EVT_MODE_ONESHOT:
> @@ -108,6 +109,9 @@ static void __init omap2_gp_clockevent_init(void)
> omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
> #endif
> tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
> + if (cpu_is_omap44xx())
> + /* Assuming 32kHz clk is driving GPT1 */
> + tick_rate = 32768;
>
> omap2_gp_timer_irq.dev_id = (void *)gptimer;
> setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
> --
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in.
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 7/7][RFC] OMAP4: Enable basic build support Santosh Shilimkar
@ 2009-04-21 18:37 ` Tony Lindgren
1 sibling, 0 replies; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:37 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch update the cooomon clock.c file for OMAP4. The clk_get() and
> clk_put() sunctions are moved to common place in arch/arm/common/clkdev.c
> Since on current OMAP$ platform clk management is still not supported, the
> internal file is hacked.
> Once the framework is ready the CONFIG_CLKDEV will be used.
Maybe set up a dummy clock44xx.c instead? Then add to the comments that
it's the placeholder for the upcoming omap4 clock framework.
Tony
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/clock.c | 26 ++++++++++++++++++++++++++
> 1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
> index 2e06145..7eb96a0 100644
> --- a/arch/arm/plat-omap/clock.c
> +++ b/arch/arm/plat-omap/clock.c
> @@ -36,10 +36,30 @@ static struct clk_functions *arch_clock;
> * Standard clock functions defined in include/linux/clk.h
> *-------------------------------------------------------------------------*/
>
> +/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
> + * clock framework is not up , it is defined here to avoid rework in
> + * every driver */
> +
> +/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
> +#if defined(CONFIG_ARCH_OMAP4)
> +struct clk *clk_get(struct device *dev, const char *id)
> +{
> + return 0;
> +}
> +EXPORT_SYMBOL(clk_get);
> +
> +void clk_put(struct clk *clk)
> +{
> +}
> +EXPORT_SYMBOL(clk_put);
> +#endif
> int clk_enable(struct clk *clk)
> {
> unsigned long flags;
> int ret = 0;
> + if (cpu_is_omap44xx())
> + /* OMAP4 clk framework not supported yet */
> + return 0;
>
> if (clk == NULL || IS_ERR(clk))
> return -EINVAL;
> @@ -56,6 +76,9 @@ EXPORT_SYMBOL(clk_enable);
> void clk_disable(struct clk *clk)
> {
> unsigned long flags;
> + if (cpu_is_omap44xx())
> + /* OMAP4 clk framework not supported yet */
> + return ;
>
> if (clk == NULL || IS_ERR(clk))
> return;
> @@ -80,6 +103,9 @@ unsigned long clk_get_rate(struct clk *clk)
> {
> unsigned long flags;
> unsigned long ret = 0;
> + if (cpu_is_omap44xx())
> + /* OMAP4 clk framework not supported yet */
> + return 0;
>
> if (clk == NULL || IS_ERR(clk))
> return 0;
> --
> 1.5.4.7
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.
2009-04-21 13:08 ` [PATCH 7/7][RFC] OMAP4: Enable basic build support Santosh Shilimkar
@ 2009-04-21 18:39 ` Tony Lindgren
2009-04-22 4:55 ` Shilimkar, Santosh
0 siblings, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-21 18:39 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap
* Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> This patch updates the Makefile and defconfig for OMAP4. Minimal set of
> drivers are enabled fot the kernel bootup.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/Makefile | 1 +
> arch/arm/configs/omap_4430sdp_defconfig | 807 +++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/Makefile | 6 +-
> 3 files changed, 813 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/configs/omap_4430sdp_defconfig
<snip snip>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index c49d9bf..68d50a8 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -3,9 +3,13 @@
> #
>
> # Common support
> +ifeq ($(CONFIG_ARCH_OMAP4),y)
> +obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
> +else
> obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \
> devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
> clockdomain.o
> +endif
This ifeq else we don't want to do as it breaks things for multi-omap.
Regards,
Tony
>
> obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
>
> @@ -44,7 +48,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
> mmc-twl4030.o
> obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
> mmc-twl4030.o
> -
> +obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
> obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
> board-rx51-peripherals.o \
> mmc-twl4030.o
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-21 18:26 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Tony Lindgren
@ 2009-04-22 4:10 ` Shilimkar, Santosh
2009-04-22 19:11 ` Tony Lindgren
0 siblings, 1 reply; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-22 4:10 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Tony Lindgren
> Sent: Tuesday, April 21, 2009 11:57 PM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH 3/7][RFC] OMAP4: Update common omap
> platform headers.
>
> > -#define INT_24XX_SPI3_IRQ 91
> > +#ifdef CONFIG_ARCH_OMAP4
> > +#define IRQ_GIC_START 32
> > +#else
> > +#define IRQ_GIC_START 0
> > +#endif
>
> This ifdef we don't want to do as it blocks the compile
> for multi-omap.
Not sure why this should break multi-omap. As I mentioned in one of the patch OMAP4 may not be
able to support multi-omap because of major differences on Memory controller and Interrupt handling.
This macro ensures that only for OMAP4 all the IRQ lines are offseted by 32 and for rest of the OMAPs the offset is zero. Because that's the only change necessary.
May be I haven't understood your point here.
>
> How about just add extra + 32 to the omap4 specific
> defines? Something like this maybe:
>
> #define OMAP4_GIC_OFFSET 32
> #define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
>
> It's OK to define the numbers separately for each processors:
I thought about this but this will have impact on the drivers as well. In every driver you need to put different IRQ line macros depending on the OMAP2/3/4.
Just as an example UART1 uses "INT_24XX_UART1_IRQ" as the IRQ line number for OMAP2, OMAP3 and now for OMAP4 ( just offseted by 32).
If we define separate macros for each processor, we would be unnecessarily polluting the driver code with switches. Secondly, in this file itself we will be adding around 100 + lines of code just to take care of 32 offset.
If we are not breaking multi-omap for OMAP2/3, then this should be ok.
> > diff --git a/arch/arm/plat-omap/include/mach/system.h
> b/arch/arm/plat-omap/include/mach/system.h
> > index 1060e34..371f98a 100644
> > --- a/arch/arm/plat-omap/include/mach/system.h
> > +++ b/arch/arm/plat-omap/include/mach/system.h
> > @@ -48,4 +48,11 @@ static inline void arch_reset(char mode,
> const char *cmd)
> > omap_prcm_arch_reset(mode);
> > }
> >
> > +#ifdef CONFIG_ARCH_OMAP4
> > +void omap_prcm_arch_reset(char mode)
> > +{
> > + /* dummy hook for Linking */
> > +}
> > +#endif
> > +
> > #endif
>
> This should be named omap4_prcm_arch_reset() and then we just set
> the right function pointer. Otherwise we'll break multi-omap
> unnecessarily!
omap_prcm_arch_reset() is called from arch_reset(). Currently since prcm files are not present/used for omap4, I get linking problem for just this API. Even if I make omap4_prcm_arch_reset(), I still need to compile out
omap_prcm_arch_reset() from arch_reset() which will look worser than this one.
Thanks !!
Regards
Santosh
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources.
2009-04-21 18:36 ` Tony Lindgren
@ 2009-04-22 4:40 ` Shilimkar, Santosh
0 siblings, 0 replies; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-22 4:40 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
Regards,
Santosh
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, April 22, 2009 12:07 AM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH 5/7][RFC] OMAP4: Update common omap
> machine specific sources.
>
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> > This patch updates the common machine spcific source files
> for OMAP4430.
> > Few OMAP4 peripherals are common with OMAP3 architecture.
> Lot of code
> > gets re-used because of this.
> >
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> > arch/arm/mach-omap2/gpmc.c | 3 ++
> > arch/arm/mach-omap2/id.c | 5 +++-
> > arch/arm/mach-omap2/io.c | 48
> ++++++++++++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/timer-gp.c | 6 ++++-
> > 4 files changed, 60 insertions(+), 2 deletions(-)
> >
> > void __init omap2_map_common_io(void)
> > {
> > @@ -183,6 +225,10 @@ void __init omap2_map_common_io(void)
> > iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
> > #endif
> >
> > +#if defined(CONFIG_ARCH_OMAP44XX)
> > + iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
> > +#endif
> > +
>
> This will break multi-omap. The cpu_is_omap44xx() works very early
> during the boot nowadays as the omap2_set_globals_44xx() initializes
> that, so please use that instead.
Looks possible to correct this. But I need to do this for OMAP2 and OMAp3 as well because for both the compile time switch is used. It was done for OMAP2/3 and hence I just maintained same way for OMAP4
/* Normally devicemaps_init() would flush caches and tlb after
> > * mdesc->map_io(), but we must also do it here because
> of the CPU
> > * revision check below.
> > @@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
> > void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
> > {
> > omap2_mux_init();
> > +#ifndef CONFIG_ARCH_OMAP4 /* REVISIT: to avoid build errors */
> > pwrdm_init(powerdomains_omap);
> > clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
> > omap2_clk_init();
> > omap2_sdrc_init(sp);
> > +#endif
> > gpmc_init();
> > }
>
> Please use cpu_is_omap44xx() here too instead of the ifndef.
If I use cpu_is_omap44xx(), then I need to write stub functions under OMAP4 macro. Kevin also suggested to write stubs. So this can be done.
Regards
Santosh
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP.
2009-04-21 18:14 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Tony Lindgren
@ 2009-04-22 4:47 ` Shilimkar, Santosh
0 siblings, 0 replies; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-22 4:47 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> > + * Board support header for OMAP4430 SDP.
> > + *
> > + * Copyright (C) 2009 Texas Instruments
> > + *
> > + * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > + *
> > + * Based on arch/arm/plat-omap/include/mach/board-3430sdp.h
> > + *
> > + * This program is free software; you can redistribute it
> and/or modify
> > + * it under the terms of the GNU General Public License
> version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +#ifndef __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
> > +#define __ARCH_ARM_MACH_OMAP4_BOARD_4430SDP_H
> > +
> > +extern void sdp4430_flash_init(void);
> > +
> > +/* NAND */
> > +#define DEBUG_BASE 0x08000000 /* debug board */
> > +#define NAND_BASE 0x0C000000 /* NAND flash */
> > +#define ONENAND_MAP 0x20000000 /* OneNand flash */
> > +
> > +/* various memory sizes */
> > +#define FLASH_SIZE_SDPV1 SZ_64M
> > +#define FLASH_SIZE_SDPV2 SZ_128M
> > +#endif
> > +
>
> Let's leave out the board-4430sdp.h and move the defines to
> the board-4430sdp.c.
>
> Also it sounds like the NAND defines are not yet needed. I'm thinking
> that we should have just a generic gpmc-onenand.c file based on the
> board-n800-flash.c that works for all boards with onenand connected
> to the GPMC.
Yes. This was added as a place holder since next NAND driver patches would need that. Sounds ok to me but may be Nand driver owner might have some comments on the same. We can take this up later when adding NAND support.
For now I agree with you point.
> b/arch/arm/plat-omap/include/mach/omap44xx.h
> IO_ADDRESS(OMAP44XX_SCU_BASE)
> > +#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
> > +#define OMAP44XX_VA_LOCAL_TWD_BASE
> IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
> > +#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
> > +#define OMAP44XX_WKUPGEN_BASE 0x48281000
> > +#define OMAP44XX_VA_WKUPGEN_BASE
> IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
>
> Could these defines have just OMAP4_ prefix? If some later omap4
> changes these, we can define them separately with the correct
> prefix.
I have kept this just to keep uniformity. Also generally we will have derivatives of ICs and this defines would
Help there. Instead of modifying later we can keep this way.
Regards
Santosh
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 7/7][RFC] OMAP4: Enable basic build support.
2009-04-21 18:39 ` Tony Lindgren
@ 2009-04-22 4:55 ` Shilimkar, Santosh
2009-04-22 19:04 ` [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.) Tony Lindgren
0 siblings, 1 reply; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-22 4:55 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, April 22, 2009 12:10 AM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.
>
> * Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> > This patch updates the Makefile and defconfig for OMAP4.
> Minimal set of
> > drivers are enabled fot the kernel bootup.
> >
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> > diff --git a/arch/arm/mach-omap2/Makefile
> b/arch/arm/mach-omap2/Makefile
> > index c49d9bf..68d50a8 100644
> > --- a/arch/arm/mach-omap2/Makefile
> > +++ b/arch/arm/mach-omap2/Makefile
> > @@ -3,9 +3,13 @@
> > #
> >
> > # Common support
> > +ifeq ($(CONFIG_ARCH_OMAP4),y)
> > +obj-y := id.o io.o control.o mux.o devices.o serial.o
> gpmc.o timer-gp.o
> > +else
> > obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \
> > devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
> > clockdomain.o
> > +endif
>
> This ifeq else we don't want to do as it breaks things for multi-omap.
How do we handle this. For OMAP4, those files are not common and needed at this point of time. More so if we agree that OMAP4 won't support multi-omap, then this should be ok.
Some thing like this can be done but then Makefile will be completely rewamped.
# Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
obj-$(CONFIG_ARCH_OMAP2) += display.o sdrc.o prcm.o clock.o powerdomain.o clockdomain.o
obj-$(CONFIG_ARCH_OMAP3) += display.o sdrc.o prcm.o clock.o powerdomain.o clockdomain.o
Is this OK ?
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.)
2009-04-22 4:55 ` Shilimkar, Santosh
@ 2009-04-22 19:04 ` Tony Lindgren
2009-04-23 5:07 ` Shilimkar, Santosh
0 siblings, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-22 19:04 UTC (permalink / raw)
To: Shilimkar, Santosh; +Cc: linux-omap
[-- Attachment #1: Type: text/plain, Size: 2513 bytes --]
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [090421 21:56]:
> > -----Original Message-----
> > From: Tony Lindgren [mailto:tony@atomide.com]
> > Sent: Wednesday, April 22, 2009 12:10 AM
> > To: Shilimkar, Santosh
> > Cc: linux-omap@vger.kernel.org
> > Subject: Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.
> >
> > * Santosh Shilimkar <santosh.shilimkar@ti.com> [090421 06:08]:
> > > This patch updates the Makefile and defconfig for OMAP4.
> > Minimal set of
> > > drivers are enabled fot the kernel bootup.
> > >
> > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > > ---
>
> > > diff --git a/arch/arm/mach-omap2/Makefile
> > b/arch/arm/mach-omap2/Makefile
> > > index c49d9bf..68d50a8 100644
> > > --- a/arch/arm/mach-omap2/Makefile
> > > +++ b/arch/arm/mach-omap2/Makefile
> > > @@ -3,9 +3,13 @@
> > > #
> > >
> > > # Common support
> > > +ifeq ($(CONFIG_ARCH_OMAP4),y)
> > > +obj-y := id.o io.o control.o mux.o devices.o serial.o
> > gpmc.o timer-gp.o
> > > +else
> > > obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \
> > > devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
> > > clockdomain.o
> > > +endif
> >
> > This ifeq else we don't want to do as it breaks things for multi-omap.
>
> How do we handle this. For OMAP4, those files are not common and needed at this point of time. More so if we agree that OMAP4 won't support multi-omap, then this should be ok.
No way we're dropping multi-omap for a few ifdefs.
We need to have code where we can compile in all the selected things.
In this case we should be able to select any combination of CONFIG_ARCH_OMAP2,
CONFIG_ARCH_OMAP3, CONFIG_ARCH_OMAP4. And the code already gets optimized if
only one is selected.
The recent omap2 clock breakage with trivial clock patches is already a
good enough reason to support the multi-omap. So basically all the developers
should do their builds with the multi-omap selected.
Also the distros want multi-omap. Only the product specific kernels
should be built with only one option selected to optimize for speed and size.
> Some thing like this can be done but then Makefile will be completely rewamped.
>
> # Common support
> obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
>
> obj-$(CONFIG_ARCH_OMAP2) += display.o sdrc.o prcm.o clock.o powerdomain.o clockdomain.o
> obj-$(CONFIG_ARCH_OMAP3) += display.o sdrc.o prcm.o clock.o powerdomain.o clockdomain.o
>
> Is this OK ?
How about the attached patch?
Tony
[-- Attachment #2: omap-2-3-makefile-cleanup.patch --]
[-- Type: text/x-diff, Size: 1138 bytes --]
>From 60e0a0d9c74e2aaf4adcd1ab9f045fd8e62a3092 Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Wed, 22 Apr 2009 11:59:58 -0700
Subject: [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support
We don't necessarily want to compile in irq.o and sdrc.o for omap4.
Also, clock and prcm may not be implemented initially.
Signed-off-by: Tony Lindgren <tony@atomide.com>
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c49d9bf..bf3827a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,9 +3,14 @@
#
# Common support
-obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \
- devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
- clockdomain.o
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
+
+omap-2-3-common = irq.o sdrc.o
+prcm-common = prcm.o powerdomain.o
+clock-common = clock.o clockdomain.o
+
+obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
+obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-22 4:10 ` Shilimkar, Santosh
@ 2009-04-22 19:11 ` Tony Lindgren
2009-04-23 5:17 ` Shilimkar, Santosh
0 siblings, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-22 19:11 UTC (permalink / raw)
To: Shilimkar, Santosh; +Cc: linux-omap
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [090421 21:11]:
>
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org
> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Tony Lindgren
> > Sent: Tuesday, April 21, 2009 11:57 PM
> > To: Shilimkar, Santosh
> > Cc: linux-omap@vger.kernel.org
> > Subject: Re: [PATCH 3/7][RFC] OMAP4: Update common omap
> > platform headers.
> >
>
> > > -#define INT_24XX_SPI3_IRQ 91
> > > +#ifdef CONFIG_ARCH_OMAP4
> > > +#define IRQ_GIC_START 32
> > > +#else
> > > +#define IRQ_GIC_START 0
> > > +#endif
> >
> > This ifdef we don't want to do as it blocks the compile
> > for multi-omap.
> Not sure why this should break multi-omap. As I mentioned in one of the patch OMAP4 may not be
> able to support multi-omap because of major differences on Memory controller and Interrupt handling.
> This macro ensures that only for OMAP4 all the IRQ lines are offseted by 32 and for rest of the OMAPs the offset is zero. Because that's the only change necessary.
>
> May be I haven't understood your point here.
It makes the irq lines wrong if CONFIG_ARCH_OMAP4 and CONFIG_ARCH_OMAP3
are selected.
> >
> > How about just add extra + 32 to the omap4 specific
> > defines? Something like this maybe:
> >
> > #define OMAP4_GIC_OFFSET 32
> > #define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
> >
> > It's OK to define the numbers separately for each processors:
>
> I thought about this but this will have impact on the drivers as well. In every driver you need to put different IRQ line macros depending on the OMAP2/3/4.
No. The interrupt numbers are coming from platform_data. You always
have separate platform_data for different processors.
> Just as an example UART1 uses "INT_24XX_UART1_IRQ" as the IRQ line number for OMAP2, OMAP3 and now for OMAP4 ( just offseted by 32).
This needs to be fixed in the serial code. I believe that's already
in Kevin's patches.
> If we define separate macros for each processor, we would be unnecessarily polluting the driver code with switches. Secondly, in this file itself we will be adding around 100 + lines of code just to take care of 32 offset.
The numbers are not the same. It's OK to add separate defines for
data that is not the same. The unused defines just will not be
used anywhere.
> If we are not breaking multi-omap for OMAP2/3, then this should be ok.
Nope, see above.
Tony
>
> > > diff --git a/arch/arm/plat-omap/include/mach/system.h
> > b/arch/arm/plat-omap/include/mach/system.h
> > > index 1060e34..371f98a 100644
> > > --- a/arch/arm/plat-omap/include/mach/system.h
> > > +++ b/arch/arm/plat-omap/include/mach/system.h
> > > @@ -48,4 +48,11 @@ static inline void arch_reset(char mode,
> > const char *cmd)
> > > omap_prcm_arch_reset(mode);
> > > }
> > >
> > > +#ifdef CONFIG_ARCH_OMAP4
> > > +void omap_prcm_arch_reset(char mode)
> > > +{
> > > + /* dummy hook for Linking */
> > > +}
> > > +#endif
> > > +
> > > #endif
> >
> > This should be named omap4_prcm_arch_reset() and then we just set
> > the right function pointer. Otherwise we'll break multi-omap
> > unnecessarily!
> omap_prcm_arch_reset() is called from arch_reset(). Currently since prcm files are not present/used for omap4, I get linking problem for just this API. Even if I make omap4_prcm_arch_reset(), I still need to compile out
> omap_prcm_arch_reset() from arch_reset() which will look worser than this one.
>
> Thanks !!
>
> Regards
> Santosh
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.)
2009-04-22 19:04 ` [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.) Tony Lindgren
@ 2009-04-23 5:07 ` Shilimkar, Santosh
2009-04-23 6:21 ` Tony Lindgren
0 siblings, 1 reply; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-23 5:07 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> > > This ifeq else we don't want to do as it breaks things
> for multi-omap.
> >
> > How do we handle this. For OMAP4, those files are not
> common and needed at this point of time. More so if we agree
> that OMAP4 won't support multi-omap, then this should be ok.
>
> No way we're dropping multi-omap for a few ifdefs.
>
> We need to have code where we can compile in all the selected things.
> In this case we should be able to select any combination of
> CONFIG_ARCH_OMAP2,
> CONFIG_ARCH_OMAP3, CONFIG_ARCH_OMAP4. And the code already
> gets optimized if
> only one is selected.
>
> The recent omap2 clock breakage with trivial clock patches is
> already a
> good enough reason to support the multi-omap. So basically
> all the developers
> should do their builds with the multi-omap selected.
>
> Also the distros want multi-omap. Only the product specific kernels
> should be built with only one option selected to optimize for
> speed and size.
I think most of the things are in place for multi-omap for OMAP4 as well if all the comments are taken care.
> > Some thing like this can be done but then Makefile will be
> completely rewamped.
> >
> > # Common support
> > obj-y := id.o io.o control.o mux.o devices.o serial.o
> gpmc.o timer-gp.o
> >
> > obj-$(CONFIG_ARCH_OMAP2) += display.o sdrc.o prcm.o clock.o
> powerdomain.o clockdomain.o
> > obj-$(CONFIG_ARCH_OMAP3) += display.o sdrc.o prcm.o clock.o
> powerdomain.o clockdomain.o
> >
> > Is this OK ?
>
> How about the attached patch?
Looks good. After adding clock support stubs we need to compile almost all files except 'clock.c' so we may not need this completely. But any case, the patch looks cleaner.
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-22 19:11 ` Tony Lindgren
@ 2009-04-23 5:17 ` Shilimkar, Santosh
2009-04-23 6:22 ` Tony Lindgren
0 siblings, 1 reply; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-23 5:17 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> > > This ifdef we don't want to do as it blocks the compile
> > > for multi-omap.
> > Not sure why this should break multi-omap. As I mentioned
> in one of the patch OMAP4 may not be
> > able to support multi-omap because of major differences on
> Memory controller and Interrupt handling.
> > This macro ensures that only for OMAP4 all the IRQ lines
> are offseted by 32 and for rest of the OMAPs the offset is
> zero. Because that's the only change necessary.
> >
> > May be I haven't understood your point here.
>
> It makes the irq lines wrong if CONFIG_ARCH_OMAP4 and
> CONFIG_ARCH_OMAP3
> are selected.
Agree. My assumption was OMAP3 and OMAP4 both won't get selected together. If they are then it's straight makes IRQ lines wrong.
> > >
> > > How about just add extra + 32 to the omap4 specific
> > > defines? Something like this maybe:
> > >
> > > #define OMAP4_GIC_OFFSET 32
> > > #define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
> > >
> > > It's OK to define the numbers separately for each processors:
> >
> > I thought about this but this will have impact on the
> drivers as well. In every driver you need to put different
> IRQ line macros depending on the OMAP2/3/4.
>
> No. The interrupt numbers are coming from platform_data. You always
> have separate platform_data for different processors.
>
> > Just as an example UART1 uses "INT_24XX_UART1_IRQ" as the
> IRQ line number for OMAP2, OMAP3 and now for OMAP4 ( just
> offseted by 32).
>
> This needs to be fixed in the serial code. I believe that's already
> in Kevin's patches.
>
> > If we define separate macros for each processor, we would
> be unnecessarily polluting the driver code with switches.
> Secondly, in this file itself we will be adding around 100 +
> lines of code just to take care of 32 offset.
>
> The numbers are not the same. It's OK to add separate defines for
> data that is not the same. The unused defines just will not be
> used anywhere.
If we agree to cleanup the driver platform structures wherever needed, then no issues with separate lines. In that case no #ifdef necessary. Bye the way
#define INT_44XX_SP15_IRQ (69 + OMAP4_GIC_OFFSET) is sufficient. Any particul;ar reason you want it this way.
#define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET) ?
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.)
2009-04-23 5:07 ` Shilimkar, Santosh
@ 2009-04-23 6:21 ` Tony Lindgren
2009-04-23 6:30 ` Shilimkar, Santosh
0 siblings, 1 reply; 30+ messages in thread
From: Tony Lindgren @ 2009-04-23 6:21 UTC (permalink / raw)
To: Shilimkar, Santosh; +Cc: linux-omap
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [090422 22:07]:
> > > > This ifeq else we don't want to do as it breaks things
> > for multi-omap.
> > >
> > > How do we handle this. For OMAP4, those files are not
> > common and needed at this point of time. More so if we agree
> > that OMAP4 won't support multi-omap, then this should be ok.
> >
> > No way we're dropping multi-omap for a few ifdefs.
> >
> > We need to have code where we can compile in all the selected things.
> > In this case we should be able to select any combination of
> > CONFIG_ARCH_OMAP2,
> > CONFIG_ARCH_OMAP3, CONFIG_ARCH_OMAP4. And the code already
> > gets optimized if
> > only one is selected.
> >
> > The recent omap2 clock breakage with trivial clock patches is
> > already a
> > good enough reason to support the multi-omap. So basically
> > all the developers
> > should do their builds with the multi-omap selected.
> >
> > Also the distros want multi-omap. Only the product specific kernels
> > should be built with only one option selected to optimize for
> > speed and size.
> I think most of the things are in place for multi-omap for OMAP4 as well if all the comments are taken care.
Yeah cool. Looks like the gic interrupt code can also be initialized
from the init_common_hw or so. Of course the entry-macro.S still
needs a separate non-optimized handler for things to boot, I'll
update an earlier patch for that at some point.
> > > Some thing like this can be done but then Makefile will be
> > completely rewamped.
> > >
> > > # Common support
> > > obj-y := id.o io.o control.o mux.o devices.o serial.o
> > gpmc.o timer-gp.o
> > >
> > > obj-$(CONFIG_ARCH_OMAP2) += display.o sdrc.o prcm.o clock.o
> > powerdomain.o clockdomain.o
> > > obj-$(CONFIG_ARCH_OMAP3) += display.o sdrc.o prcm.o clock.o
> > powerdomain.o clockdomain.o
> > >
> > > Is this OK ?
> >
> > How about the attached patch?
> Looks good. After adding clock support stubs we need to compile almost all files except 'clock.c' so we may not need this completely. But any case, the patch looks cleaner.
OK
Tony
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 3/7][RFC] OMAP4: Update common omap platform headers.
2009-04-23 5:17 ` Shilimkar, Santosh
@ 2009-04-23 6:22 ` Tony Lindgren
0 siblings, 0 replies; 30+ messages in thread
From: Tony Lindgren @ 2009-04-23 6:22 UTC (permalink / raw)
To: Shilimkar, Santosh; +Cc: linux-omap
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [090422 22:18]:
>
> > > > This ifdef we don't want to do as it blocks the compile
> > > > for multi-omap.
> > > Not sure why this should break multi-omap. As I mentioned
> > in one of the patch OMAP4 may not be
> > > able to support multi-omap because of major differences on
> > Memory controller and Interrupt handling.
> > > This macro ensures that only for OMAP4 all the IRQ lines
> > are offseted by 32 and for rest of the OMAPs the offset is
> > zero. Because that's the only change necessary.
> > >
> > > May be I haven't understood your point here.
> >
> > It makes the irq lines wrong if CONFIG_ARCH_OMAP4 and
> > CONFIG_ARCH_OMAP3
> > are selected.
>
> Agree. My assumption was OMAP3 and OMAP4 both won't get selected together. If they are then it's straight makes IRQ lines wrong.
> > > >
> > > > How about just add extra + 32 to the omap4 specific
> > > > defines? Something like this maybe:
> > > >
> > > > #define OMAP4_GIC_OFFSET 32
> > > > #define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET)
> > > >
> > > > It's OK to define the numbers separately for each processors:
> > >
> > > I thought about this but this will have impact on the
> > drivers as well. In every driver you need to put different
> > IRQ line macros depending on the OMAP2/3/4.
> >
> > No. The interrupt numbers are coming from platform_data. You always
> > have separate platform_data for different processors.
> >
> > > Just as an example UART1 uses "INT_24XX_UART1_IRQ" as the
> > IRQ line number for OMAP2, OMAP3 and now for OMAP4 ( just
> > offseted by 32).
> >
> > This needs to be fixed in the serial code. I believe that's already
> > in Kevin's patches.
> >
> > > If we define separate macros for each processor, we would
> > be unnecessarily polluting the driver code with switches.
> > Secondly, in this file itself we will be adding around 100 +
> > lines of code just to take care of 32 offset.
> >
> > The numbers are not the same. It's OK to add separate defines for
> > data that is not the same. The unused defines just will not be
> > used anywhere.
> If we agree to cleanup the driver platform structures wherever needed, then no issues with separate lines. In that case no #ifdef necessary. Bye the way
> #define INT_44XX_SP15_IRQ (69 + OMAP4_GIC_OFFSET) is sufficient. Any particul;ar reason you want it this way.
> #define INT_44XX_SP15_IRQ (69 + IRQ_GIC_START + OMAP4_GIC_OFFSET) ?
No reason, unless there's some logic to the numbering where the
offset makes things easier to read :)
Tony
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.)
2009-04-23 6:21 ` Tony Lindgren
@ 2009-04-23 6:30 ` Shilimkar, Santosh
0 siblings, 0 replies; 30+ messages in thread
From: Shilimkar, Santosh @ 2009-04-23 6:30 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
> > > should do their builds with the multi-omap selected.
> > >
> > > Also the distros want multi-omap. Only the product
> specific kernels
> > > should be built with only one option selected to optimize for
> > > speed and size.
> > I think most of the things are in place for multi-omap for
> OMAP4 as well if all the comments are taken care.
>
> Yeah cool. Looks like the gic interrupt code can also be initialized
> from the init_common_hw or so. Of course the entry-macro.S still
> needs a separate non-optimized handler for things to boot, I'll
> update an earlier patch for that at some point.
>
Yes it is initialised from common hw init.
Regards
Santosh
^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2009-04-23 6:30 UTC | newest]
Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-04-21 13:08 [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Santosh Shilimkar
2009-04-21 13:08 ` [PATCH 7/7][RFC] OMAP4: Enable basic build support Santosh Shilimkar
2009-04-21 18:39 ` Tony Lindgren
2009-04-22 4:55 ` Shilimkar, Santosh
2009-04-22 19:04 ` [PATCH] ARM: OMAP2/3: Reorganize Makefile to add omap4 support (Re: [PATCH 7/7][RFC] OMAP4: Enable basic build support.) Tony Lindgren
2009-04-23 5:07 ` Shilimkar, Santosh
2009-04-23 6:21 ` Tony Lindgren
2009-04-23 6:30 ` Shilimkar, Santosh
2009-04-21 18:37 ` [PATCH 6/7][RFC] OMAP4: Clock hack since clock management framework not in Tony Lindgren
2009-04-21 13:24 ` [PATCH 5/7][RFC] OMAP4: Update common omap machine specific sources Dasgupta, Romit
2009-04-21 16:23 ` Kevin Hilman
2009-04-21 18:36 ` Tony Lindgren
2009-04-22 4:40 ` Shilimkar, Santosh
2009-04-21 13:21 ` [PATCH 4/7][RFC] OMAP4: Update common omap platform common sources Premi, Sanjeev
2009-04-21 13:34 ` Shilimkar, Santosh
2009-04-21 13:38 ` Shilimkar, Santosh
2009-04-21 18:33 ` Tony Lindgren
2009-04-21 18:26 ` [PATCH 3/7][RFC] OMAP4: Update common omap platform headers Tony Lindgren
2009-04-22 4:10 ` Shilimkar, Santosh
2009-04-22 19:11 ` Tony Lindgren
2009-04-23 5:17 ` Shilimkar, Santosh
2009-04-23 6:22 ` Tony Lindgren
2009-04-21 18:14 ` [PATCH 2/7][RFC] OMAP4: Create board support for OMAP_4430SDP Tony Lindgren
2009-04-22 4:47 ` Shilimkar, Santosh
2009-04-21 16:41 ` [PATCH 1/7][RFC] OMAP4: Create architecture macros and config entries Kevin Hilman
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.