[U-Boot] [PATCH] usb: musb: drop old musb read/write prototypes

[U-Boot] [PATCH] usb: musb: drop old musb read/write prototypes

[Mike Frysinger]

These functions are no longer defined, so remove their prototypes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 drivers/usb/musb/musb_core.h |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index b81c536..f9da3f0 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -307,10 +307,4 @@ extern void musb_configure_ep(struct musb_epinfo *epinfo, u8 cnt);
 extern void write_fifo(u8 ep, u32 length, void *fifo_data);
 extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 
-/* extern functions */
-extern inline void musb_writew(u32 offset, u16 value);
-extern inline void musb_writeb(u32 offset, u8 value);
-extern inline u16 musb_readw(u32 offset);
-extern inline u8 musb_readb(u32 offset);
-
 #endif	/* __MUSB_HDRC_DEFS_H__ */
-- 
1.6.3.1

[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Mike Frysinger]

From: Bryan Wu <bryan.wu@analog.com>

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 drivers/usb/musb/Makefile                   |    1 +
 drivers/usb/musb/blackfin_usb.c             |  152 +++++++++++++++
 drivers/usb/musb/blackfin_usb.h             |   27 +++
 drivers/usb/musb/musb_core.h                |   73 +++++++
 include/asm-blackfin/mach-common/bits/usb.h |  280 +++++++++++++++++++++++++++
 include/usb.h                               |    3 +-
 6 files changed, 535 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/musb/blackfin_usb.c
 create mode 100644 drivers/usb/musb/blackfin_usb.h
 create mode 100644 include/asm-blackfin/mach-common/bits/usb.h

diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index 09e0a5f..40caf9b 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	:= $(obj)libusb_musb.a
 
 COBJS-$(CONFIG_MUSB_HCD) += musb_hcd.o musb_core.o
+COBJS-$(CONFIG_USB_BLACKFIN) += blackfin_usb.o
 COBJS-$(CONFIG_USB_DAVINCI) += davinci.o
 
 COBJS	:= $(COBJS-y)
diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c
new file mode 100644
index 0000000..30850fd
--- /dev/null
+++ b/drivers/usb/musb/blackfin_usb.c
@@ -0,0 +1,152 @@
+/*
+ * Blackfin MUSB HCD (Host Controller Driver) for u-boot
+ *
+ * Copyright (c) 2008-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+
+#include <usb.h>
+
+#include <asm/blackfin.h>
+#include <asm/mach-common/bits/usb.h>
+
+#include "blackfin_usb.h"
+
+/* MUSB platform configuration */
+struct musb_config musb_cfg = {
+	.regs       = (struct musb_regs *)MENTOR_USB_BASE,
+	.timeout    = 0x3FFFFFF,
+	.musb_speed = 0,
+};
+
+/*
+ * This function read or write data to endpoint fifo
+ * Blackfin use DMA polling method to avoid buffer alignment issues
+ *
+ * ep		- Endpoint number
+ * length	- Number of bytes to write to FIFO
+ * fifo_data	- Pointer to data buffer to be read/write
+ * is_write	- Flag for read or write
+ */
+void rw_fifo(u8 ep, u32 length, void *fifo_data, int is_write)
+{
+	u16 dma_reg = 0;
+
+	blackfin_dcache_flush_invalidate_range(fifo_data,
+		(fifo_data + length));
+
+	/* Setup DMA address register */
+	dma_reg = (u16) ((u32) fifo_data & 0xFFFF);
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_ADDR_LOW), dma_reg);
+	SSYNC();
+
+	dma_reg = (u16) (((u32) fifo_data >> 16) & 0xFFFF);
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_ADDR_HIGH), dma_reg);
+	SSYNC();
+
+	/* Setup DMA count register */
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_COUNT_LOW), length);
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_COUNT_HIGH), 0);
+	SSYNC();
+
+	/* Enable the DMA */
+	dma_reg = (ep << 4) | DMA_ENA | INT_ENA;
+	if (is_write)
+		dma_reg |= DIRECTION;
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_CTRL), dma_reg);
+	SSYNC();
+
+	/* Wait for compelete */
+	while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << ep)));
+
+	/* acknowledge dma interrupt */
+	bfin_write_USB_DMA_INTERRUPT(1 << ep);
+	SSYNC();
+
+	/* Reset DMA */
+	bfin_write16(USB_DMA_REG(ep, USB_DMAx_CTRL), 0);
+	SSYNC();
+}
+
+void write_fifo(u8 ep, u32 length, void *fifo_data)
+{
+	rw_fifo(ep, length, fifo_data, 1);
+}
+
+void read_fifo(u8 ep, u32 length, void *fifo_data)
+{
+	rw_fifo(ep, length, fifo_data, 0);
+}
+
+int musb_platform_init(void)
+{
+
+#if defined(__ADSPBF54x__)
+	/*
+	 * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both DEVICE
+	 * and OTG HOST modes, while rev 1.1 and greater require PE7 to
+	 * be low for DEVICE mode and high for HOST mode. We set it high
+	 * here because we are in host mode
+	 */
+	*pPORTE_FER = *pPORTE_FER & ~PE7;
+	*pPORTE_DIR_SET |= PE7;
+	*pPORTE_SET |= PE7;
+	SSYNC();
+#endif
+
+#if defined(__ADSPBF52x__)
+	/*
+	 * BF527 EZ-KITs require PG13 to be high for HOST mode
+	 */
+	*pPORTG_FER = *pPORTG_FER & ~PG13;
+	*pPORTGIO_DIR |= PG13;
+	*pPORTGIO_SET |= PG13;
+	SSYNC();
+#endif
+
+	if (ANOMALY_05000346) {
+		bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
+		SSYNC();
+	}
+
+	if (ANOMALY_05000347) {
+		bfin_write_USB_APHY_CNTRL(0x0);
+		SSYNC();
+	}
+
+	/* Configure PLL oscillator register */
+	bfin_write_USB_PLLOSC_CTRL(0x30a8);
+	SSYNC();
+
+	bfin_write_USB_SRP_CLKDIV((get_sclk()/1000) / 32 - 1);
+	SSYNC();
+
+	bfin_write_USB_EP_NI0_RXMAXP(64);
+	SSYNC();
+
+	bfin_write_USB_EP_NI0_TXMAXP(64);
+	SSYNC();
+
+	/* Route INTRUSB/INTR_RX/INTR_TX to USB_INT0*/
+	bfin_write_USB_GLOBINTR(0x7);
+	SSYNC();
+
+	bfin_write_USB_GLOBAL_CTL(GLOBAL_ENA | EP1_TX_ENA | EP2_TX_ENA |
+				EP3_TX_ENA | EP4_TX_ENA | EP5_TX_ENA |
+				EP6_TX_ENA | EP7_TX_ENA | EP1_RX_ENA |
+				EP2_RX_ENA | EP3_RX_ENA | EP4_RX_ENA |
+				EP5_RX_ENA | EP6_RX_ENA | EP7_RX_ENA);
+	SSYNC();
+
+	return 0;
+}
+
+/*
+ * This function performs Blackfin platform specific deinitialization for usb.
+*/
+void musb_platform_deinit(void)
+{
+}
diff --git a/drivers/usb/musb/blackfin_usb.h b/drivers/usb/musb/blackfin_usb.h
new file mode 100644
index 0000000..fe7623c
--- /dev/null
+++ b/drivers/usb/musb/blackfin_usb.h
@@ -0,0 +1,27 @@
+/*
+ * Blackfin MUSB HCD (Host Controller Driver) for u-boot
+ *
+ * Copyright (c) 2008-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __BLACKFIN_USB_H__
+#define __BLACKFIN_USB_H__
+
+#include "musb_core.h"
+
+/* Base address of Blackfin musb core */
+#define MENTOR_USB_BASE		(USB_FADDR)
+
+/* Blackfin uses DMA polling method of FIFO read/write */
+#define USB_DMA_BASE		USB_DMA_INTERRUPT
+#define USB_DMAx_CTRL		0x04
+#define USB_DMAx_ADDR_LOW	0x08
+#define USB_DMAx_ADDR_HIGH	0x0C
+#define USB_DMAx_COUNT_LOW	0x10
+#define USB_DMAx_COUNT_HIGH	0x14
+
+#define USB_DMA_REG(ep, reg)	(USB_DMA_BASE + 0x20 * ep + reg)
+
+#endif
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index f9da3f0..34a6702 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -42,6 +42,68 @@
 
 /* Mentor USB core register overlay structure */
 struct musb_regs {
+#if defined(CONFIG_USB_BLACKFIN)
+	/* Every register is 32bit aligned, but only 16bits in size */
+# define ureg(name) u16 name; u16 __pad_##name;
+	/* common registers */
+	ureg(faddr)
+	ureg(power)
+	ureg(intrtx)
+	ureg(intrrx)
+	ureg(intrtxe)
+	ureg(intrrxe)
+	ureg(intrusb)
+	ureg(intrusbe)
+	ureg(frame)
+	ureg(index)
+	ureg(testmode)
+	ureg(globintr)
+	ureg(global_ctl)
+	u32	reserved0[3];
+	/* indexed registers */
+	ureg(txmaxp)
+	ureg(txcsr)
+	ureg(rxmaxp)
+	ureg(rxcsr)
+	ureg(rxcount)
+	ureg(txtype)
+	ureg(txinterval)
+	ureg(rxtype)
+	ureg(rxinterval)
+	u32	reserved1;
+	ureg(txcount)
+	u32	reserved2[5];
+	/* fifo */
+	u16	fifox[32];
+	/* OTG, dynamic FIFO, version & vendor registers */
+	u32	reserved3[16];
+	ureg(devctl)
+	ureg(vbus_irq)
+	ureg(vbus_mask)
+	u32 reserved4[15];
+	ureg(linkinfo)
+	ureg(vplen)
+	ureg(hseof1)
+	ureg(fseof1)
+	ureg(lseof1)
+	u32 reserved5[41];
+	/* target address registers */
+	struct musb_tar_regs {
+		ureg(txmaxp)
+		ureg(txcsr)
+		ureg(rxmaxp)
+		ureg(rxcsr)
+		ureg(rxcount)
+		ureg(txtype)
+		ureg(txinternal)
+		ureg(rxtype)
+		ureg(rxinternal)
+		u32	reserved6;
+		ureg(txcount)
+		u32 reserved7[5];
+	} tar[8];
+# undef ureg
+#else
 	/* common registers */
 	u8	faddr;
 	u8	power;
@@ -97,6 +159,7 @@ struct musb_regs {
 		u8	rxhubaddr;
 		u8	rxhubport;
 	} tar[16];
+#endif
 } __attribute__((aligned(32)));
 
 /*
@@ -307,4 +370,14 @@ extern void musb_configure_ep(struct musb_epinfo *epinfo, u8 cnt);
 extern void write_fifo(u8 ep, u32 length, void *fifo_data);
 extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 
+#if defined(CONFIG_USB_BLACKFIN)
+/* Every USB register is accessed as a 16-bit even if the value itself
+ * is only 8-bits in size.  Fun stuff.
+ */
+# undef  readb
+# define readb(addr)     (u8)readw(addr)
+# undef  writeb
+# define writeb(b, addr) writew(b, addr)
+#endif
+
 #endif	/* __MUSB_HDRC_DEFS_H__ */
diff --git a/include/asm-blackfin/mach-common/bits/usb.h b/include/asm-blackfin/mach-common/bits/usb.h
new file mode 100644
index 0000000..e438cf3
--- /dev/null
+++ b/include/asm-blackfin/mach-common/bits/usb.h
@@ -0,0 +1,280 @@
+/*
+ * USB Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_USB__
+#define __BFIN_PERIPHERAL_USB__
+
+/* Bit masks for USB_FADDR */
+
+#define          FUNCTION_ADDRESS  0x7f       /* Function address */
+
+/* Bit masks for USB_POWER */
+
+#define           ENABLE_SUSPENDM  0x1        /* enable SuspendM output */
+#define              SUSPEND_MODE  0x2        /* Suspend Mode indicator */
+#define               RESUME_MODE  0x4        /* DMA Mode */
+#define                     RESET  0x8        /* Reset indicator */
+#define                   HS_MODE  0x10       /* High Speed mode indicator */
+#define                 HS_ENABLE  0x20       /* high Speed Enable */
+#define                 SOFT_CONN  0x40       /* Soft connect */
+#define                ISO_UPDATE  0x80       /* Isochronous update */
+
+/* Bit masks for USB_INTRTX */
+
+#define                    EP0_TX  0x1        /* Tx Endpoint 0 interrupt */
+#define                    EP1_TX  0x2        /* Tx Endpoint 1 interrupt */
+#define                    EP2_TX  0x4        /* Tx Endpoint 2 interrupt */
+#define                    EP3_TX  0x8        /* Tx Endpoint 3 interrupt */
+#define                    EP4_TX  0x10       /* Tx Endpoint 4 interrupt */
+#define                    EP5_TX  0x20       /* Tx Endpoint 5 interrupt */
+#define                    EP6_TX  0x40       /* Tx Endpoint 6 interrupt */
+#define                    EP7_TX  0x80       /* Tx Endpoint 7 interrupt */
+
+/* Bit masks for USB_INTRRX */
+
+#define                    EP1_RX  0x2        /* Rx Endpoint 1 interrupt */
+#define                    EP2_RX  0x4        /* Rx Endpoint 2 interrupt */
+#define                    EP3_RX  0x8        /* Rx Endpoint 3 interrupt */
+#define                    EP4_RX  0x10       /* Rx Endpoint 4 interrupt */
+#define                    EP5_RX  0x20       /* Rx Endpoint 5 interrupt */
+#define                    EP6_RX  0x40       /* Rx Endpoint 6 interrupt */
+#define                    EP7_RX  0x80       /* Rx Endpoint 7 interrupt */
+
+/* Bit masks for USB_INTRTXE */
+
+#define                  EP0_TX_E  0x1        /* Endpoint 0 interrupt Enable */
+#define                  EP1_TX_E  0x2        /* Tx Endpoint 1 interrupt  Enable */
+#define                  EP2_TX_E  0x4        /* Tx Endpoint 2 interrupt  Enable */
+#define                  EP3_TX_E  0x8        /* Tx Endpoint 3 interrupt  Enable */
+#define                  EP4_TX_E  0x10       /* Tx Endpoint 4 interrupt  Enable */
+#define                  EP5_TX_E  0x20       /* Tx Endpoint 5 interrupt  Enable */
+#define                  EP6_TX_E  0x40       /* Tx Endpoint 6 interrupt  Enable */
+#define                  EP7_TX_E  0x80       /* Tx Endpoint 7 interrupt  Enable */
+
+/* Bit masks for USB_INTRRXE */
+
+#define                  EP1_RX_E  0x2        /* Rx Endpoint 1 interrupt  Enable */
+#define                  EP2_RX_E  0x4        /* Rx Endpoint 2 interrupt  Enable */
+#define                  EP3_RX_E  0x8        /* Rx Endpoint 3 interrupt  Enable */
+#define                  EP4_RX_E  0x10       /* Rx Endpoint 4 interrupt  Enable */
+#define                  EP5_RX_E  0x20       /* Rx Endpoint 5 interrupt  Enable */
+#define                  EP6_RX_E  0x40       /* Rx Endpoint 6 interrupt  Enable */
+#define                  EP7_RX_E  0x80       /* Rx Endpoint 7 interrupt  Enable */
+
+/* Bit masks for USB_INTRUSB */
+
+#define                 SUSPEND_B  0x1        /* Suspend indicator */
+#define                  RESUME_B  0x2        /* Resume indicator */
+#define          RESET_OR_BABLE_B  0x4        /* Reset/babble indicator */
+#define                     SOF_B  0x8        /* Start of frame */
+#define                    CONN_B  0x10       /* Connection indicator */
+#define                  DISCON_B  0x20       /* Disconnect indicator */
+#define             SESSION_REQ_B  0x40       /* Session Request */
+#define              VBUS_ERROR_B  0x80       /* Vbus threshold indicator */
+
+/* Bit masks for USB_INTRUSBE */
+
+#define                SUSPEND_BE  0x1        /* Suspend indicator int enable */
+#define                 RESUME_BE  0x2        /* Resume indicator int enable */
+#define         RESET_OR_BABLE_BE  0x4        /* Reset/babble indicator int enable */
+#define                    SOF_BE  0x8        /* Start of frame int enable */
+#define                   CONN_BE  0x10       /* Connection indicator int enable */
+#define                 DISCON_BE  0x20       /* Disconnect indicator int enable */
+#define            SESSION_REQ_BE  0x40       /* Session Request int enable */
+#define             VBUS_ERROR_BE  0x80       /* Vbus threshold indicator int enable */
+
+/* Bit masks for USB_FRAME */
+
+#define              FRAME_NUMBER  0x7ff      /* Frame number */
+
+/* Bit masks for USB_INDEX */
+
+#define         SELECTED_ENDPOINT  0xf        /* selected endpoint */
+
+/* Bit masks for USB_GLOBAL_CTL */
+
+#define                GLOBAL_ENA  0x1        /* enables USB module */
+#define                EP1_TX_ENA  0x2        /* Transmit endpoint 1 enable */
+#define                EP2_TX_ENA  0x4        /* Transmit endpoint 2 enable */
+#define                EP3_TX_ENA  0x8        /* Transmit endpoint 3 enable */
+#define                EP4_TX_ENA  0x10       /* Transmit endpoint 4 enable */
+#define                EP5_TX_ENA  0x20       /* Transmit endpoint 5 enable */
+#define                EP6_TX_ENA  0x40       /* Transmit endpoint 6 enable */
+#define                EP7_TX_ENA  0x80       /* Transmit endpoint 7 enable */
+#define                EP1_RX_ENA  0x100      /* Receive endpoint 1 enable */
+#define                EP2_RX_ENA  0x200      /* Receive endpoint 2 enable */
+#define                EP3_RX_ENA  0x400      /* Receive endpoint 3 enable */
+#define                EP4_RX_ENA  0x800      /* Receive endpoint 4 enable */
+#define                EP5_RX_ENA  0x1000     /* Receive endpoint 5 enable */
+#define                EP6_RX_ENA  0x2000     /* Receive endpoint 6 enable */
+#define                EP7_RX_ENA  0x4000     /* Receive endpoint 7 enable */
+
+/* Bit masks for USB_OTG_DEV_CTL */
+
+#define                   SESSION  0x1        /* session indicator */
+#define                  HOST_REQ  0x2        /* Host negotiation request */
+#define                 HOST_MODE  0x4        /* indicates USBDRC is a host */
+#define                     VBUS0  0x8        /* Vbus level indicator[0] */
+#define                     VBUS1  0x10       /* Vbus level indicator[1] */
+#define                     LSDEV  0x20       /* Low-speed indicator */
+#define                     FSDEV  0x40       /* Full or High-speed indicator */
+#define                  B_DEVICE  0x80       /* A' or 'B' device indicator */
+
+/* Bit masks for USB_OTG_VBUS_IRQ */
+
+#define             DRIVE_VBUS_ON  0x1        /* indicator to drive VBUS control circuit */
+#define            DRIVE_VBUS_OFF  0x2        /* indicator to shut off charge pump */
+#define           CHRG_VBUS_START  0x4        /* indicator for external circuit to start charging VBUS */
+#define             CHRG_VBUS_END  0x8        /* indicator for external circuit to end charging VBUS */
+#define        DISCHRG_VBUS_START  0x10       /* indicator to start discharging VBUS */
+#define          DISCHRG_VBUS_END  0x20       /* indicator to stop discharging VBUS */
+
+/* Bit masks for USB_OTG_VBUS_MASK */
+
+#define         DRIVE_VBUS_ON_ENA  0x1        /* enable DRIVE_VBUS_ON interrupt */
+#define        DRIVE_VBUS_OFF_ENA  0x2        /* enable DRIVE_VBUS_OFF interrupt */
+#define       CHRG_VBUS_START_ENA  0x4        /* enable CHRG_VBUS_START interrupt */
+#define         CHRG_VBUS_END_ENA  0x8        /* enable CHRG_VBUS_END interrupt */
+#define    DISCHRG_VBUS_START_ENA  0x10       /* enable DISCHRG_VBUS_START interrupt */
+#define      DISCHRG_VBUS_END_ENA  0x20       /* enable DISCHRG_VBUS_END interrupt */
+
+/* Bit masks for USB_CSR0 */
+
+#define                  RXPKTRDY  0x1        /* data packet receive indicator */
+#define                  TXPKTRDY  0x2        /* data packet in FIFO indicator */
+#define                STALL_SENT  0x4        /* STALL handshake sent */
+#define                   DATAEND  0x8        /* Data end indicator */
+#define                  SETUPEND  0x10       /* Setup end */
+#define                 SENDSTALL  0x20       /* Send STALL handshake */
+#define         SERVICED_RXPKTRDY  0x40       /* used to clear the RxPktRdy bit */
+#define         SERVICED_SETUPEND  0x80       /* used to clear the SetupEnd bit */
+#define                 FLUSHFIFO  0x100      /* flush endpoint FIFO */
+#define          STALL_RECEIVED_H  0x4        /* STALL handshake received host mode */
+#define                SETUPPKT_H  0x8        /* send Setup token host mode */
+#define                   ERROR_H  0x10       /* timeout error indicator host mode */
+#define                  REQPKT_H  0x20       /* Request an IN transaction host mode */
+#define               STATUSPKT_H  0x40       /* Status stage transaction host mode */
+#define             NAK_TIMEOUT_H  0x80       /* EP0 halted after a NAK host mode */
+
+/* Bit masks for USB_COUNT0 */
+
+#define              EP0_RX_COUNT  0x7f       /* number of received bytes in EP0 FIFO */
+
+/* Bit masks for USB_NAKLIMIT0 */
+
+#define             EP0_NAK_LIMIT  0x1f       /* number of frames/micro frames after which EP0 timeouts */
+
+/* Bit masks for USB_TX_MAX_PACKET */
+
+#define         MAX_PACKET_SIZE_T  0x7ff      /* maximum data pay load in a frame */
+
+/* Bit masks for USB_RX_MAX_PACKET */
+
+#define         MAX_PACKET_SIZE_R  0x7ff      /* maximum data pay load in a frame */
+
+/* Bit masks for USB_TXCSR */
+
+#define                TXPKTRDY_T  0x1        /* data packet in FIFO indicator */
+#define          FIFO_NOT_EMPTY_T  0x2        /* FIFO not empty */
+#define                UNDERRUN_T  0x4        /* TxPktRdy not set  for an IN token */
+#define               FLUSHFIFO_T  0x8        /* flush endpoint FIFO */
+#define              STALL_SEND_T  0x10       /* issue a Stall handshake */
+#define              STALL_SENT_T  0x20       /* Stall handshake transmitted */
+#define        CLEAR_DATATOGGLE_T  0x40       /* clear endpoint data toggle */
+#define                INCOMPTX_T  0x80       /* indicates that a large packet is split */
+#define              DMAREQMODE_T  0x400      /* DMA mode (0 or 1) selection */
+#define        FORCE_DATATOGGLE_T  0x800      /* Force data toggle */
+#define              DMAREQ_ENA_T  0x1000     /* Enable DMA request for Tx EP */
+#define                     ISO_T  0x4000     /* enable Isochronous transfers */
+#define                 AUTOSET_T  0x8000     /* allows TxPktRdy to be set automatically */
+#define                  ERROR_TH  0x4        /* error condition host mode */
+#define         STALL_RECEIVED_TH  0x20       /* Stall handshake received host mode */
+#define            NAK_TIMEOUT_TH  0x80       /* NAK timeout host mode */
+
+/* Bit masks for USB_TXCOUNT */
+
+#define                  TX_COUNT  0x1fff     /* Number of bytes to be written to the selected endpoint Tx FIFO */
+
+/* Bit masks for USB_RXCSR */
+
+#define                RXPKTRDY_R  0x1        /* data packet in FIFO indicator */
+#define               FIFO_FULL_R  0x2        /* FIFO not empty */
+#define                 OVERRUN_R  0x4        /* TxPktRdy not set  for an IN token */
+#define               DATAERROR_R  0x8        /* Out packet cannot be loaded into Rx  FIFO */
+#define               FLUSHFIFO_R  0x10       /* flush endpoint FIFO */
+#define              STALL_SEND_R  0x20       /* issue a Stall handshake */
+#define              STALL_SENT_R  0x40       /* Stall handshake transmitted */
+#define        CLEAR_DATATOGGLE_R  0x80       /* clear endpoint data toggle */
+#define                INCOMPRX_R  0x100      /* indicates that a large packet is split */
+#define              DMAREQMODE_R  0x800      /* DMA mode (0 or 1) selection */
+#define                 DISNYET_R  0x1000     /* disable Nyet handshakes */
+#define              DMAREQ_ENA_R  0x2000     /* Enable DMA request for Tx EP */
+#define                     ISO_R  0x4000     /* enable Isochronous transfers */
+#define               AUTOCLEAR_R  0x8000     /* allows TxPktRdy to be set automatically */
+#define                  ERROR_RH  0x4        /* TxPktRdy not set  for an IN token host mode */
+#define                 REQPKT_RH  0x20       /* request an IN transaction host mode */
+#define         STALL_RECEIVED_RH  0x40       /* Stall handshake received host mode */
+#define               INCOMPRX_RH  0x100      /* indicates that a large packet is split host mode */
+#define             DMAREQMODE_RH  0x800      /* DMA mode (0 or 1) selection host mode */
+#define                AUTOREQ_RH  0x4000     /* sets ReqPkt automatically host mode */
+
+/* Bit masks for USB_RXCOUNT */
+
+#define                  RX_COUNT  0x1fff     /* Number of received bytes in the packet in the Rx FIFO */
+
+/* Bit masks for USB_TXTYPE */
+
+#define            TARGET_EP_NO_T  0xf        /* EP number */
+#define                PROTOCOL_T  0xc        /* transfer type */
+
+/* Bit masks for USB_TXINTERVAL */
+
+#define          TX_POLL_INTERVAL  0xff       /* polling interval for selected Tx EP */
+
+/* Bit masks for USB_RXTYPE */
+
+#define            TARGET_EP_NO_R  0xf        /* EP number */
+#define                PROTOCOL_R  0xc        /* transfer type */
+
+/* Bit masks for USB_RXINTERVAL */
+
+#define          RX_POLL_INTERVAL  0xff       /* polling interval for selected Rx EP */
+
+/* Bit masks for USB_DMA_INTERRUPT */
+
+#define                  DMA0_INT  0x1        /* DMA0 pending interrupt */
+#define                  DMA1_INT  0x2        /* DMA1 pending interrupt */
+#define                  DMA2_INT  0x4        /* DMA2 pending interrupt */
+#define                  DMA3_INT  0x8        /* DMA3 pending interrupt */
+#define                  DMA4_INT  0x10       /* DMA4 pending interrupt */
+#define                  DMA5_INT  0x20       /* DMA5 pending interrupt */
+#define                  DMA6_INT  0x40       /* DMA6 pending interrupt */
+#define                  DMA7_INT  0x80       /* DMA7 pending interrupt */
+
+/* Bit masks for USB_DMAxCONTROL */
+
+#define                   DMA_ENA  0x1        /* DMA enable */
+#define                 DIRECTION  0x2        /* direction of DMA transfer */
+#define                      MODE  0x4        /* DMA Bus error */
+#define                   INT_ENA  0x8        /* Interrupt enable */
+#define                     EPNUM  0xf0       /* EP number */
+#define                  BUSERROR  0x100      /* DMA Bus error */
+
+/* Bit masks for USB_DMAxADDRHIGH */
+
+#define             DMA_ADDR_HIGH  0xffff     /* Upper 16-bits of memory source/destination address for the DMA master channel */
+
+/* Bit masks for USB_DMAxADDRLOW */
+
+#define              DMA_ADDR_LOW  0xffff     /* Lower 16-bits of memory source/destination address for the DMA master channel */
+
+/* Bit masks for USB_DMAxCOUNTHIGH */
+
+#define            DMA_COUNT_HIGH  0xffff     /* Upper 16-bits of byte count of DMA transfer for DMA master channel */
+
+/* Bit masks for USB_DMAxCOUNTLOW */
+
+#define             DMA_COUNT_LOW  0xffff     /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
+
+#endif
diff --git a/include/usb.h b/include/usb.h
index 7c47098..b398cc0 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -183,7 +183,8 @@ struct usb_device {
 #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \
 	defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_OHCI_NEW) || \
 	defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \
-	defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI)
+	defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \
+	defined(CONFIG_USB_BLACKFIN)
 
 int usb_lowlevel_init(void);
 int usb_lowlevel_stop(void);
-- 
1.6.3.1

[U-Boot] [PATCH] usb: musb: add timeout via CONFIG_MUSB_TIMEOUT

[Mike Frysinger]

From: Bryan Wu <bryan.wu@analog.com>

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 drivers/usb/musb/musb_hcd.c |   31 +++++++++++++++++++++++++++++++
 drivers/usb/musb/musb_hcd.h |    4 ++++
 2 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index 352a0d4..19d978b 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -111,6 +111,7 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
 {
 	u16 csr;
 	int result = 1;
+	int timeout = CONFIG_MUSB_TIMEOUT;
 
 	while (result > 0) {
 		csr = readw(&musbr->txcsr);
@@ -152,7 +153,17 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
 			}
 			break;
 		}
+
+		/* Check the timeout */
+		if (--timeout)
+			udelay(1);
+		else {
+			dev->status = USB_ST_CRC_ERR;
+			result = -1;
+			break;
+		}
 	}
+
 	return result;
 }
 
@@ -162,6 +173,7 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
 static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
 {
 	u16 csr;
+	int timeout = CONFIG_MUSB_TIMEOUT;
 
 	do {
 		if (check_stall(ep, 1)) {
@@ -174,6 +186,15 @@ static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
 			dev->status = USB_ST_CRC_ERR;
 			return 0;
 		}
+
+		/* Check the timeout */
+		if (--timeout)
+			udelay(1);
+		else {
+			dev->status = USB_ST_CRC_ERR;
+			return -1;
+		}
+
 	} while (csr & MUSB_TXCSR_TXPKTRDY);
 	return 1;
 }
@@ -184,6 +205,7 @@ static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
 static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
 {
 	u16 csr;
+	int timeout = CONFIG_MUSB_TIMEOUT;
 
 	do {
 		if (check_stall(ep, 0)) {
@@ -196,6 +218,15 @@ static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
 			dev->status = USB_ST_CRC_ERR;
 			return 0;
 		}
+
+		/* Check the timeout */
+		if (--timeout)
+			udelay(1);
+		else {
+			dev->status = USB_ST_CRC_ERR;
+			return -1;
+		}
+
 	} while (!(csr & MUSB_RXCSR_RXPKTRDY));
 	return 1;
 }
diff --git a/drivers/usb/musb/musb_hcd.h b/drivers/usb/musb/musb_hcd.h
index bb83311..b7f571d 100644
--- a/drivers/usb/musb/musb_hcd.h
+++ b/drivers/usb/musb/musb_hcd.h
@@ -30,6 +30,10 @@
 extern unsigned char new[];
 #endif
 
+#ifndef CONFIG_MUSB_TIMEOUT
+# define CONFIG_MUSB_TIMEOUT 100000
+#endif
+
 /* This defines the endpoint number used for control transfers */
 #define MUSB_CONTROL_EP 0
 
-- 
1.6.3.1

[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Remy Bohmer]

Hello Mike,

I got a remark about this patch:

2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> From: Bryan Wu <bryan.wu@analog.com>
>
> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> ---
> ?drivers/usb/musb/Makefile ? ? ? ? ? ? ? ? ? | ? ?1 +
> ?drivers/usb/musb/blackfin_usb.c ? ? ? ? ? ? | ?152 +++++++++++++++
> ?drivers/usb/musb/blackfin_usb.h ? ? ? ? ? ? | ? 27 +++
> ?drivers/usb/musb/musb_core.h ? ? ? ? ? ? ? ?| ? 73 +++++++
> ?include/asm-blackfin/mach-common/bits/usb.h | ?280 +++++++++++++++++++++++++++
> ?include/usb.h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?3 +-
> ?6 files changed, 535 insertions(+), 1 deletions(-)

> --- a/drivers/usb/musb/musb_core.h
> +++ b/drivers/usb/musb/musb_core.h
> @@ -42,6 +42,68 @@
>
> ?/* Mentor USB core register overlay structure */
> ?struct musb_regs {
> +#if defined(CONFIG_USB_BLACKFIN)
> + ? ? ? /* Every register is 32bit aligned, but only 16bits in size */
> +# define ureg(name) u16 name; u16 __pad_##name;
> + ? ? ? /* common registers */
> + ? ? ? ureg(faddr)
> + ? ? ? ureg(power)
> + ? ? ? ureg(intrtx)
> + ? ? ? ureg(intrrx)
> + ? ? ? ureg(intrtxe)
> + ? ? ? ureg(intrrxe)
> + ? ? ? ureg(intrusb)
> + ? ? ? ureg(intrusbe)
> + ? ? ? ureg(frame)
> + ? ? ? ureg(index)
> + ? ? ? ureg(testmode)
> + ? ? ? ureg(globintr)
> + ? ? ? ureg(global_ctl)
> + ? ? ? u32 ? ? reserved0[3];
> + ? ? ? /* indexed registers */
> + ? ? ? ureg(txmaxp)
> + ? ? ? ureg(txcsr)
> + ? ? ? ureg(rxmaxp)
> + ? ? ? ureg(rxcsr)
> + ? ? ? ureg(rxcount)
> + ? ? ? ureg(txtype)
> + ? ? ? ureg(txinterval)
> + ? ? ? ureg(rxtype)
> + ? ? ? ureg(rxinterval)
> + ? ? ? u32 ? ? reserved1;
> + ? ? ? ureg(txcount)
> + ? ? ? u32 ? ? reserved2[5];
> + ? ? ? /* fifo */
> + ? ? ? u16 ? ? fifox[32];
> + ? ? ? /* OTG, dynamic FIFO, version & vendor registers */
> + ? ? ? u32 ? ? reserved3[16];
> + ? ? ? ureg(devctl)
> + ? ? ? ureg(vbus_irq)
> + ? ? ? ureg(vbus_mask)
> + ? ? ? u32 reserved4[15];
> + ? ? ? ureg(linkinfo)
> + ? ? ? ureg(vplen)
> + ? ? ? ureg(hseof1)
> + ? ? ? ureg(fseof1)
> + ? ? ? ureg(lseof1)
> + ? ? ? u32 reserved5[41];
> + ? ? ? /* target address registers */
> + ? ? ? struct musb_tar_regs {
> + ? ? ? ? ? ? ? ureg(txmaxp)
> + ? ? ? ? ? ? ? ureg(txcsr)
> + ? ? ? ? ? ? ? ureg(rxmaxp)
> + ? ? ? ? ? ? ? ureg(rxcsr)
> + ? ? ? ? ? ? ? ureg(rxcount)
> + ? ? ? ? ? ? ? ureg(txtype)
> + ? ? ? ? ? ? ? ureg(txinternal)
> + ? ? ? ? ? ? ? ureg(rxtype)
> + ? ? ? ? ? ? ? ureg(rxinternal)
> + ? ? ? ? ? ? ? u32 ? ? reserved6;
> + ? ? ? ? ? ? ? ureg(txcount)
> + ? ? ? ? ? ? ? u32 reserved7[5];
> + ? ? ? } tar[8];
> +# undef ureg
> +#else
> ? ? ? ?/* common registers */
> ? ? ? ?u8 ? ? ?faddr;
> ? ? ? ?u8 ? ? ?power;
> @@ -97,6 +159,7 @@ struct musb_regs {
> ? ? ? ? ? ? ? ?u8 ? ? ?rxhubaddr;
> ? ? ? ? ? ? ? ?u8 ? ? ?rxhubport;
> ? ? ? ?} tar[16];
> +#endif

Can both branches of this ifdef be merged somehow, such that the ifdef
is much smaller?
Both branches seem to contain the same elements, only type differs (
which could maybe be handled with ureg() constructions also)

>  } __attribute__((aligned(32)));

Shouldn't this be '__attribute__((packed))' too?

Kind Regards,

Remy

[U-Boot] [PATCH] usb: musb: drop old musb read/write prototypes

[Remy Bohmer]

Hi,

2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> These functions are no longer defined, so remove their prototypes.
>
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> ---
> ?drivers/usb/musb/musb_core.h | ? ?6 ------
> ?1 files changed, 0 insertions(+), 6 deletions(-)
>

Applied to u-boot-usb. Thanks,

Remy

[U-Boot] [PATCH] usb: musb: add timeout via CONFIG_MUSB_TIMEOUT

[Remy Bohmer]

Hi,

2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> From: Bryan Wu <bryan.wu@analog.com>
>
> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> ---
> ?drivers/usb/musb/musb_hcd.c | ? 31 +++++++++++++++++++++++++++++++
> ?drivers/usb/musb/musb_hcd.h | ? ?4 ++++
> ?2 files changed, 35 insertions(+), 0 deletions(-)
>

Applied to u-boot-usb. Thanks,

Remy

[U-Boot] [PATCH] usb: musb: add timeout via CONFIG_MUSB_TIMEOUT

[Remy Bohmer]

Hello Mike,

2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> From: Bryan Wu <bryan.wu@analog.com>
>
> Signed-off-by: Bryan Wu <bryan.wu@analog.com>

I get permanent delivery errors on this email address. Are you sure it
is correct?
If not, can you please provide me a correct address?

Kind Regards,

Remy

[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Mike Frysinger]

On Sunday 21 June 2009 15:54:13 Remy Bohmer wrote:
> Hello Mike,
>
> I got a remark about this patch:
>
> 2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> > From: Bryan Wu <bryan.wu@analog.com>
> >
> > Signed-off-by: Bryan Wu <bryan.wu@analog.com>
> > Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> > ---
> >  drivers/usb/musb/Makefile                   |    1 +
> >  drivers/usb/musb/blackfin_usb.c             |  152 +++++++++++++++
> >  drivers/usb/musb/blackfin_usb.h             |   27 +++
> >  drivers/usb/musb/musb_core.h                |   73 +++++++
> >  include/asm-blackfin/mach-common/bits/usb.h |  280
> > +++++++++++++++++++++++++++ include/usb.h                               |
> >    3 +-
> >  6 files changed, 535 insertions(+), 1 deletions(-)
> >
> > --- a/drivers/usb/musb/musb_core.h
> > +++ b/drivers/usb/musb/musb_core.h
> > @@ -42,6 +42,68 @@
> >
> >  /* Mentor USB core register overlay structure */
> >  struct musb_regs {
> > +#if defined(CONFIG_USB_BLACKFIN)
> > +       /* Every register is 32bit aligned, but only 16bits in size */
> > +# define ureg(name) u16 name; u16 __pad_##name;
> > +       /* common registers */
> > +       ureg(faddr)
> > +       ureg(power)
> > +       ureg(intrtx)
> > +       ureg(intrrx)
> > +       ureg(intrtxe)
> > +       ureg(intrrxe)
> > +       ureg(intrusb)
> > +       ureg(intrusbe)
> > +       ureg(frame)
> > +       ureg(index)
> > +       ureg(testmode)
> > +       ureg(globintr)
> > +       ureg(global_ctl)
> > +       u32     reserved0[3];
> > +       /* indexed registers */
> > +       ureg(txmaxp)
> > +       ureg(txcsr)
> > +       ureg(rxmaxp)
> > +       ureg(rxcsr)
> > +       ureg(rxcount)
> > +       ureg(txtype)
> > +       ureg(txinterval)
> > +       ureg(rxtype)
> > +       ureg(rxinterval)
> > +       u32     reserved1;
> > +       ureg(txcount)
> > +       u32     reserved2[5];
> > +       /* fifo */
> > +       u16     fifox[32];
> > +       /* OTG, dynamic FIFO, version & vendor registers */
> > +       u32     reserved3[16];
> > +       ureg(devctl)
> > +       ureg(vbus_irq)
> > +       ureg(vbus_mask)
> > +       u32 reserved4[15];
> > +       ureg(linkinfo)
> > +       ureg(vplen)
> > +       ureg(hseof1)
> > +       ureg(fseof1)
> > +       ureg(lseof1)
> > +       u32 reserved5[41];
> > +       /* target address registers */
> > +       struct musb_tar_regs {
> > +               ureg(txmaxp)
> > +               ureg(txcsr)
> > +               ureg(rxmaxp)
> > +               ureg(rxcsr)
> > +               ureg(rxcount)
> > +               ureg(txtype)
> > +               ureg(txinternal)
> > +               ureg(rxtype)
> > +               ureg(rxinternal)
> > +               u32     reserved6;
> > +               ureg(txcount)
> > +               u32 reserved7[5];
> > +       } tar[8];
> > +# undef ureg
> > +#else
> >        /* common registers */
> >        u8      faddr;
> >        u8      power;
> > @@ -97,6 +159,7 @@ struct musb_regs {
> >                u8      rxhubaddr;
> >                u8      rxhubport;
> >        } tar[16];
> > +#endif
>
> Can both branches of this ifdef be merged somehow, such that the ifdef
> is much smaller?
>
> Both branches seem to contain the same elements, only type differs (
> which could maybe be handled with ureg() constructions also)

the layout isnt exactly the same, the sizes arent uniform enough for ureg(), 
and the registers available dont match either.  we'd still have ifdefs, but 
interleaved, and i think that'd be much more likely to lead to breakage for 
architectures invovled.

> >  } __attribute__((aligned(32)));
>
> Shouldn't this be '__attribute__((packed))' too?

i didnt add that, but adding packed would probably make sense
-mike
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[U-Boot] [PATCH] usb: musb: add timeout via CONFIG_MUSB_TIMEOUT

[Mike Frysinger]

On Sunday 21 June 2009 16:05:43 Remy Bohmer wrote:
> 2009/6/16 Mike Frysinger <vapier@gentoo.org>:
> > From: Bryan Wu <bryan.wu@analog.com>
> >
> > Signed-off-by: Bryan Wu <bryan.wu@analog.com>
>
> I get permanent delivery errors on this email address. Are you sure it
> is correct?
> If not, can you please provide me a correct address?

it isnt anymore as Bryan has changed jobs
-mike
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[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Mike Frysinger]

ping ... should still apply (or at least git-am should be able to handle it)
-mike
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[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Remy Bohmer]

Hello Mike,

> ping ... should still apply (or at least git-am should be able to handle it)

Well, this comment at least gave me the impression that you would
update your patch...
> i didnt add that, but adding packed would probably make sense
> -mike

Remy

2009/6/21 Mike Frysinger <vapier@gentoo.org>:
> On Sunday 21 June 2009 15:54:13 Remy Bohmer wrote:
>> Hello Mike,
>>
>> I got a remark about this patch:
>>
>> 2009/6/16 Mike Frysinger <vapier@gentoo.org>:
>> > From: Bryan Wu <bryan.wu@analog.com>
>> >
>> > Signed-off-by: Bryan Wu <bryan.wu@analog.com>
>> > Signed-off-by: Mike Frysinger <vapier@gentoo.org>
>> > ---
>> > ?drivers/usb/musb/Makefile ? ? ? ? ? ? ? ? ? | ? ?1 +
>> > ?drivers/usb/musb/blackfin_usb.c ? ? ? ? ? ? | ?152 +++++++++++++++
>> > ?drivers/usb/musb/blackfin_usb.h ? ? ? ? ? ? | ? 27 +++
>> > ?drivers/usb/musb/musb_core.h ? ? ? ? ? ? ? ?| ? 73 +++++++
>> > ?include/asm-blackfin/mach-common/bits/usb.h | ?280
>> > +++++++++++++++++++++++++++ include/usb.h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? |
>> > ? ?3 +-
>> > ?6 files changed, 535 insertions(+), 1 deletions(-)
>> >
>> > --- a/drivers/usb/musb/musb_core.h
>> > +++ b/drivers/usb/musb/musb_core.h
>> > @@ -42,6 +42,68 @@
>> >
>> > ?/* Mentor USB core register overlay structure */
>> > ?struct musb_regs {
>> > +#if defined(CONFIG_USB_BLACKFIN)
>> > + ? ? ? /* Every register is 32bit aligned, but only 16bits in size */
>> > +# define ureg(name) u16 name; u16 __pad_##name;
>> > + ? ? ? /* common registers */
>> > + ? ? ? ureg(faddr)
>> > + ? ? ? ureg(power)
>> > + ? ? ? ureg(intrtx)
>> > + ? ? ? ureg(intrrx)
>> > + ? ? ? ureg(intrtxe)
>> > + ? ? ? ureg(intrrxe)
>> > + ? ? ? ureg(intrusb)
>> > + ? ? ? ureg(intrusbe)
>> > + ? ? ? ureg(frame)
>> > + ? ? ? ureg(index)
>> > + ? ? ? ureg(testmode)
>> > + ? ? ? ureg(globintr)
>> > + ? ? ? ureg(global_ctl)
>> > + ? ? ? u32 ? ? reserved0[3];
>> > + ? ? ? /* indexed registers */
>> > + ? ? ? ureg(txmaxp)
>> > + ? ? ? ureg(txcsr)
>> > + ? ? ? ureg(rxmaxp)
>> > + ? ? ? ureg(rxcsr)
>> > + ? ? ? ureg(rxcount)
>> > + ? ? ? ureg(txtype)
>> > + ? ? ? ureg(txinterval)
>> > + ? ? ? ureg(rxtype)
>> > + ? ? ? ureg(rxinterval)
>> > + ? ? ? u32 ? ? reserved1;
>> > + ? ? ? ureg(txcount)
>> > + ? ? ? u32 ? ? reserved2[5];
>> > + ? ? ? /* fifo */
>> > + ? ? ? u16 ? ? fifox[32];
>> > + ? ? ? /* OTG, dynamic FIFO, version & vendor registers */
>> > + ? ? ? u32 ? ? reserved3[16];
>> > + ? ? ? ureg(devctl)
>> > + ? ? ? ureg(vbus_irq)
>> > + ? ? ? ureg(vbus_mask)
>> > + ? ? ? u32 reserved4[15];
>> > + ? ? ? ureg(linkinfo)
>> > + ? ? ? ureg(vplen)
>> > + ? ? ? ureg(hseof1)
>> > + ? ? ? ureg(fseof1)
>> > + ? ? ? ureg(lseof1)
>> > + ? ? ? u32 reserved5[41];
>> > + ? ? ? /* target address registers */
>> > + ? ? ? struct musb_tar_regs {
>> > + ? ? ? ? ? ? ? ureg(txmaxp)
>> > + ? ? ? ? ? ? ? ureg(txcsr)
>> > + ? ? ? ? ? ? ? ureg(rxmaxp)
>> > + ? ? ? ? ? ? ? ureg(rxcsr)
>> > + ? ? ? ? ? ? ? ureg(rxcount)
>> > + ? ? ? ? ? ? ? ureg(txtype)
>> > + ? ? ? ? ? ? ? ureg(txinternal)
>> > + ? ? ? ? ? ? ? ureg(rxtype)
>> > + ? ? ? ? ? ? ? ureg(rxinternal)
>> > + ? ? ? ? ? ? ? u32 ? ? reserved6;
>> > + ? ? ? ? ? ? ? ureg(txcount)
>> > + ? ? ? ? ? ? ? u32 reserved7[5];
>> > + ? ? ? } tar[8];
>> > +# undef ureg
>> > +#else
>> > ? ? ? ?/* common registers */
>> > ? ? ? ?u8 ? ? ?faddr;
>> > ? ? ? ?u8 ? ? ?power;
>> > @@ -97,6 +159,7 @@ struct musb_regs {
>> > ? ? ? ? ? ? ? ?u8 ? ? ?rxhubaddr;
>> > ? ? ? ? ? ? ? ?u8 ? ? ?rxhubport;
>> > ? ? ? ?} tar[16];
>> > +#endif
>>
>> Can both branches of this ifdef be merged somehow, such that the ifdef
>> is much smaller?
>>
>> Both branches seem to contain the same elements, only type differs (
>> which could maybe be handled with ureg() constructions also)
>
> the layout isnt exactly the same, the sizes arent uniform enough for ureg(),
> and the registers available dont match either. ?we'd still have ifdefs, but
> interleaved, and i think that'd be much more likely to lead to breakage for
> architectures invovled.
>
>> > ?} __attribute__((aligned(32)));
>>
>> Shouldn't this be '__attribute__((packed))' too?
>
> i didnt add that, but adding packed would probably make sense
> -mike
>

[U-Boot] [PATCH] usb: musb: add support for Blackfin MUSB

[Mike Frysinger]

On Wednesday 02 September 2009 06:43:45 Remy Bohmer wrote:
> Hello Mike,
> > ping ... should still apply (or at least git-am should be able to handle
> > it)
>
> Well, this comment at least gave me the impression that you would
> update your patch...
>
> > i didnt add that, but adding packed would probably make sense

i'd prefer to send it as a sep changeset as that will affect more than just 
the Blackfin platform ...
-mike
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