powerpc/405ex: Support cuImage for PPC405EX

powerpc/405ex: Support cuImage for PPC405EX

[Tiejun Chen]

Summary: powerpc/405ex: Support cuImage for PPC405EX
Reviewers: Benjmain and linux-ppc
----------------------------------------------------
These patch series are used to support cuImage on the kilauea board based on PPC405ex.

Tested on the amcc kilauea board:
===
...
=> tftp 1000000 cuImage.kilauea
Waiting for PHY auto negotiation to complete.. done
ENET Speed is 100 Mbps - FULL duplex connection (EMAC0)
Using ppc_4xx_eth0 device
TFTP from server 192.168.1.2; our IP address is 192.168.1.103
Filename 'cuImage.kilauea'.
Load address: 0x1000000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #########################################
done
Bytes transferred = 1540945 (178351 hex)
=> bootm
## Booting kernel from Legacy Image at 01000000 ...
   Image Name:   Linux-2.6.31-rc5-57857-g8df7f47-
   Created:      2009-08-17   6:31:13 UTC
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    1540881 Bytes =  1.5 MB
   Load Address: 00400000
   Entry Point:  00400468
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
CPU clock-frequency <- 0x23c345fa (600MHz)
CPU timebase-frequency <- 0x23c345fa (600MHz)
/plb: clock-frequency <- bebc1fe (200MHz)
/plb/opb: clock-frequency <- 5f5e0ff (100MHz)
/plb/opb/ebc: clock-frequency <- 5f5e0ff (100MHz)
/plb/opb/serial@ef600200: clock-frequency <- a8c000 (11MHz)
/plb/opb/serial@ef600300: clock-frequency <- a8c000 (11MHz)
Memory <- <0x0 0x10000000> (256MB)
ethernet0: local-mac-address <- 00:06:4b:10:22:6c
ethernet1: local-mac-address <- 00:06:4b:10:22:6d

zImage starting: loaded at 0x00400000 (sp: 0x0fe9ec08)
Allocating 0x330c70 bytes for kernel ...
gunzipping (0x00000000 <- 0x0040f000:0x0073a03c)...done 0x31425c bytes

Linux/PowerPC load: root=/dev/nfs rw nfsroot=192.168.1.2:/home/vividfe/rootfsf
Finalizing device tree... flat tree at 0x747300
Using PowerPC 40x Platform machine description
...

Best Regards
Tiejun

[PATCH 1/2] powerpc/405ex: provide necessary fixup function to support cuImage

[Tiejun Chen]

For cuImage format it's necessary to provide clock fixups since u-boot will
not pass necessary clock frequency into the dtb included into cuImage so we 
implement the clock fixups as defined in the technical documentation for the 
board and update header file with the basic register definitions. 

Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
 arch/powerpc/boot/4xx.c |  142 +++++++++++++++++++++++++++++++++++++++++++++++
 arch/powerpc/boot/4xx.h |    1 +
 arch/powerpc/boot/dcr.h |   12 ++++
 3 files changed, 155 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index 325b310..b5561b3 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -8,6 +8,10 @@
  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  *   Copyright (c) 2003, 2004 Zultys Technologies
  *
+ * Copyright (C) 2009 Wind River Systems, Inc.
+ *   Updated for supporting PPC405EX on Kilauea.
+ *   Tiejun Chen <tiejun.chen@windriver.com>
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
@@ -659,3 +663,141 @@ void ibm405ep_fixup_clocks(unsigned int sys_clk)
 	dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
 	dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
 }
+
+static u8 fwdv_multi_bits[] = {
+	/* values for:  1 - 16 */
+	0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05,
+	0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03
+};
+
+u32 get_fwdva(unsigned long cpr_fwdv)
+{
+	u32 index;
+
+	for (index = 0; index < ARRAY_SIZE(fwdv_multi_bits); index++)
+		if (cpr_fwdv == (u32)fwdv_multi_bits[index])
+			return index + 1;
+
+	return 0;
+}
+
+static u8 fbdv_multi_bits[] = {
+	/* values for:  1 - 100 */
+	0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4,
+	0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb,
+	0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96,
+	0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde,
+	0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb,
+	0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91,
+	0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b,
+	0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95,
+	0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4,
+	0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc,
+	/* values for:  101 - 200 */
+	0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
+	0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
+	0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
+	0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
+	0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
+	0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,
+	0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6,
+	0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9,
+	0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e,
+	0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf,
+	/* values for:  201 - 255 */
+	0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae,
+	0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2,
+	0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2,
+	0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98,
+	0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81,
+	0x03, 0x87, 0x0f, 0x9f, 0x3f  /* END */
+};
+
+u32 get_fbdv(unsigned long cpr_fbdv)
+{
+	u32 index;
+
+	for (index = 0; index < ARRAY_SIZE(fbdv_multi_bits); index++)
+		if (cpr_fbdv == (u32)fbdv_multi_bits[index])
+			return index + 1;
+
+	return 0;
+}
+
+void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk)
+{
+	/* PLL config */
+	u32 pllc  = CPR0_READ(CPR0_PLLC);
+	u32 plld  = CPR0_READ(CPR0_PLLD);
+	u32 cpud  = CPR0_READ(CPR0_CPUD);
+	u32 plbd  = CPR0_READ(CPR0_PLBD);
+	u32 opbd  = CPR0_READ(CPR0_OPBD);
+	u32 perd  = CPR0_READ(CPR0_PERD);
+
+	/* Dividers */
+	u32 fbdv   = get_fbdv(__fix_zero((plld >> 24) & 0xff, 1));
+
+	u32 fwdva  = get_fwdva(__fix_zero((plld >> 16) & 0x0f, 1));
+
+	u32 cpudv0 = __fix_zero((cpud >> 24) & 7, 8);
+	
+	/* PLBDV0 is hardwared to 010. */
+	u32 plbdv0 = 2;
+	u32 plb2xdv0 = __fix_zero((plbd >> 16) & 7, 8);
+
+	u32 opbdv0 = __fix_zero((opbd >> 24) & 3, 4);
+
+	u32 perdv0 = __fix_zero((perd >> 24) & 3, 4);
+
+	/* Resulting clocks */
+	u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1; 
+
+	/* PLL's VCO is the source for primary forward ? */
+	if (pllc & 0x40000000) {
+		u32 m;
+
+		/* Feedback path */
+		switch ((pllc >> 24) & 7) {
+		case 0:
+			/* PLLOUTx */
+			m = fbdv;
+			break;
+		case 1:
+			/* CPU */
+			m = fbdv * fwdva * cpudv0;
+			break;
+		case 5:
+			/* PERClk */
+			m = fbdv * fwdva * plb2xdv0 * plbdv0 * opbdv0 * perdv0;
+			break;
+		default:
+			printf("WARNING ! Invalid PLL feedback source !\n");
+			goto bypass;
+		}
+
+		vco = (unsigned int)(sys_clk * m);
+	} else {
+bypass:
+		/* Bypass system PLL */
+		vco = 0;
+	}
+
+	/* CPU = VCO / ( FWDVA x CPUDV0) */	
+	cpu = vco / (fwdva * cpudv0);
+	/* PLB = VCO / ( FWDVA x PLB2XDV0 x PLBDV0) */	
+	plb = vco / (fwdva * plb2xdv0 * plbdv0);
+	/* OPB = PLB / OPBDV0 */	
+	opb = plb / opbdv0;
+	/* EBC = OPB / PERDV0 */	
+	ebc = opb / perdv0;
+	
+	tb = cpu;
+	uart0 = uart1 = uart_clk;
+
+	dt_fixup_cpu_clocks(cpu, tb, 0);
+	dt_fixup_clock("/plb", plb);
+	dt_fixup_clock("/plb/opb", opb);
+	dt_fixup_clock("/plb/opb/ebc", ebc);
+	dt_fixup_clock("/plb/opb/serial@ef600200", uart0);
+	dt_fixup_clock("/plb/opb/serial@ef600300", uart1);
+}
diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h
index 2606e64..7dc5d45 100644
--- a/arch/powerpc/boot/4xx.h
+++ b/arch/powerpc/boot/4xx.h
@@ -21,6 +21,7 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc);
 
 void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
 void ibm405ep_fixup_clocks(unsigned int sys_clk);
+void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk);
 void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
 void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
 			   unsigned int tmr_clk);
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 95b9f53..ba41624 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -153,6 +153,18 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
 #define DCRN_CPC0_PLLMR1  0xf4
 #define DCRN_CPC0_UCR     0xf5
 
+/* 405EX Clocking Control regs */
+#define CPR0_CLKUPD     0x0020
+#define CPR0_PLLC       0x0040
+#define CPR0_PLLD       0x0060
+#define CPR0_CPUD       0x0080
+#define CPR0_PLBD       0x00a0
+#define CPR0_OPBD       0x00c0
+#define CPR0_PERD       0x00e0
+#define CPR0_AHBD       0x0100
+#define CPR0_ICFG       0x0140
+
+
 /* 440GX Clock control etc */
 
 
-- 
1.5.6

[PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[Tiejun Chen]

To support cuImage, we need to initialize the required sections and 
ensure that it is built.

Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
 arch/powerpc/boot/Makefile         |    3 +-
 arch/powerpc/boot/cuboot-kilauea.c |   50 ++++++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/boot/cuboot-kilauea.c

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9ae7b7e..44ce95b 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -75,7 +75,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
 		cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
 		cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
 		virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
-		cuboot-acadia.c cuboot-amigaone.c
+		cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
 image-$(CONFIG_EP405)			+= dtbImage.ep405
 image-$(CONFIG_WALNUT)			+= treeImage.walnut
 image-$(CONFIG_ACADIA)			+= cuImage.acadia
+image-$(CONFIG_KILAUEA)		+= cuImage.kilauea
 
 # Board ports in arch/powerpc/platform/44x/Kconfig
 image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
diff --git a/arch/powerpc/boot/cuboot-kilauea.c b/arch/powerpc/boot/cuboot-kilauea.c
new file mode 100644
index 0000000..7db1b39
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-kilauea.c
@@ -0,0 +1,50 @@
+/*
+ * Old U-boot compatibility for PPC405EX. This image is already included 
+ * a dtb.    
+ *
+ * Author: Tiejun Chen <tiejun.chen@windriver.com>
+ *
+ * Copyright (C) 2009 Wind River Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "dcr.h"
+#include "stdio.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_44x
+#include "ppcboot.h"
+
+#define KILAUEA_SYS_EXT_SERIAL_CLOCK     11059200        /* ext. 11.059MHz clk */
+
+static bd_t bd;
+
+static void kilauea_fixups(void)
+{
+	/*TODO: Please change this as the real. Note that should be 33MHZ~100MHZ.*/
+	unsigned long sysclk = 33333333;
+
+	ibm405ex_fixup_clocks(sysclk, KILAUEA_SYS_EXT_SERIAL_CLOCK);
+	dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+	ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+	dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+	dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+		unsigned long r6, unsigned long r7)
+{
+	CUBOOT_INIT();
+	platform_ops.fixups = kilauea_fixups;
+	platform_ops.exit = ibm40x_dbcr_reset;
+	fdt_init(_dtb_start);
+	serial_console_init();
+}
-- 
1.5.6

Mailing lists (Was: Re: powerpc/405ex: Support cuImage for PPC405EX)

[Stephen Rothwell]

[-- Attachment #1: Type: text/plain, Size: 265 bytes --]

Please do *not* send mail to both linuxppc-dev@ozlabs.org and
linuxppc-dev@lists.ozlabs.org.   We all end up with two copies :-(

They are the same list.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 197 bytes --]

Re: powerpc/405ex: Support cuImage for PPC405EX

[Benjamin Herrenschmidt]

On Tue, 2009-08-18 at 10:28 +0800, Tiejun Chen wrote:
> Summary: powerpc/405ex: Support cuImage for PPC405EX
> Reviewers: Benjmain and linux-ppc
> ----------------------------------------------------
> These patch series are used to support cuImage on the kilauea board based on PPC405ex.

Thanks !

I'll let Josh pick that up.

Cheers,
Ben.


> Tested on the amcc kilauea board:
> ===
> ...
> => tftp 1000000 cuImage.kilauea
> Waiting for PHY auto negotiation to complete.. done
> ENET Speed is 100 Mbps - FULL duplex connection (EMAC0)
> Using ppc_4xx_eth0 device
> TFTP from server 192.168.1.2; our IP address is 192.168.1.103
> Filename 'cuImage.kilauea'.
> Load address: 0x1000000
> Loading: #################################################################
>          #################################################################
>          #################################################################
>          #################################################################
>          #########################################
> done
> Bytes transferred = 1540945 (178351 hex)
> => bootm
> ## Booting kernel from Legacy Image at 01000000 ...
>    Image Name:   Linux-2.6.31-rc5-57857-g8df7f47-
>    Created:      2009-08-17   6:31:13 UTC
>    Image Type:   PowerPC Linux Kernel Image (gzip compressed)
>    Data Size:    1540881 Bytes =  1.5 MB
>    Load Address: 00400000
>    Entry Point:  00400468
>    Verifying Checksum ... OK
>    Uncompressing Kernel Image ... OK
> CPU clock-frequency <- 0x23c345fa (600MHz)
> CPU timebase-frequency <- 0x23c345fa (600MHz)
> /plb: clock-frequency <- bebc1fe (200MHz)
> /plb/opb: clock-frequency <- 5f5e0ff (100MHz)
> /plb/opb/ebc: clock-frequency <- 5f5e0ff (100MHz)
> /plb/opb/serial@ef600200: clock-frequency <- a8c000 (11MHz)
> /plb/opb/serial@ef600300: clock-frequency <- a8c000 (11MHz)
> Memory <- <0x0 0x10000000> (256MB)
> ethernet0: local-mac-address <- 00:06:4b:10:22:6c
> ethernet1: local-mac-address <- 00:06:4b:10:22:6d
> 
> zImage starting: loaded at 0x00400000 (sp: 0x0fe9ec08)
> Allocating 0x330c70 bytes for kernel ...
> gunzipping (0x00000000 <- 0x0040f000:0x0073a03c)...done 0x31425c bytes
> 
> Linux/PowerPC load: root=/dev/nfs rw nfsroot=192.168.1.2:/home/vividfe/rootfsf
> Finalizing device tree... flat tree at 0x747300
> Using PowerPC 40x Platform machine description
> ...
> 
> Best Regards
> Tiejun
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 

Re: Mailing lists (Was: Re: powerpc/405ex: Support cuImage for PPC405EX)

[tiejun.chen]

Stephen Rothwell wrote:
> Please do *not* send mail to both linuxppc-dev@ozlabs.org and
> linuxppc-dev@lists.ozlabs.org.   We all end up with two copies :-(
> 
> They are the same list.

Sorry for this inconvenient I bring :(

Best Regards
Tiejun

Re: powerpc/405ex: Support cuImage for PPC405EX

[Josh Boyer]

On Tue, Aug 18, 2009 at 10:28:02AM +0800, Tiejun Chen wrote:
>Summary: powerpc/405ex: Support cuImage for PPC405EX
>Reviewers: Benjmain and linux-ppc
>----------------------------------------------------
>These patch series are used to support cuImage on the kilauea board based on PPC405ex.
>
>Tested on the amcc kilauea board:

Hm.  The U-Boot version that ships on the AMCC Kilauea board is FDT aware, so
cuImage shouldn't be needed at all.  I'm slightly confused why we need this.
Are you using it for some other board derived from 405EX that doesn't have
an FDT aware U-Boot?

josh

Re: powerpc/405ex: Support cuImage for PPC405EX

[tiejun.chen]

Josh Boyer wrote:
> On Tue, Aug 18, 2009 at 10:28:02AM +0800, Tiejun Chen wrote:
>> Summary: powerpc/405ex: Support cuImage for PPC405EX
>> Reviewers: Benjmain and linux-ppc
>> ----------------------------------------------------
>> These patch series are used to support cuImage on the kilauea board based on PPC405ex.
>>
>> Tested on the amcc kilauea board:
> 
> Hm.  The U-Boot version that ships on the AMCC Kilauea board is FDT aware, so
> cuImage shouldn't be needed at all.  I'm slightly confused why we need this.

That the newer u-boot can aware extra on Kilauea is really as you said. But I
think I/we need to consider some other requirements for 405EX, such as only
using one image for convenient on embedded system, and u-boot don't pass dtb for
kernel since it will be isolated with one customer software layer.

And actually to support old U-boot compatibility is original *goal* of
implementing cuImage in kernel as we know. Right?

As Documentation/powerpc/bootwrapper.txt I think the kernel should support more
image variant to satisfy different requirement. Sometimes that is also beyond we
can discuss here.

> Are you using it for some other board derived from 405EX that doesn't have
> an FDT aware U-Boot?
> 

Yes, this is really another factor. Anyway thinks your comments.

Best Reards
Tiejun

> josh
> 

Re: powerpc/405ex: Support cuImage for PPC405EX

[Josh Boyer]

On Wed, Aug 19, 2009 at 09:45:13AM +0800, tiejun.chen wrote:
>Josh Boyer wrote:
>> On Tue, Aug 18, 2009 at 10:28:02AM +0800, Tiejun Chen wrote:
>>> Summary: powerpc/405ex: Support cuImage for PPC405EX
>>> Reviewers: Benjmain and linux-ppc
>>> ----------------------------------------------------
>>> These patch series are used to support cuImage on the kilauea board based on PPC405ex.
>>>
>>> Tested on the amcc kilauea board:
>> 
>> Hm.  The U-Boot version that ships on the AMCC Kilauea board is FDT aware, so
>> cuImage shouldn't be needed at all.  I'm slightly confused why we need this.
>
>That the newer u-boot can aware extra on Kilauea is really as you said. But I
>think I/we need to consider some other requirements for 405EX, such as only
>using one image for convenient on embedded system, and u-boot don't pass dtb for
>kernel since it will be isolated with one customer software layer.
>
>And actually to support old U-boot compatibility is original *goal* of
>implementing cuImage in kernel as we know. Right?

Yes.  Supporting _old_ U-Boot compatibility.  Not FDT aware U-Boot :).


>As Documentation/powerpc/bootwrapper.txt I think the kernel should support more
>image variant to satisfy different requirement. Sometimes that is also beyond we
>can discuss here.
>
>> Are you using it for some other board derived from 405EX that doesn't have
>> an FDT aware U-Boot?
>> 
>
>Yes, this is really another factor. Anyway thinks your comments.

That's fine then.  I have no real problems with having a cuImage that works
on Kilauea.  I just wouldn't want to promote it as the default because the
cuImage wrapper is a bit of a hack.

Anyway, I'll review the patches soon.  Thanks for the explanation.

josh

Re: [PATCH 1/2] powerpc/405ex: provide necessary fixup function to support cuImage

[Josh Boyer]

On Tue, Aug 18, 2009 at 10:28:03AM +0800, Tiejun Chen wrote:
>For cuImage format it's necessary to provide clock fixups since u-boot will
>not pass necessary clock frequency into the dtb included into cuImage so we 
>implement the clock fixups as defined in the technical documentation for the 
>board and update header file with the basic register definitions. 
>
>Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
>---
> arch/powerpc/boot/4xx.c |  142 +++++++++++++++++++++++++++++++++++++++++++++++
> arch/powerpc/boot/4xx.h |    1 +
> arch/powerpc/boot/dcr.h |   12 ++++
> 3 files changed, 155 insertions(+), 0 deletions(-)
>
>diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
>index 325b310..b5561b3 100644
>--- a/arch/powerpc/boot/4xx.c
>+++ b/arch/powerpc/boot/4xx.c
>@@ -8,6 +8,10 @@
>  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
>  *   Copyright (c) 2003, 2004 Zultys Technologies
>  *
>+ * Copyright (C) 2009 Wind River Systems, Inc.
>+ *   Updated for supporting PPC405EX on Kilauea.
>+ *   Tiejun Chen <tiejun.chen@windriver.com>
>+ *
>  * This program is free software; you can redistribute it and/or
>  * modify it under the terms of the GNU General Public License
>  * as published by the Free Software Foundation; either version
>@@ -659,3 +663,141 @@ void ibm405ep_fixup_clocks(unsigned int sys_clk)
> 	dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
> 	dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
> }
>+
>+static u8 fwdv_multi_bits[] = {
>+	/* values for:  1 - 16 */
>+	0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05,
>+	0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03
>+};
>+
>+u32 get_fwdva(unsigned long cpr_fwdv)
>+{
>+	u32 index;
>+
>+	for (index = 0; index < ARRAY_SIZE(fwdv_multi_bits); index++)
>+		if (cpr_fwdv == (u32)fwdv_multi_bits[index])
>+			return index + 1;
>+
>+	return 0;
>+}
>+
>+static u8 fbdv_multi_bits[] = {
>+	/* values for:  1 - 100 */
>+	0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4,
>+	0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb,
>+	0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96,
>+	0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde,
>+	0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb,
>+	0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91,
>+	0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b,
>+	0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95,
>+	0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4,
>+	0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc,
>+	/* values for:  101 - 200 */
>+	0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
>+	0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
>+	0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
>+	0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
>+	0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
>+	0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,
>+	0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6,
>+	0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9,
>+	0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e,
>+	0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf,
>+	/* values for:  201 - 255 */
>+	0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae,
>+	0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2,
>+	0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2,
>+	0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98,
>+	0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81,
>+	0x03, 0x87, 0x0f, 0x9f, 0x3f  /* END */
>+};
>+
>+u32 get_fbdv(unsigned long cpr_fbdv)
>+{
>+	u32 index;
>+
>+	for (index = 0; index < ARRAY_SIZE(fbdv_multi_bits); index++)
>+		if (cpr_fbdv == (u32)fbdv_multi_bits[index])
>+			return index + 1;
>+
>+	return 0;
>+}

Is this generic?  Can we the function and value arrays to get the fbdv for
all 4xx boards and have the right values pop out?  If not, then all of these
need to be prefixed with ibm405ex_.

>diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
>index 95b9f53..ba41624 100644
>--- a/arch/powerpc/boot/dcr.h
>+++ b/arch/powerpc/boot/dcr.h
>@@ -153,6 +153,18 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
> #define DCRN_CPC0_PLLMR1  0xf4
> #define DCRN_CPC0_UCR     0xf5
>
>+/* 405EX Clocking Control regs */
>+#define CPR0_CLKUPD     0x0020
>+#define CPR0_PLLC       0x0040
>+#define CPR0_PLLD       0x0060
>+#define CPR0_CPUD       0x0080
>+#define CPR0_PLBD       0x00a0
>+#define CPR0_OPBD       0x00c0
>+#define CPR0_PERD       0x00e0
>+#define CPR0_AHBD       0x0100
>+#define CPR0_ICFG       0x0140

You duplicated the #defines right below this.  Just change the comment for
the already existing defines to say "440GX/405EX Clock Control regs".  You
don't need to add CPR0_ICFG either, since you don't use it anywhere.

josh

Re: [PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[Josh Boyer]

On Tue, Aug 18, 2009 at 10:28:04AM +0800, Tiejun Chen wrote:
>To support cuImage, we need to initialize the required sections and 
>ensure that it is built.
>
>-		cuboot-acadia.c cuboot-amigaone.c
>+		cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
> src-boot := $(src-wlib) $(src-plat) empty.c
>
> src-boot := $(addprefix $(obj)/, $(src-boot))
>@@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
> image-$(CONFIG_EP405)			+= dtbImage.ep405
> image-$(CONFIG_WALNUT)			+= treeImage.walnut
> image-$(CONFIG_ACADIA)			+= cuImage.acadia
>+image-$(CONFIG_KILAUEA)		+= cuImage.kilauea

I'm not thrilled with this part as cuImage is really the secondary
solution if the U-Boot that comes with a board if FDT aware.  If you
have a different board that needs this, perhaps you could add the
target when that board support gets upstream?

>+static void kilauea_fixups(void)
>+{
>+	/*TODO: Please change this as the real. Note that should be 33MHZ~100MHZ.*/

What does that mean?

josh

Re: [PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[tiejun.chen]

Josh Boyer wrote:
> On Tue, Aug 18, 2009 at 10:28:04AM +0800, Tiejun Chen wrote:
>> To support cuImage, we need to initialize the required sections and 
>> ensure that it is built.
>>
>> -		cuboot-acadia.c cuboot-amigaone.c
>> +		cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
>> src-boot := $(src-wlib) $(src-plat) empty.c
>>
>> src-boot := $(addprefix $(obj)/, $(src-boot))
>> @@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
>> image-$(CONFIG_EP405)			+= dtbImage.ep405
>> image-$(CONFIG_WALNUT)			+= treeImage.walnut
>> image-$(CONFIG_ACADIA)			+= cuImage.acadia
>> +image-$(CONFIG_KILAUEA)		+= cuImage.kilauea
> 
> I'm not thrilled with this part as cuImage is really the secondary
> solution if the U-Boot that comes with a board if FDT aware.  If you
> have a different board that needs this, perhaps you could add the
> target when that board support gets upstream?
> 

Agreed and I will remove this line as you expect. Right?

>> +static void kilauea_fixups(void)
>> +{
>> +	/*TODO: Please change this as the real. Note that should be 33MHZ~100MHZ.*/
> 
> What does that mean?
> 

It's difficult to check the sysclk value on all revision Kilauea board for me,
and we have to check this value only by the real target, not by reading one
register. So I hope it's safe to remind other guys here.

But I am sure that should be 33MHZ ~ 100MHZ as PPC405EX manual.

Best Regards
Tiejun

> josh
> 

Re: [PATCH 1/2] powerpc/405ex: provide necessary fixup function to support cuImage

[tiejun.chen]

Josh Boyer wrote:
> On Tue, Aug 18, 2009 at 10:28:03AM +0800, Tiejun Chen wrote:
>> For cuImage format it's necessary to provide clock fixups since u-boot will
>> not pass necessary clock frequency into the dtb included into cuImage so we 
>> implement the clock fixups as defined in the technical documentation for the 
>> board and update header file with the basic register definitions. 
>>
>> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
>> ---
>> arch/powerpc/boot/4xx.c |  142 +++++++++++++++++++++++++++++++++++++++++++++++
>> arch/powerpc/boot/4xx.h |    1 +
>> arch/powerpc/boot/dcr.h |   12 ++++
>> 3 files changed, 155 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
>> index 325b310..b5561b3 100644
>> --- a/arch/powerpc/boot/4xx.c
>> +++ b/arch/powerpc/boot/4xx.c
>> @@ -8,6 +8,10 @@
>>  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
>>  *   Copyright (c) 2003, 2004 Zultys Technologies
>>  *
>> + * Copyright (C) 2009 Wind River Systems, Inc.
>> + *   Updated for supporting PPC405EX on Kilauea.
>> + *   Tiejun Chen <tiejun.chen@windriver.com>
>> + *
>>  * This program is free software; you can redistribute it and/or
>>  * modify it under the terms of the GNU General Public License
>>  * as published by the Free Software Foundation; either version
>> @@ -659,3 +663,141 @@ void ibm405ep_fixup_clocks(unsigned int sys_clk)
>> 	dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
>> 	dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
>> }
>> +
>> +static u8 fwdv_multi_bits[] = {
>> +	/* values for:  1 - 16 */
>> +	0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05,
>> +	0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03
>> +};
>> +
>> +u32 get_fwdva(unsigned long cpr_fwdv)
>> +{
>> +	u32 index;
>> +
>> +	for (index = 0; index < ARRAY_SIZE(fwdv_multi_bits); index++)
>> +		if (cpr_fwdv == (u32)fwdv_multi_bits[index])
>> +			return index + 1;
>> +
>> +	return 0;
>> +}
>> +
>> +static u8 fbdv_multi_bits[] = {
>> +	/* values for:  1 - 100 */
>> +	0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4,
>> +	0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb,
>> +	0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96,
>> +	0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde,
>> +	0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb,
>> +	0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91,
>> +	0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b,
>> +	0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95,
>> +	0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4,
>> +	0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc,
>> +	/* values for:  101 - 200 */
>> +	0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
>> +	0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
>> +	0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
>> +	0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
>> +	0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
>> +	0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,
>> +	0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6,
>> +	0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9,
>> +	0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e,
>> +	0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf,
>> +	/* values for:  201 - 255 */
>> +	0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae,
>> +	0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2,
>> +	0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2,
>> +	0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98,
>> +	0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81,
>> +	0x03, 0x87, 0x0f, 0x9f, 0x3f  /* END */
>> +};
>> +
>> +u32 get_fbdv(unsigned long cpr_fbdv)
>> +{
>> +	u32 index;
>> +
>> +	for (index = 0; index < ARRAY_SIZE(fbdv_multi_bits); index++)
>> +		if (cpr_fbdv == (u32)fbdv_multi_bits[index])
>> +			return index + 1;
>> +
>> +	return 0;
>> +}
> 
> Is this generic?  Can we the function and value arrays to get the fbdv for
> all 4xx boards and have the right values pop out?  If not, then all of these
> need to be prefixed with ibm405ex_.
> 

Other 4xx boards have different fwdv_multi_bits[]/fbdv_multi_bits[] array as far
as I know. So I prefer to prefix with ibm405ex as you suggestion.

>> diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
>> index 95b9f53..ba41624 100644
>> --- a/arch/powerpc/boot/dcr.h
>> +++ b/arch/powerpc/boot/dcr.h
>> @@ -153,6 +153,18 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
>> #define DCRN_CPC0_PLLMR1  0xf4
>> #define DCRN_CPC0_UCR     0xf5
>>
>> +/* 405EX Clocking Control regs */
>> +#define CPR0_CLKUPD     0x0020
>> +#define CPR0_PLLC       0x0040
>> +#define CPR0_PLLD       0x0060
>> +#define CPR0_CPUD       0x0080
>> +#define CPR0_PLBD       0x00a0
>> +#define CPR0_OPBD       0x00c0
>> +#define CPR0_PERD       0x00e0
>> +#define CPR0_AHBD       0x0100
>> +#define CPR0_ICFG       0x0140
> 
> You duplicated the #defines right below this.  Just change the comment for
> the already existing defines to say "440GX/405EX Clock Control regs".

I want to isolate 405EX with other 4xx for convenient maintaining code as my
original. And although there are same offset as the register of 440GX, they are
defined with different name on manual because of different design mechanism. So
I hope we cannot be confused these when others track the codes.

But this is not problem. I can merge them if you really feel bad :)

  You
> don't need to add CPR0_ICFG either, since you don't use it anywhere.
> 

Ok.

After your reply I will send v2 so thanks your help in advance.

Best Regards
Tiejun

> josh
> 

Re: [PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[Stefan Roese]

On Friday 21 August 2009 07:41:42 tiejun.chen wrote:
> >> +static void kilauea_fixups(void)
> >> +{
> >> +	/*TODO: Please change this as the real. Note that should be
> >> 33MHZ~100MHZ.*/
> >
> > What does that mean?
>
> It's difficult to check the sysclk value on all revision Kilauea board for
> me, and we have to check this value only by the real target, not by reading
> one register. So I hope it's safe to remind other guys here.

Kilauea uses this value (33.333MHz) on all board revisions, AFAIK. Your 
comment is a bit confusing. I suggest that you just remove it.

Cheers,
Stefan

Re: [PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[tiejun.chen]

Stefan Roese wrote:
> On Friday 21 August 2009 07:41:42 tiejun.chen wrote:
>>>> +static void kilauea_fixups(void)
>>>> +{
>>>> +	/*TODO: Please change this as the real. Note that should be
>>>> 33MHZ~100MHZ.*/
>>> What does that mean?
>> It's difficult to check the sysclk value on all revision Kilauea board for
>> me, and we have to check this value only by the real target, not by reading
>> one register. So I hope it's safe to remind other guys here.
> 
> Kilauea uses this value (33.333MHz) on all board revisions, AFAIK. Your 
> comment is a bit confusing. I suggest that you just remove it.
> 

I appreciate your help.

Best Regards
Tiejun

> Cheers,
> Stefan
> 

Re: [PATCH 1/2] powerpc/405ex: provide necessary fixup function to support cuImage

[Josh Boyer]

On Fri, Aug 21, 2009 at 02:00:20PM +0800, tiejun.chen wrote:
>as I know. So I prefer to prefix with ibm405ex as you suggestion.
>
>>> diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
>>> index 95b9f53..ba41624 100644
>>> --- a/arch/powerpc/boot/dcr.h
>>> +++ b/arch/powerpc/boot/dcr.h
>>> @@ -153,6 +153,18 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
>>> #define DCRN_CPC0_PLLMR1  0xf4
>>> #define DCRN_CPC0_UCR     0xf5
>>>
>>> +/* 405EX Clocking Control regs */
>>> +#define CPR0_CLKUPD     0x0020
>>> +#define CPR0_PLLC       0x0040
>>> +#define CPR0_PLLD       0x0060
>>> +#define CPR0_CPUD       0x0080
>>> +#define CPR0_PLBD       0x00a0
>>> +#define CPR0_OPBD       0x00c0
>>> +#define CPR0_PERD       0x00e0
>>> +#define CPR0_AHBD       0x0100
>>> +#define CPR0_ICFG       0x0140
>> 
>> You duplicated the #defines right below this.  Just change the comment for
>> the already existing defines to say "440GX/405EX Clock Control regs".
>
>I want to isolate 405EX with other 4xx for convenient maintaining code as my
>original. And although there are same offset as the register of 440GX, they are
>defined with different name on manual because of different design mechanism. So
>I hope we cannot be confused these when others track the codes.

That would make sense if #defines were something that really needed a lot of
maintenance, but they aren't.  They are essentially static once correct.  I'd
prefer not to grow another set of duplicate #defines.

Thanks.

josh

Re: [PATCH 2/2] powerpc/405ex: support cuImage via included dtb

[Josh Boyer]

On Fri, Aug 21, 2009 at 01:41:42PM +0800, tiejun.chen wrote:
>Josh Boyer wrote:
>> On Tue, Aug 18, 2009 at 10:28:04AM +0800, Tiejun Chen wrote:
>>> To support cuImage, we need to initialize the required sections and 
>>> ensure that it is built.
>>>
>>> -		cuboot-acadia.c cuboot-amigaone.c
>>> +		cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
>>> src-boot := $(src-wlib) $(src-plat) empty.c
>>>
>>> src-boot := $(addprefix $(obj)/, $(src-boot))
>>> @@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
>>> image-$(CONFIG_EP405)			+= dtbImage.ep405
>>> image-$(CONFIG_WALNUT)			+= treeImage.walnut
>>> image-$(CONFIG_ACADIA)			+= cuImage.acadia
>>> +image-$(CONFIG_KILAUEA)		+= cuImage.kilauea
>> 
>> I'm not thrilled with this part as cuImage is really the secondary
>> solution if the U-Boot that comes with a board if FDT aware.  If you
>> have a different board that needs this, perhaps you could add the
>> target when that board support gets upstream?
>> 
>
>Agreed and I will remove this line as you expect. Right?

Yep, that sounds right.

josh