* [U-Boot] [PATCH 0/6] Add support for PDM360NG board
@ 2010-02-23 22:37 Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Anatolij Gustschin
0 siblings, 1 reply; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
This patch series intend to support MPC5121e based
PDM360NG board. Patches preceding the actual board
support patch 6 prepare needed infrastructure for
the PDM360NG board.
Anatolij Gustschin (6):
mpc512x: make MEM IO Control configuration a board config option
mpc512x: add multi serial PSC support
mpc5121: add PSC serial communication routines
fsl_diu_fb.c: add support for RLE8 bitmaps
fdt_support: add partitions fixup in mtd node
mpc5121: add support for PDM360NG board
MAKEALL | 1 +
Makefile | 3 +
board/freescale/common/fsl_diu_fb.c | 107 ++++++-
board/pdm360ng/Makefile | 51 +++
board/pdm360ng/config.mk | 24 ++
board/pdm360ng/pdm360ng.c | 618 +++++++++++++++++++++++++++++++++++
common/cmd_mtdparts.c | 2 +-
common/fdt_support.c | 214 ++++++++++++
common/serial.c | 23 ++
cpu/mpc512x/diu.c | 14 +-
cpu/mpc512x/fixed_sdram.c | 2 +-
cpu/mpc512x/serial.c | 353 ++++++++++++++++++--
include/asm-ppc/immap_512x.h | 112 +++----
include/configs/aria.h | 2 +
include/configs/mecp5123.h | 2 +
include/configs/mpc5121ads.h | 2 +
include/configs/pdm360ng.h | 525 +++++++++++++++++++++++++++++
include/fdt_support.h | 2 +
include/jffs2/load_kernel.h | 1 +
include/mtd_node.h | 11 +
include/post.h | 1 +
include/serial.h | 15 +
post/tests.c | 4 +
23 files changed, 1996 insertions(+), 93 deletions(-)
create mode 100644 board/pdm360ng/Makefile
create mode 100644 board/pdm360ng/config.mk
create mode 100644 board/pdm360ng/pdm360ng.c
create mode 100644 include/configs/pdm360ng.h
create mode 100644 include/mtd_node.h
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option
2010-02-23 22:37 [U-Boot] [PATCH 0/6] Add support for PDM360NG board Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Anatolij Gustschin
2010-03-21 10:25 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Wolfgang Denk
0 siblings, 2 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
cpu/mpc512x/fixed_sdram.c | 2 +-
include/asm-ppc/immap_512x.h | 4 ----
include/configs/aria.h | 2 ++
include/configs/mecp5123.h | 2 ++
include/configs/mpc5121ads.h | 2 ++
5 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/cpu/mpc512x/fixed_sdram.c b/cpu/mpc512x/fixed_sdram.c
index 442b5fc..72d524c 100644
--- a/cpu/mpc512x/fixed_sdram.c
+++ b/cpu/mpc512x/fixed_sdram.c
@@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
}
/* Initialize IO Control */
- out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
+ out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR);
/* Initialize DDR Local Window */
out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 95350fd..1dc47e5 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -848,10 +848,6 @@ typedef struct ioctrl512x {
u8 reserved[0x0cfc]; /* fill to 4096 bytes size */
} ioctrl512x_t;
-/* Indexes in regs array */
-/* Set for DDR */
-#define IOCTRL_MUX_DDR 0x00000036
-
/* IO pin fields */
#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */
#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */
diff --git a/include/configs/aria.h b/include/configs/aria.h
index f89fc57..a73c0c7 100644
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -79,6 +79,8 @@
#define CONFIG_SYS_DDR_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036
+
/* DDR Controller Configuration
*
* SYS_CFG:
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index cccc31d..cafd6a7 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -67,6 +67,8 @@
#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036
+
/* DDR Controller Configuration
*
* SYS_CFG:
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index fb49388..8ecc9e1 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -86,6 +86,8 @@
#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036
+
/* DDR Controller Configuration
*
* SYS_CFG:
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support
2010-02-23 22:37 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Anatolij Gustschin
2010-03-21 10:25 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Wolfgang Denk
2010-03-21 10:25 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Wolfgang Denk
1 sibling, 2 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
Extend mpc512x serial driver to support multiple PSCs ports.
Supsequent patches for PDM360NG board support make use of this
functionality by defining CONFIG_SERIAL_MULTI in the board config
file. Additionally the used PSC devices are specified by defining
e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.
Support for PSC devices other than 1, 3, 4 and 6 is not added
by this patch because these aren't used currently. In the future
it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
Additionally you have to add code for registering added
devices in serial_initialise() in common/serial.c.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
common/serial.c | 23 ++++
cpu/mpc512x/serial.c | 266 +++++++++++++++++++++++++++++++++++++-----
include/asm-ppc/immap_512x.h | 108 +++++++++---------
include/serial.h | 8 ++
4 files changed, 324 insertions(+), 81 deletions(-)
diff --git a/common/serial.c b/common/serial.c
index 5f9ffd7..754e329 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -59,6 +59,14 @@ struct serial_device *__default_serial_console (void)
#else
return &serial0_device;
#endif
+#elif defined(CONFIG_MPC512X)
+#if (CONFIG_PSC_CONSOLE == 3)
+ return &serial3_device;
+#elif (CONFIG_PSC_CONSOLE == 6)
+ return &serial6_device;
+#else
+#error "Bad CONFIG_PSC_CONSOLE."
+#endif
#elif defined(CONFIG_S3C2410)
#if defined(CONFIG_SERIAL1)
return &s3c24xx_serial0_device;
@@ -159,6 +167,20 @@ void serial_initialize (void)
serial_register(&s5pc1xx_serial2_device);
serial_register(&s5pc1xx_serial3_device);
#endif
+#if defined(CONFIG_MPC512X)
+#if defined(CONFIG_SYS_PSC1)
+ serial_register(&serial1_device);
+#endif
+#if defined(CONFIG_SYS_PSC3)
+ serial_register(&serial3_device);
+#endif
+#if defined(CONFIG_SYS_PSC4)
+ serial_register(&serial4_device);
+#endif
+#if defined(CONFIG_SYS_PSC6)
+ serial_register(&serial6_device);
+#endif
+#endif
serial_assign (default_serial_console ()->name);
}
@@ -174,6 +196,7 @@ void serial_stdio_init (void)
dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT;
dev.start = s->init;
+ dev.stop = s->uninit;
dev.putc = s->putc;
dev.puts = s->puts;
dev.getc = s->getc;
diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c
index ec2f41b..f421968 100644
--- a/cpu/mpc512x/serial.c
+++ b/cpu/mpc512x/serial.c
@@ -32,14 +32,16 @@
#include <common.h>
#include <asm/io.h>
#include <asm/processor.h>
+#include <serial.h>
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_PSC_CONSOLE)
+#if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI)
static void fifo_init (volatile psc512x_t *psc)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+ u32 tfsize, rfsize;
/* reset Rx & Tx fifo slice */
out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
@@ -49,8 +51,65 @@ static void fifo_init (volatile psc512x_t *psc)
out_be32(&psc->rfintmask, 0);
out_be32(&psc->tfintmask, 0);
- out_be32(&psc->tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16));
- out_be32(&psc->rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16));
+#if defined(CONFIG_SERIAL_MULTI)
+ switch (((u32)psc & 0xf00) >> 8) {
+ case 0:
+ tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
+ rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
+ break;
+ case 1:
+ tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
+ rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
+ break;
+ case 2:
+ tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
+ rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
+ break;
+ case 3:
+ tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
+ rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
+ break;
+ case 4:
+ tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
+ rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
+ break;
+ case 5:
+ tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
+ rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
+ break;
+ case 6:
+ tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
+ rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
+ break;
+ case 7:
+ tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
+ rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
+ break;
+ case 8:
+ tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
+ rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
+ break;
+ case 9:
+ tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
+ rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
+ break;
+ case 10:
+ tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
+ rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
+ break;
+ case 11:
+ tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
+ rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
+ break;
+ default:
+ return;
+ }
+#else
+ tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
+ rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
+#endif
+ out_be32(&psc->tfsize, tfsize);
+ out_be32(&psc->rfsize, rfsize);
/* enable Tx & Rx FIFO slice */
out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
@@ -60,24 +119,47 @@ static void fifo_init (volatile psc512x_t *psc)
__asm__ volatile ("sync");
}
-void serial_setbrg(void)
+void serial_setbrg_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
unsigned long baseclk, div;
+ unsigned long baudrate;
+ char buf[16];
+ char *br_env;
+
+ baudrate = gd->baudrate;
+ if (idx != CONFIG_PSC_CONSOLE) {
+ /* Allows setting baudrate for other serial devices
+ * on PSCx using environment. If not specified, use
+ * the same baudrate as for console.
+ */
+ sprintf(buf, "psc%d_baudrate", idx);
+ br_env = getenv(buf);
+ if (br_env)
+ baudrate = simple_strtoul(br_env, NULL, 10);
+
+ debug("%s: idx %d, baudrate %d\n", __func__, idx, baudrate);
+ }
- /* calculate dividor for setting PSC CTUR and CTLR registers */
+ /* calculate divisor for setting PSC CTUR and CTLR registers */
baseclk = (gd->ips_clk + 8) / 16;
- div = (baseclk + (gd->baudrate / 2)) / gd->baudrate;
+ div = (baseclk + (baudrate / 2)) / baudrate;
out_8(&psc->ctur, (div >> 8) & 0xff);
out_8(&psc->ctlr, div & 0xff); /* set baudrate */
}
-int serial_init(void)
+int serial_init_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+#if defined(CONFIG_SERIAL_MULTI)
+ u32 reg;
+
+ reg = in_be32(&im->clk.sccr[0]);
+ out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
+#endif
fifo_init (psc);
@@ -100,7 +182,7 @@ int serial_init(void)
out_8(&psc->mode, PSC_MODE_1_STOPBIT);
/* set baudrate */
- serial_setbrg();
+ serial_setbrg_dev(idx);
/* disable all interrupts */
out_be16(&psc->psc_imr, 0);
@@ -113,13 +195,27 @@ int serial_init(void)
return 0;
}
-void serial_putc (const char c)
+int serial_uninit_dev(unsigned int idx)
+{
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+ u32 reg;
+
+ out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
+ reg = in_be32(&im->clk.sccr[0]);
+ reg &= ~CLOCK_SCCR1_PSC_EN(idx);
+ out_be32(&im->clk.sccr[0], reg);
+
+ return 0;
+}
+
+void serial_putc_dev(unsigned int idx, const char c)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
if (c == '\n')
- serial_putc ('\r');
+ serial_putc_dev(idx, '\r');
/* Wait for last character to go. */
while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
@@ -128,10 +224,10 @@ void serial_putc (const char c)
out_8(&psc->tfdata_8, c);
}
-void serial_putc_raw (const char c)
+void serial_putc_raw_dev(unsigned int idx, const char c)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
/* Wait for last character to go. */
while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
@@ -140,18 +236,16 @@ void serial_putc_raw (const char c)
out_8(&psc->tfdata_8, c);
}
-
-void serial_puts (const char *s)
+void serial_puts_dev(unsigned int idx, const char *s)
{
- while (*s) {
- serial_putc (*s++);
- }
+ while (*s)
+ serial_putc_dev(idx, *s++);
}
-int serial_getc (void)
+int serial_getc_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
/* Wait for a character to arrive. */
while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
@@ -160,18 +254,18 @@ int serial_getc (void)
return in_8(&psc->rfdata_8);
}
-int serial_tstc (void)
+int serial_tstc_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
}
-void serial_setrts(int s)
+void serial_setrts_dev(unsigned int idx, int s)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
if (s) {
/* Assert RTS (become LOW) */
@@ -183,11 +277,127 @@ void serial_setrts(int s)
}
}
-int serial_getcts(void)
+int serial_getcts_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
return (in_8(&psc->ip) & 0x1) ? 0 : 1;
}
+#endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */
+
+#if defined(CONFIG_SERIAL_MULTI)
+
+#define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
+ int serial##port##_init(void) \
+ { \
+ return serial_init_dev(port); \
+ } \
+ int serial##port##_uninit(void) \
+ { \
+ return serial_uninit_dev(port); \
+ } \
+ void serial##port##_setbrg(void) \
+ { \
+ serial_setbrg_dev(port); \
+ } \
+ int serial##port##_getc(void) \
+ { \
+ return serial_getc_dev(port); \
+ } \
+ int serial##port##_tstc(void) \
+ { \
+ return serial_tstc_dev(port); \
+ } \
+ void serial##port##_putc(const char c) \
+ { \
+ serial_putc_dev(port, c); \
+ } \
+ void serial##port##_puts(const char *s) \
+ { \
+ serial_puts_dev(port, s); \
+ }
+
+#define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \
+ name, \
+ bus, \
+ serial##port##_init, \
+ serial##port##_uninit, \
+ serial##port##_setbrg, \
+ serial##port##_getc, \
+ serial##port##_tstc, \
+ serial##port##_putc, \
+ serial##port##_puts, \
+}
+
+#if defined(CONFIG_SYS_PSC1)
+DECLARE_PSC_SERIAL_FUNCTIONS(1);
+struct serial_device serial1_device =
+INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1");
+#endif
+
+#if defined(CONFIG_SYS_PSC3)
+DECLARE_PSC_SERIAL_FUNCTIONS(3);
+struct serial_device serial3_device =
+INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3");
+#endif
+
+#if defined(CONFIG_SYS_PSC4)
+DECLARE_PSC_SERIAL_FUNCTIONS(4);
+struct serial_device serial4_device =
+INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4");
+#endif
+
+#if defined(CONFIG_SYS_PSC6)
+DECLARE_PSC_SERIAL_FUNCTIONS(6);
+struct serial_device serial6_device =
+INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6");
+#endif
+
+#else
+
+void serial_setbrg(void)
+{
+ serial_setbrg_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_init(void)
+{
+ return serial_init_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_putc(const char c)
+{
+ serial_putc_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_putc_raw(const char c)
+{
+ serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_puts(const char *s)
+{
+ serial_puts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getc(void)
+{
+ return serial_getc_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_tstc(void)
+{
+ return serial_tstc_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_setrts(int s)
+{
+ return serial_setrts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getcts(void)
+{
+ return serial_getcts_dev(CONFIG_PSC_CONSOLE);
+}
#endif /* CONFIG_PSC_CONSOLE */
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 1dc47e5..c430cb6 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -1112,66 +1112,68 @@ typedef struct fifoc512x {
*
* Overall size of FIFOC memory is not documented in the MPC5121e RM, but
* tests indicate that it is 1024 words total.
+ *
+ * *_TX_SIZE and *_RX_SIZE is the number of 4-byte words for FIFO slice.
*/
-#define FIFOC_PSC0_TX_SIZE 0x0 /* number of 4-byte words for FIFO slice */
+#define FIFOC_PSC0_TX_SIZE 0x04
#define FIFOC_PSC0_TX_ADDR 0x0
-#define FIFOC_PSC0_RX_SIZE 0x0
-#define FIFOC_PSC0_RX_ADDR 0x0
+#define FIFOC_PSC0_RX_SIZE 0x04
+#define FIFOC_PSC0_RX_ADDR 0x10
-#define FIFOC_PSC1_TX_SIZE 0x0
-#define FIFOC_PSC1_TX_ADDR 0x0
-#define FIFOC_PSC1_RX_SIZE 0x0
-#define FIFOC_PSC1_RX_ADDR 0x0
+#define FIFOC_PSC1_TX_SIZE 0x04
+#define FIFOC_PSC1_TX_ADDR 0x20
+#define FIFOC_PSC1_RX_SIZE 0x04
+#define FIFOC_PSC1_RX_ADDR 0x30
-#define FIFOC_PSC2_TX_SIZE 0x0
-#define FIFOC_PSC2_TX_ADDR 0x0
-#define FIFOC_PSC2_RX_SIZE 0x0
-#define FIFOC_PSC2_RX_ADDR 0x0
+#define FIFOC_PSC2_TX_SIZE 0x04
+#define FIFOC_PSC2_TX_ADDR 0x40
+#define FIFOC_PSC2_RX_SIZE 0x04
+#define FIFOC_PSC2_RX_ADDR 0x50
#define FIFOC_PSC3_TX_SIZE 0x04
-#define FIFOC_PSC3_TX_ADDR 0x0
+#define FIFOC_PSC3_TX_ADDR 0x60
#define FIFOC_PSC3_RX_SIZE 0x04
-#define FIFOC_PSC3_RX_ADDR 0x10
-
-#define FIFOC_PSC4_TX_SIZE 0x0
-#define FIFOC_PSC4_TX_ADDR 0x0
-#define FIFOC_PSC4_RX_SIZE 0x0
-#define FIFOC_PSC4_RX_ADDR 0x0
-
-#define FIFOC_PSC5_TX_SIZE 0x0
-#define FIFOC_PSC5_TX_ADDR 0x0
-#define FIFOC_PSC5_RX_SIZE 0x0
-#define FIFOC_PSC5_RX_ADDR 0x0
-
-#define FIFOC_PSC6_TX_SIZE 0x0
-#define FIFOC_PSC6_TX_ADDR 0x0
-#define FIFOC_PSC6_RX_SIZE 0x0
-#define FIFOC_PSC6_RX_ADDR 0x0
-
-#define FIFOC_PSC7_TX_SIZE 0x0
-#define FIFOC_PSC7_TX_ADDR 0x0
-#define FIFOC_PSC7_RX_SIZE 0x0
-#define FIFOC_PSC7_RX_ADDR 0x0
-
-#define FIFOC_PSC8_TX_SIZE 0x0
-#define FIFOC_PSC8_TX_ADDR 0x0
-#define FIFOC_PSC8_RX_SIZE 0x0
-#define FIFOC_PSC8_RX_ADDR 0x0
-
-#define FIFOC_PSC9_TX_SIZE 0x0
-#define FIFOC_PSC9_TX_ADDR 0x0
-#define FIFOC_PSC9_RX_SIZE 0x0
-#define FIFOC_PSC9_RX_ADDR 0x0
-
-#define FIFOC_PSC10_TX_SIZE 0x0
-#define FIFOC_PSC10_TX_ADDR 0x0
-#define FIFOC_PSC10_RX_SIZE 0x0
-#define FIFOC_PSC10_RX_ADDR 0x0
-
-#define FIFOC_PSC11_TX_SIZE 0x0
-#define FIFOC_PSC11_TX_ADDR 0x0
-#define FIFOC_PSC11_RX_SIZE 0x0
-#define FIFOC_PSC11_RX_ADDR 0x0
+#define FIFOC_PSC3_RX_ADDR 0x70
+
+#define FIFOC_PSC4_TX_SIZE 0x04
+#define FIFOC_PSC4_TX_ADDR 0x80
+#define FIFOC_PSC4_RX_SIZE 0x04
+#define FIFOC_PSC4_RX_ADDR 0x90
+
+#define FIFOC_PSC5_TX_SIZE 0x04
+#define FIFOC_PSC5_TX_ADDR 0xa0
+#define FIFOC_PSC5_RX_SIZE 0x04
+#define FIFOC_PSC5_RX_ADDR 0xb0
+
+#define FIFOC_PSC6_TX_SIZE 0x04
+#define FIFOC_PSC6_TX_ADDR 0xc0
+#define FIFOC_PSC6_RX_SIZE 0x04
+#define FIFOC_PSC6_RX_ADDR 0xd0
+
+#define FIFOC_PSC7_TX_SIZE 0x04
+#define FIFOC_PSC7_TX_ADDR 0xe0
+#define FIFOC_PSC7_RX_SIZE 0x04
+#define FIFOC_PSC7_RX_ADDR 0xf0
+
+#define FIFOC_PSC8_TX_SIZE 0x04
+#define FIFOC_PSC8_TX_ADDR 0x100
+#define FIFOC_PSC8_RX_SIZE 0x04
+#define FIFOC_PSC8_RX_ADDR 0x110
+
+#define FIFOC_PSC9_TX_SIZE 0x04
+#define FIFOC_PSC9_TX_ADDR 0x120
+#define FIFOC_PSC9_RX_SIZE 0x04
+#define FIFOC_PSC9_RX_ADDR 0x130
+
+#define FIFOC_PSC10_TX_SIZE 0x04
+#define FIFOC_PSC10_TX_ADDR 0x140
+#define FIFOC_PSC10_RX_SIZE 0x04
+#define FIFOC_PSC10_RX_ADDR 0x150
+
+#define FIFOC_PSC11_TX_SIZE 0x04
+#define FIFOC_PSC11_TX_ADDR 0x160
+#define FIFOC_PSC11_RX_SIZE 0x04
+#define FIFOC_PSC11_RX_ADDR 0x170
/*
* SATA
diff --git a/include/serial.h b/include/serial.h
index f2638ec..3f3edbc 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -9,6 +9,7 @@ struct serial_device {
char ctlr[CTLRSIZE];
int (*init) (void);
+ int (*uninit) (void);
void (*setbrg) (void);
int (*getc) (void);
int (*tstc) (void);
@@ -37,6 +38,13 @@ extern struct serial_device eserial4_device;
#endif
+#if defined(CONFIG_MPC512X)
+extern struct serial_device serial1_device;
+extern struct serial_device serial3_device;
+extern struct serial_device serial4_device;
+extern struct serial_device serial6_device;
+#endif
+
#if defined(CONFIG_S3C2410)
extern struct serial_device s3c24xx_serial0_device;
extern struct serial_device s3c24xx_serial1_device;
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines
2010-02-23 22:37 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
2010-03-21 10:26 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Wolfgang Denk
2010-03-21 10:25 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Wolfgang Denk
1 sibling, 2 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
cpu/mpc512x/serial.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++
include/serial.h | 7 ++++
2 files changed, 94 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c
index f421968..cb5bbf0 100644
--- a/cpu/mpc512x/serial.c
+++ b/cpu/mpc512x/serial.c
@@ -401,3 +401,90 @@ int serial_getcts(void)
return serial_getcts_dev(CONFIG_PSC_CONSOLE);
}
#endif /* CONFIG_PSC_CONSOLE */
+
+#if defined(CONFIG_SERIAL_MULTI)
+#include <stdio_dev.h>
+/*
+ * Routines for communication with serial devices over PSC
+ */
+/* Bitfield for initialized PSCs */
+static unsigned int initialized;
+
+struct stdio_dev *open_port(int num, int baudrate)
+{
+ struct stdio_dev *port;
+ char env_var[16];
+ char env_val[10];
+ char name[7];
+
+ if (num < 0 || num > 11)
+ return NULL;
+
+ sprintf(name, "psc%d", num);
+ port = stdio_get_by_name(name);
+ if (!port)
+ return NULL;
+
+ if (!test_bit(num, &initialized)) {
+ sprintf(env_var, "psc%d_baudrate", num);
+ sprintf(env_val, "%d", baudrate);
+ setenv(env_var, env_val);
+
+ if (port->start())
+ return NULL;
+
+ set_bit(num, &initialized);
+ }
+
+ return port;
+}
+
+int close_port(int num)
+{
+ struct stdio_dev *port;
+ int ret;
+ char name[7];
+
+ if (num < 0 || num > 11)
+ return -1;
+
+ sprintf(name, "psc%d", num);
+ port = stdio_get_by_name(name);
+ if (!port)
+ return -1;
+
+ ret = port->stop();
+ clear_bit(num, &initialized);
+
+ return ret;
+}
+
+int write_port(struct stdio_dev *port, char *buf)
+{
+ if (!port || !buf)
+ return -1;
+
+ port->puts(buf);
+
+ return 0;
+}
+
+int read_port(struct stdio_dev *port, char *buf, int size)
+{
+ int cnt = 0;
+
+ if (!port || !buf)
+ return -1;
+
+ if (!size)
+ return 0;
+
+ while (port->tstc()) {
+ buf[cnt++] = port->getc();
+ if (cnt > size)
+ break;
+ }
+
+ return cnt;
+}
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/include/serial.h b/include/serial.h
index 3f3edbc..6423fba 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -92,4 +92,11 @@ extern int usbtty_tstc(void);
#endif /* CONFIG_USB_TTY */
+#if defined(CONFIG_MPC512X) && defined(CONFIG_SERIAL_MULTI)
+extern struct stdio_dev *open_port(int num, int baudrate);
+extern int close_port(int num);
+extern int write_port(struct stdio_dev *port, char *buf);
+extern int read_port(struct stdio_dev *port, char *buf, int size);
+#endif
+
#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps
2010-02-23 22:37 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
` (2 more replies)
2010-03-21 10:26 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Wolfgang Denk
1 sibling, 3 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
Allow displaying run length encoded bitmaps.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
board/freescale/common/fsl_diu_fb.c | 78 +++++++++++++++++++++++++++++++++++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index 2fc878b..d7c55b5 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -26,6 +26,7 @@
#include <common.h>
#include <i2c.h>
#include <malloc.h>
+#include <bmp_layout.h>
#include "fsl_diu_fb.h"
@@ -464,6 +465,78 @@ static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
return 0;
}
+int display_rle8_bitmap(unsigned char *bmp, unsigned int *palette,
+ int yoff, int xoff)
+{
+ struct fb_info *info = &fsl_fb_info;
+ bmp_header_t *im = (bmp_header_t *)bmp;
+ unsigned char *bm;
+ unsigned int *fbp;
+ unsigned int cnt;
+ int decode = 1;
+ int x, y, bpp, i;
+
+ x = 0;
+ y = __le32_to_cpu(im->height) - 1;
+ bpp = info->var.bits_per_pixel / 8;
+ fbp = (unsigned int *) ((unsigned int)info->screen_base +
+ (((y + yoff) * info->var.xres) + xoff) * bpp);
+ bm = bmp + __le32_to_cpu(im->data_offset);
+
+ while (decode) {
+ switch (bm[0]) {
+ case 0:
+ switch (bm[1]) {
+ case 0:
+ /* scan line end marker */
+ bm += 2;
+ x = 0;
+ y--;
+ fbp = (unsigned int *)
+ ((unsigned int)info->screen_base +
+ (((y + yoff) * info->var.xres) +
+ xoff) * bpp);
+ continue;
+ case 1:
+ /* end of bitmap data marker */
+ decode = 0;
+ break;
+ case 2:
+ /* run offset marker */
+ x += bm[2];
+ y -= bm[3];
+ fbp = (unsigned int *)
+ ((unsigned int)info->screen_base +
+ (((y + yoff) * info->var.xres) +
+ x + xoff) * bpp);
+ bm += 4;
+ break;
+ default:
+ /* unencoded run */
+ cnt = bm[1];
+ bm += 2;
+ for (i = 0; i < cnt; i++) {
+ *fbp++ = palette[bm[0]];
+ bm++;
+ x++;
+ }
+ if (cnt & 1)
+ bm++;
+ }
+ break;
+ default:
+ /* encoded run */
+ for (i = 0; i < bm[0]; i++) {
+ *fbp++ = palette[bm[1]];
+ x++;
+ }
+ bm += 2;
+ break;
+ }
+ }
+ return __le32_to_cpu(im->height);
+}
+
int fsl_diu_display_bmp(unsigned char *bmp,
int xoffset,
int yoffset,
@@ -544,6 +617,11 @@ int fsl_diu_display_bmp(unsigned char *bmp,
}
break;
case 8:
+ if (bmp[30] == BMP_BI_RLE8) {
+ return display_rle8_bitmap(bmp, palette, yoffset,
+ xoffset);
+ }
+
for (y = height - 1; y >= 0; y--) {
fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
for (x = 0; x < width; x++) {
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board Anatolij Gustschin
2010-03-21 10:33 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Wolfgang Denk
2010-02-23 22:49 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Wolfgang Denk
2010-03-21 10:31 ` Wolfgang Denk
2 siblings, 2 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
Allow overriding defined partitions in the device tree blob
using partition info defined in the 'mtdparts' environment
variable.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
---
common/cmd_mtdparts.c | 2 +-
common/fdt_support.c | 214 +++++++++++++++++++++++++++++++++++++++++++
include/fdt_support.h | 2 +
include/jffs2/load_kernel.h | 1 +
include/mtd_node.h | 11 ++
5 files changed, 229 insertions(+), 1 deletions(-)
create mode 100644 include/mtd_node.h
diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index b375fea..80c548b 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -776,7 +776,7 @@ static int device_del(struct mtd_device *dev)
* @param num device number
* @return NULL if requested device does not exist
*/
-static struct mtd_device* device_find(u8 type, u8 num)
+struct mtd_device *device_find(u8 type, u8 num)
{
struct list_head *entry;
struct mtd_device *dev_tmp;
diff --git a/common/fdt_support.c b/common/fdt_support.c
index f89a3ee..b6abf38 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -757,3 +757,217 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)
return -1;
}
#endif
+
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+struct reg_cell {
+ unsigned int r0;
+ unsigned int r1;
+};
+
+int fdt_del_subnodes(const void *blob, int parent_offset)
+{
+ int off, ndepth;
+ int ret;
+
+ for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth);
+ (off >= 0) && (ndepth > 0);
+ off = fdt_next_node(blob, off, &ndepth)) {
+ if (ndepth == 1) {
+ debug("delete %s: offset: %x\n",
+ fdt_get_name(blob, off, 0), off);
+ ret = fdt_del_node((void *)blob, off);
+ if (ret < 0) {
+ printf("Can't delete node: %s\n",
+ fdt_strerror(ret));
+ return ret;
+ } else {
+ ndepth = 0;
+ off = parent_offset;
+ }
+ }
+ }
+ return 0;
+}
+
+int fdt_increase_size(void *fdt, int add_len)
+{
+ int newlen;
+
+ newlen = fdt_totalsize(fdt) + add_len;
+
+ /* Open in place with a new len */
+ return fdt_open_into(fdt, fdt, newlen);
+}
+
+int fdt_del_partitions(void *blob, int parent_offset)
+{
+ const void *prop;
+ int ndepth = 0;
+ int off;
+ int ret;
+
+ off = fdt_next_node(blob, parent_offset, &ndepth);
+ if (off > 0 && ndepth == 1) {
+ prop = fdt_getprop(blob, off, "label", NULL);
+ if (prop == NULL) {
+ /*
+ * Could not find label property, nand {}; node?
+ * Check subnode, delete partitions there if any.
+ */
+ return fdt_del_partitions(blob, off);
+ } else {
+ ret = fdt_del_subnodes(blob, parent_offset);
+ if (ret < 0) {
+ printf("Can't remove subnodes: %s\n",
+ fdt_strerror(ret));
+ return ret;
+ }
+ }
+ }
+ return 0;
+}
+
+int fdt_node_set_part_info(void *blob, int parent_offset,
+ struct mtd_device *dev)
+{
+ struct list_head *pentry;
+ struct part_info *part;
+ struct reg_cell cell;
+ int off, ndepth = 0;
+ int part_num, ret;
+ char buf[64];
+
+ ret = fdt_del_partitions(blob, parent_offset);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Check if it is nand {}; subnode, adjust
+ * the offset in this case
+ */
+ off = fdt_next_node(blob, parent_offset, &ndepth);
+ if (off > 0 && ndepth == 1)
+ parent_offset = off;
+
+ part_num = 0;
+ list_for_each_prev(pentry, &dev->parts) {
+ int newoff;
+
+ part = list_entry(pentry, struct part_info, link);
+
+ debug("%2d: %-20s0x%08x\t0x%08x\t%d\n",
+ part_num, part->name, part->size,
+ part->offset, part->mask_flags);
+
+ sprintf(buf, "partition@%x", part->offset);
+add_sub:
+ ret = fdt_add_subnode(blob, parent_offset, buf);
+ if (ret == -FDT_ERR_NOSPACE) {
+ ret = fdt_increase_size(blob, 512);
+ if (!ret)
+ goto add_sub;
+ else
+ goto err_size;
+ } else if (ret < 0) {
+ printf("Can't add partition node: %s\n",
+ fdt_strerror(ret));
+ return ret;
+ }
+ newoff = ret;
+
+ /* Check MTD_WRITEABLE_CMD flag */
+ if (part->mask_flags & 1) {
+add_ro:
+ ret = fdt_setprop(blob, newoff, "read_only", NULL, 0);
+ if (ret == -FDT_ERR_NOSPACE) {
+ ret = fdt_increase_size(blob, 512);
+ if (!ret)
+ goto add_ro;
+ else
+ goto err_size;
+ } else if (ret < 0)
+ goto err_prop;
+ }
+
+ cell.r0 = cpu_to_fdt32(part->offset);
+ cell.r1 = cpu_to_fdt32(part->size);
+add_reg:
+ ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell));
+ if (ret == -FDT_ERR_NOSPACE) {
+ ret = fdt_increase_size(blob, 512);
+ if (!ret)
+ goto add_reg;
+ else
+ goto err_size;
+ } else if (ret < 0)
+ goto err_prop;
+
+add_label:
+ ret = fdt_setprop_string(blob, newoff, "label", part->name);
+ if (ret == -FDT_ERR_NOSPACE) {
+ ret = fdt_increase_size(blob, 512);
+ if (!ret)
+ goto add_label;
+ else
+ goto err_size;
+ } else if (ret < 0)
+ goto err_prop;
+
+ part_num++;
+ }
+ return 0;
+err_size:
+ printf("Can't increase blob size: %s\n", fdt_strerror(ret));
+ return ret;
+err_prop:
+ printf("Can't add property: %s\n", fdt_strerror(ret));
+ return ret;
+}
+
+/*
+ * Update partitions in nor/nand nodes using info from
+ * mtdparts environment variable. The nodes to update are
+ * specified by node_info structure which contains mtd device
+ * type and compatible string: E. g. the board code in
+ * ft_board_setup() could use:
+ *
+ * struct node_info nodes[] = {
+ * { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, },
+ * { "cfi-flash", MTD_DEV_TYPE_NOR, },
+ * };
+ *
+ * fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+ */
+void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
+{
+ struct node_info *ni = node_info;
+ struct mtd_device *dev;
+ int i, idx;
+ int noff;
+
+ if (mtdparts_init() != 0)
+ return;
+
+ for (i = 0; i < node_info_size; i++) {
+ idx = 0;
+ noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
+ while (noff != -FDT_ERR_NOTFOUND) {
+ debug("%s: %s, mtd dev type %d\n",
+ fdt_get_name(blob, noff, 0),
+ ni[i].compat, ni[i].type);
+ dev = device_find(ni[i].type, idx++);
+ if (dev) {
+ if (fdt_node_set_part_info(blob, noff, dev))
+ return; /* return on error */
+ }
+
+ /* Jump to next flash node */
+ noff = fdt_node_offset_by_compatible(blob, noff,
+ ni[i].compat);
+ }
+ }
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 0a9dd0d..a3d5f8c 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -81,5 +81,7 @@ int fdt_resize(void *blob);
int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size);
+void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
+
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index 8b2720e..906eb3d 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -78,5 +78,6 @@ struct mtdids {
extern int mtdparts_init(void);
extern int find_dev_and_part(const char *id, struct mtd_device **dev,
u8 *part_num, struct part_info **part);
+extern struct mtd_device *device_find(u8 type, u8 num);
#endif /* load_kernel_h */
diff --git a/include/mtd_node.h b/include/mtd_node.h
new file mode 100644
index 0000000..5aae085
--- /dev/null
+++ b/include/mtd_node.h
@@ -0,0 +1,11 @@
+#ifndef _NODE_INFO
+#define _NODE_INFO
+
+/*
+ * Info we use to search for a flash node in DTB.
+ */
+struct node_info {
+ const char *compat; /* compatible string */
+ int type; /* mtd flash type */
+};
+#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
@ 2010-02-23 22:37 ` Anatolij Gustschin
2010-02-24 9:06 ` Detlev Zundel
2010-03-21 11:03 ` Wolfgang Denk
2010-03-21 10:33 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Wolfgang Denk
1 sibling, 2 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-23 22:37 UTC (permalink / raw)
To: u-boot
PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
Signed-off-by: Michael Weiss michael.weiss at ifm.com
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
MAKEALL | 1 +
Makefile | 3 +
board/freescale/common/fsl_diu_fb.c | 29 ++-
board/pdm360ng/Makefile | 51 +++
board/pdm360ng/config.mk | 24 ++
board/pdm360ng/pdm360ng.c | 618 +++++++++++++++++++++++++++++++++++
cpu/mpc512x/diu.c | 14 +-
include/configs/pdm360ng.h | 525 +++++++++++++++++++++++++++++
include/post.h | 1 +
post/tests.c | 4 +
10 files changed, 1264 insertions(+), 6 deletions(-)
create mode 100644 board/pdm360ng/Makefile
create mode 100644 board/pdm360ng/config.mk
create mode 100644 board/pdm360ng/pdm360ng.c
create mode 100644 include/configs/pdm360ng.h
diff --git a/MAKEALL b/MAKEALL
index 1e660b6..06ac650 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -93,6 +93,7 @@ LIST_512x=" \
aria \
mecp5123 \
mpc5121ads \
+ pdm360ng \
"
#########################################################################
diff --git a/Makefile b/Makefile
index 524b9da..9003ef9 100644
--- a/Makefile
+++ b/Makefile
@@ -820,6 +820,9 @@ aria_config: unconfig
mecp5123_config: unconfig
@$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
+pdm360ng_config: unconfig
+ @$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng
+
mpc5121ads_config \
mpc5121ads_rev2_config \
: unconfig
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index d7c55b5..5512bb2 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -51,6 +51,22 @@ struct fb_videomode {
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
+/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
+static struct fb_videomode fsl_diu_mode_800 = {
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = 31250,
+ .left_margin = 86,
+ .right_margin = 42,
+ .upper_margin = 33,
+ .lower_margin = 10,
+ .hsync_len = 128,
+ .vsync_len = 2,
+ .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
/*
* These parameters give default parameters
* for video output 1024x768,
@@ -211,9 +227,14 @@ int fsl_diu_init(int xres,
disable_lcdc();
- if (xres == 1280) {
+ switch (xres) {
+ case 800:
+ fsl_diu_mode_db = &fsl_diu_mode_800;
+ break;
+ case 1280:
fsl_diu_mode_db = &fsl_diu_mode_1280;
- } else {
+ break;
+ default:
fsl_diu_mode_db = &fsl_diu_mode_1024;
}
@@ -592,9 +613,9 @@ int fsl_diu_display_bmp(unsigned char *bmp,
b = *bitmap++;
for (k = 0; k < 8; k++) {
if (b & 0x80)
- *fb_t = palette[1];
+ *fb_t++ = palette[1];
else
- *fb_t = palette[0];
+ *fb_t++ = palette[0];
b = b << 1;
}
}
diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile
new file mode 100644
index 0000000..8513242
--- /dev/null
+++ b/board/pdm360ng/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o
+
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/pdm360ng/config.mk b/board/pdm360ng/config.mk
new file mode 100644
index 0000000..56337e4
--- /dev/null
+++ b/board/pdm360ng/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2009
+# Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xF0000000
diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c
new file mode 100644
index 0000000..f6e601d
--- /dev/null
+++ b/board/pdm360ng/pdm360ng.c
@@ -0,0 +1,618 @@
+/*
+ * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
+ *
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <command.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/mpc512x.h>
+#include <fdt_support.h>
+#ifdef CONFIG_MISC_INIT_R
+#include <i2c.h>
+#endif
+#include <serial.h>
+#include <post.h>
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Clocks in use */
+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
+ CLOCK_SCCR1_LPC_EN | \
+ CLOCK_SCCR1_NFC_EN | \
+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
+ CLOCK_SCCR1_PSCFIFO_EN | \
+ CLOCK_SCCR1_DDR_EN | \
+ CLOCK_SCCR1_FEC_EN | \
+ CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
+ CLOCK_SCCR2_SPDIF_EN | \
+ CLOCK_SCCR2_DIU_EN | \
+ CLOCK_SCCR2_I2C_EN)
+
+int board_early_init_f(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+ /*
+ * Initialize Local Window for FLASH-Bank1 access (CS1)
+ */
+ out_be32(&im->sysconf.lpcs1aw,
+ CSAW_START(CONFIG_SYS_FLASH1_BASE) |
+ CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH1_SIZE)
+ );
+ out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
+
+ /*
+ * Local Window for MRAM access (CS2)
+ */
+ out_be32(&im->sysconf.lpcs2aw,
+ CSAW_START(CONFIG_SYS_MRAM_BASE) |
+ CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE)
+ );
+ out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
+
+ sync_law(&im->sysconf.lpcs2aw);
+
+ /*
+ * Configure Flash Speed
+ */
+ out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
+ out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
+
+ /*
+ * Enable clocks
+ */
+ out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
+ out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
+ setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
+#endif
+
+ return 0;
+}
+
+phys_size_t initdram (int board_type)
+{
+ u32 pdm360ng_init_seq[] = {
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_PCHG_ALL,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_RFSH,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_RFSH,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_MICRON_INIT_DEV_OP,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_EM2,
+ CONFIG_SYS_DDRCMD_NOP,
+ CONFIG_SYS_DDRCMD_PCHG_ALL,
+ CONFIG_SYS_DDRCMD_EM2,
+ CONFIG_SYS_DDRCMD_EM3,
+ CONFIG_SYS_DDRCMD_EN_DLL,
+ CONFIG_SYS_DDRCMD_RES_DLL,
+ CONFIG_SYS_DDRCMD_PCHG_ALL,
+ CONFIG_SYS_DDRCMD_RFSH,
+ CONFIG_SYS_DDRCMD_RFSH,
+ CONFIG_SYS_MICRON_INIT_DEV_OP,
+ CONFIG_SYS_DDRCMD_OCD_DEFAULT,
+ CONFIG_SYS_DDRCMD_OCD_EXIT,
+ CONFIG_SYS_DDRCMD_PCHG_ALL,
+ CONFIG_SYS_DDRCMD_NOP
+ };
+
+ return fixed_sdram(NULL, pdm360ng_init_seq,
+ ARRAY_SIZE(pdm360ng_init_seq));
+}
+
+#if defined(CONFIG_SERIAL_MULTI)
+static int set_lcd_brightness(char *);
+#endif
+
+int misc_init_r(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+#ifdef CONFIG_FSL_DIU_FB
+# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
+ mpc5121_diu_init();
+#endif
+#if defined(CONFIG_SERIAL_MULTI)
+ set_lcd_brightness(0);
+#endif
+ /* Switch LCD-Backlight and LVDS-Interface on */
+ setbits_be32(&im->gpio.gpdir, 0x01040000);
+ clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000);
+#endif
+
+#if defined(CONFIG_HARD_I2C)
+ if (!getenv("ethaddr")) {
+ uchar buf[6];
+ char mac[18];
+ int ret;
+
+ /* I2C-0 for on-board eeprom */
+ i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
+
+ /* Read ethaddr from EEPROM */
+ ret = i2c_read(CONFIG_SYS_I2C_EEPROM,
+ CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
+ if (!ret) {
+ sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+ /* Owned by IFM ? */
+ if (strstr(mac, "00:02:01") != mac) {
+ printf("Illegal MAC address in EEPROM: %s\n",
+ mac);
+ } else {
+ debug("Using MAC from I2C EEPROM: %s\n", mac);
+ setenv("ethaddr", mac);
+ }
+ } else {
+ printf("Error: Unable to read MAC from I2C"
+ " EEPROM at address %02X:%02X\n",
+ CONFIG_SYS_I2C_EEPROM,
+ CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
+ }
+ }
+#endif /* defined(CONFIG_HARD_I2C) */
+
+ return 0;
+}
+
+static iopin_t ioregs_init[] = {
+ /* FUNC1=LPC_CS4 */
+ {
+ offsetof(struct ioctrl512x, io_control_pata_ce1), 1, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+ IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=CAN3_TX */
+ {
+ offsetof(struct ioctrl512x, io_control_pata_isolate), 1, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO12 Sets Next 5 to GPIO pads */
+ /* GPIO12-GPIO16 */
+ {
+ offsetof(struct ioctrl512x, io_control_pata_ior), 5, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC2=DIU_LD22 Sets Next 2 to DIU_LD pads */
+ /* DIU_LD22-DIU_LD23 */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad31), 2, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC2=USB1_DATA7 Sets Next 12 to USB1 pads */
+ /* USB1_DATA7-USB1_DATA0, USB1_STOP, USB1_NEXT, USB1_CLK, USB1_DIR */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad29), 12, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC1=VIU_DATA0 Sets Next 3 to VIU_DATA pads */
+ /* VIU_DATA0-VIU_DATA2 */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad17), 3, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC2=FEC_TXD_0 */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad14), 1, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC1=VIU_DATA3 Sets Next 2 to VIU_DATA pads */
+ /* VIU_DATA3, VIU_DATA4 */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad13), 2, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC2=FEC_RXD_1 Sets Next 12 to FEC pads */
+ /* FEC_RXD_1, FEC_RXD_0, FEC_RX_CLK, FEC_TX_CLK, FEC_RX_ER, FEC_RX_DV */
+ /* FEC_TX_EN, FEC_TX_ER, FEC_CRS, FEC_MDC, FEC_MDIO, FEC_COL */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad11), 12, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC2=DIU_LD03 Sets Next 25 to DIU pads */
+ /* DIU_LD00-DIU_LD21 */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_cbe0), 22, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+ },
+ /* FUNC2=DIU_CLK Sets Next 3 to DIU pads */
+ /* DIU_CLK, DIU_VSYNC, DIU_HSYNC */
+ {
+ offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC2=CAN3_RX */
+ {
+ offsetof(struct ioctrl512x, io_control_irq1), 1, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* Sets lowest slew on 2 CAN_TX Pins*/
+ {
+ offsetof(struct ioctrl512x, io_control_can1_tx), 2, 0,
+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=CAN4_TX Sets Next 2 to CAN4 pads */
+ /* CAN4_TX, CAN4_RX */
+ {
+ offsetof(struct ioctrl512x, io_control_j1850_tx), 2, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
+ /* GPIO8, GPIO9 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc0_0), 2, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC1=FEC_TXD_1 Sets Next 3 to FEC pads */
+ /* FEC_TXD_1, FEC_TXD_2, FEC_TXD_3 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc0_4), 3, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=FEC_RXD_3 Sets Next 2 to FEC pads */
+ /* FEC_RXD_3, FEC_RXD_2 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc1_4), 2, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=GPIO17 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc2_1), 1, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
+ /* GPIO2, GPIO20, GPIO21 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc2_4), 3, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC2=VIU_PIX_CLK */
+ {
+ offsetof(struct ioctrl512x, io_control_psc3_4), 1, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=GPIO24 Sets Next 2 to GPIO pads */
+ /* GPIO24, GPIO25 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc4_0), 2, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC1=NFC_CE2 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc4_4), 1, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+ IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC2=VIU_DATA5 Sets Next 5 to VIU_DATA pads */
+ /* VIU_DATA5-VIU_DATA9 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc5_0), 5, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=LPC_TSIZ1 Sets Next 2 to LPC_TSIZ pads */
+ /* LPC_TSIZ1-LPC_TSIZ2 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc6_0), 2, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=LPC_TS */
+ {
+ offsetof(struct ioctrl512x, io_control_psc6_4), 1, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=GPIO16 Sets Next 5 to GPIO pads */
+ /* GPIO16-GPIO19, GPT7/GPIO7 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc7_0), 5, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO20 Sets Next 2 to GPIO pads */
+ /* GPIO20, GPIO21 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc8_0), 2, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO0/GPT0 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc8_4), 1, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
+ /* GPIO8, GPIO9 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc10_0), 2, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
+ /* GPIO2, GPIO12, GPIO13 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc10_4), 3, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+ },
+ /* FUNC2=DIU_DE */
+ {
+ offsetof(struct ioctrl512x, io_control_psc11_4), 1, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ }
+};
+
+int checkboard (void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+ puts("Board: PDM360NG\n");
+
+ /* initialize function mux & slew rate IO inter alia on IO Pins */
+
+ iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
+
+ /* initialize IO_CONTROL_GP (GPIO/GPT-mux-register) */
+ setbits_be32(&im->io_ctrl.io_control_gp, (1 << 0)); /* GP_MUX7->GPIO7 */
+
+ /* configure GPIO24 (VIU_CE), output/high */
+ setbits_be32(&im->gpio.gpdir, 0x80);
+ setbits_be32(&im->gpio.gpdat, 0x80);
+
+ return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+struct node_info nodes[] = {
+ { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, },
+ { "cfi-flash", MTD_DEV_TYPE_NOR, },
+};
+#endif
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+#endif
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+/*
+ * Co-Processor communication POST
+ */
+#if defined(CONFIG_POST) && defined(CONFIG_SERIAL_MULTI)
+
+#if defined(CONFIG_SYS_POST_WORD_ADDR)
+# define _POST_ADDR (CONFIG_SYS_POST_WORD_ADDR)
+#else
+#error echo "No POST word address defined"
+#endif
+
+void post_word_store(ulong a)
+{
+ volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+ out_be32(save_addr, a);
+}
+
+ulong post_word_load(void)
+{
+ volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+ return in_be32(save_addr);
+}
+
+/*
+ * Actually the termination sequence of the coprocessor
+ * commands is "\r\n" (CR LF), but here we use a side effect of
+ * the putc() routine of the serial driver which checks for LF
+ * and sends CR before sending LF. Therefore the termination
+ * sequence in the command below is only "\n".
+ * "alive" string is the coprocessor response for ping command
+ * and not a command, therefore it is terminated with "\r\n".
+ */
+char ping[] = "$PI;2C\n";
+char alive[] = "$AL;38\r\n";
+
+#define PDM360NG_COPROC_READ_DELAY 5000
+
+int pdm360ng_coprocessor_post_test(int flags)
+{
+ struct stdio_dev *cop_port;
+ int ret;
+ char buf[10];
+
+ /* Test IO Coprocessor communication */
+ cop_port = open_port(4, 38400);
+ if (!cop_port)
+ return -1;
+
+ write_port(cop_port, ping);
+ udelay(PDM360NG_COPROC_READ_DELAY);
+
+ memset(buf, 0, sizeof(buf));
+ ret = read_port(cop_port, buf, sizeof(buf));
+ close_port(4);
+ if (ret <= 0) {
+ post_log("Error: Can't read IO Coprocessor port.\n");
+ return -1;
+ }
+
+ if (strcmp(buf, alive)) {
+ post_log("Error: IO-Cop. resp.: %s\n", buf);
+ return -1;
+ }
+
+ /* Test WD Coprocessor communication */
+ cop_port = open_port(1, 38400);
+ if (!cop_port) {
+ post_log("Error: Can't open WD Coprocessor port.\n");
+ return -1;
+ }
+
+ write_port(cop_port, ping);
+ udelay(PDM360NG_COPROC_READ_DELAY);
+
+ memset(buf, 0, sizeof(buf));
+ ret = read_port(cop_port, buf, sizeof(buf));
+ close_port(1);
+ if (ret <= 0) {
+ post_log("Error: Can't read WD Coprocessor port.\n");
+ return -1;
+ }
+
+ if (strcmp(buf, alive)) {
+ post_log("Error: WD-Cop. resp.: %s\n", buf);
+ return -1;
+ }
+
+ return 0;
+}
+#endif /* CONFIG_POST */
+
+#if defined(CONFIG_SERIAL_MULTI)
+/*
+ * If argument is NULL, set the LCD brightness to the
+ * value from "brightness" environment variable. Set
+ * the LCD brightness to the value specified by the
+ * argument otherwise. Default brightness is zero.
+ */
+#define MAX_BRIGHTNESS 99
+static int set_lcd_brightness(char *brightness)
+{
+ struct stdio_dev *cop_port;
+ char *env;
+ char cmd_buf[20];
+ int val = 0;
+ int cs = 0;
+ int len, i;
+
+ if (brightness) {
+ val = simple_strtol(brightness, NULL, 10);
+ } else {
+ env = getenv("brightness");
+ if (env)
+ val = simple_strtol(env, NULL, 10);
+ }
+
+ if (val < 0)
+ val = 0;
+
+ if (val > MAX_BRIGHTNESS)
+ val = MAX_BRIGHTNESS;
+
+ sprintf(cmd_buf, "$SB;%04d;", val);
+
+ len = strlen(cmd_buf);
+ for (i = 1; i <= len; i++)
+ cs += cmd_buf[i];
+
+ cs = (~cs + 1) & 0xff;
+ sprintf(cmd_buf + len, "%02X\n", cs);
+
+ /* IO Coprocessor communication */
+ cop_port = open_port(4, 38400);
+ if (!cop_port) {
+ printf("Error: Can't open IO Coprocessor port.\n");
+ return -1;
+ }
+
+ debug("%s: cmd: %s", __func__, cmd_buf);
+ write_port(cop_port, cmd_buf);
+ /*
+ * Wait for transmission and maybe response data
+ * before closing the port.
+ */
+ udelay(PDM360NG_COPROC_READ_DELAY);
+ memset(cmd_buf, 0, sizeof(cmd_buf));
+ len = read_port(cop_port, cmd_buf, sizeof(cmd_buf));
+ if (len)
+ printf("Error: %s\n", cmd_buf);
+
+ close_port(4);
+
+ return 0;
+}
+
+static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
+ int argc, char *argv[])
+{
+ if (argc < 2) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ return set_lcd_brightness(argv[1]);
+}
+
+U_BOOT_CMD(lcdbr, 2, 1, cmd_lcd_brightness,
+ "set LCD brightness",
+ "<brightness> - set LCD backlight level to <brightness>.\n"
+);
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
index a24f395..fc43a9d 100644
--- a/cpu/mpc512x/diu.c
+++ b/cpu/mpc512x/diu.c
@@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
unsigned long h_addr;
h_addr = simple_strtoul(addr, NULL, 16);
- if (h_addr < CONFIG_SYS_FLASH_BASE ||
- h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
+ if ((h_addr < CONFIG_SYS_FLASH_BASE ||
+ h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
+#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
+ && (h_addr < CONFIG_SYS_FLASH1_BASE ||
+ h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
+#endif
+ ) {
printf("bmp addr %lx is not a valid flash address\n", h_addr);
return 0;
} else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
@@ -85,8 +90,13 @@ int mpc5121_diu_init(void)
char *bmp = NULL;
char *bmp_env;
+#ifdef CONFIG_PDM360NG
+ xres = 800;
+ yres = 480;
+#else
xres = 1024;
yres = 768;
+#endif
pixel_format = 0x88883316;
debug("mpc5121_diu_init\n");
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
new file mode 100644
index 0000000..5e59dd1
--- /dev/null
+++ b/include/configs/pdm360ng.h
@@ -0,0 +1,525 @@
+/*
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * pdm360ng board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#undef DEBUG
+
+#define CONFIG_PDM360NG 1
+#define CONFIG_PDM360NG_BIG /* PDM360NG with big memory */
+#undef CONFIG_PDM360NG_SMALL /* PDM360NG with small memory */
+
+/*
+ * Memory map for the PDM360NG board:
+ *
+ * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB)
+ * 0x2000_0000 - 0x3FFF_FFFF reserved (DDR RAM (512 MB)
+ * 0x5000_0000 - 0x5001_FFFF SRAM (128 KB)
+ * 0x5004_0000 - 0x5005_FFFF MRAM (CS2) (128 KB)
+ * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB)
+ * 0xF000_0000 - 0xF7FF_FFFF NOR FLASH (CS0) (128 MB)
+ * 0xF800_0000 - 0xFFFF_FFFF NOR FLASH (CS1) (128 MB)
+ */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC512X 1 /* MPC512X family */
+#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
+#undef CONFIG_FSL_DIU_LOGO_BMP /* Don't include FSL DIU binary bmp */
+
+/* Used for silent command in environment */
+#define CONFIG_SYS_DEVICE_NULLDEV
+#define CONFIG_SILENT_CONSOLE
+
+/* Video */
+#undef CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#endif
+
+#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_IMMR 0x80000000
+#define CONFIG_SYS_DIU_ADDR ((CONFIG_SYS_IMMR) + 0x2100)
+
+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
+#define CONFIG_SYS_MEMTEST_END 0x00400000
+
+/*
+ * DDR Setup - manually set all parameters as there's no SPD etc.
+ */
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_DDR_SIZE 512 /* MB */
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_DDR_SIZE 128 /* MB */
+#else
+#error No memory configuration level defined!
+#endif
+#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+
+#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000012 /* DDR pin mux and slew rate */
+
+/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
+ *
+ * SYS_CFG:
+ * [31:31] MDDRC Soft Reset: Diabled
+ * [30:30] DRAM CKE pin: Enabled
+ * [29:29] DRAM CLK: Enabled
+ * [28:28] Command Mode: Enabled (For initialization only)
+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
+ * [20:19] Read Test: DON'T USE
+ * [18:18] Self Refresh: Enabled
+ * [17:17] 16bit Mode: Disabled
+ * [16:13] Read Delay: 3
+ * [12:12] Half DQS Delay: Disabled
+ * [11:11] Quarter DQS Delay: Disabled
+ * [10:08] Write Delay: 2
+ * [07:07] Early ODT: Disabled
+ * [06:06] On DIE Termination: Enabled
+ * [05:05] FIFO Overflow Clear: DON'T USE here
+ * [04:04] FIFO Underflow Clear: DON'T USE here
+ * [03:03] FIFO Overflow Pending: DON'T USE here
+ * [02:02] FIFO Underlfow Pending: DON'T USE here
+ * [01:01] FIFO Overlfow Enabled: Enabled
+ * [00:00] FIFO Underflow Enabled: Enabled
+ * TIME_CFG0
+ * [31:16] DRAM Refresh Time: 0 CSB clocks
+ * [15:8] DRAM Command Time: 0 CSB clocks
+ * [07:00] DRAM Precharge Time: 0 CSB clocks
+ * TIME_CFG1
+ * [31:26] DRAM tRFC:
+ * [25:21] DRAM tWR1:
+ * [20:17] DRAM tWRT1:
+ * [16:11] DRAM tDRR:
+ * [10:05] DRAM tRC:
+ * [04:00] DRAM tRAS:
+ * TIME_CFG2
+ * [31:28] DRAM tRCD:
+ * [27:23] DRAM tFAW:
+ * [22:19] DRAM tRTW1:
+ * [18:15] DRAM tCCD:
+ * [14:10] DRAM tRTP:
+ * [09:05] DRAM tRP:
+ * [04:00] DRAM tRPA
+ */
+
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_MDDRC_SYS_CFG 0xEA804A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864
+
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_MDDRC_SYS_CFG 0xE8604A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x3CEC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x33310863
+#else
+#error No memory configuration level defined!
+#endif
+
+#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000
+
+#define CONFIG_SYS_DDRCMD_NOP 0x01380000
+#define CONFIG_SYS_DDRCMD_PCHG_ALL 0x01100400
+#define CONFIG_SYS_DDRCMD_EM2 0x01020000 /* EMR2 */
+#define CONFIG_SYS_DDRCMD_EM3 0x01030000 /* EMR3 */
+#define CONFIG_SYS_DDRCMD_EN_DLL 0x01010040 /* EMR with 150 ohm ODT todo: verify*/
+#define CONFIG_SYS_DDRCMD_RES_DLL 0x01000100
+#define CONFIG_SYS_DDRCMD_RFSH 0x01080000
+#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432
+#define CONFIG_SYS_DDRCMD_OCD_DEFAULT 0x010107C0 /* EMR with 150 ohm ODT todo: verify*/
+#define CONFIG_SYS_DDRCMD_OCD_EXIT 0x01010440 /* EMR new command with 150 ohm ODT todo: verify*/
+
+/* DDR Priority Manager Configuration */
+#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777
+#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000
+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001
+#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC
+#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA
+#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558
+#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122
+#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111
+
+/*
+ * NOR FLASH on the Local Bus
+ */
+#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
+
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */
+#define CONFIG_SYS_FLASH1_BASE 0xF8000000 /* start of FLASH-Bank1 */
+#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max flash size of FLASH-Bank0 in bytes */
+#define CONFIG_SYS_FLASH1_SIZE 0x08000000 /* max flash size of FLASH-Bank1 in bytes */
+#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
+ /* 512 sectors with size 0x40000 for 128MB*/
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */
+#define CONFIG_SYS_FLASH1_BASE 0xF4000000 /* start of FLASH-Bank1 */
+#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* max flash size of FLASH-Bank0 in bytes */
+#define CONFIG_SYS_FLASH1_SIZE 0x04000000 /* max flash size of FLASH-Bank1 in bytes */
+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */
+ /* 256 sectors with size 0x40000 for 64MB*/
+#else
+#error No memory configuration level defined!
+#endif
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE}
+
+#undef CONFIG_SYS_FLASH_CHECKSUM
+
+#define CONFIG_SYS_SRAM_BASE 0x50000000
+#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
+
+#define CONFIG_SYS_CS0_CFG 0x05059350 /* ALE active low, data size 4bytes */
+#define CONFIG_SYS_CS1_CFG 0x05059350 /* ALE active low, data size 4bytes */
+
+#define CONFIG_SYS_MRAM_BASE 0x50040000
+#define CONFIG_SYS_MRAM_SIZE 0x00020000
+#define CONFIG_SYS_CS2_CFG 0x05059150 /* ALE active low, data size 4bytes */
+
+#define CONFIG_SYS_CS_ALETIMING 0x00000007 /* alt. CS timing for CS0, CS1, CS2 */
+
+/*
+ * NAND FLASH
+ */
+#define CONFIG_CMD_NAND /* enable NAND support */
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE 0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
+ * Dynamic MTD partition support
+ */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
+#define MTDIDS_DEFAULT "nor0=f0000000.flash,nor1=f8000000.flash," \
+ "nand0=MPC5121 NAND"
+
+/*
+ * Flash layout
+ */
+#define MTDPARTS_DEFAULT "mtdparts=f0000000.flash:512k(u-boot)," \
+ "256k(environment1)," \
+ "256k(environment2)," \
+ "256k(splash-factory)," \
+ "2m(FIT: recovery)," \
+ "4608k(fs-recovery)," \
+ "256k(splash-customer),"\
+ "5m(FIT: kernel+dtb)," \
+ "64m(rootfs squash)ro," \
+ "51m(userfs ubi);" \
+ "f8000000.flash:-(unused);" \
+ "MPC5121 NAND:1024m(extended-userfs)"
+
+/*
+ * Override partitions in device tree using info
+ * in mtdparts env. variable.
+ */
+#ifdef CONFIG_CMD_MTDPARTS
+#define CONFIG_FDT_FIXUP_PARTITIONS
+#endif
+
+/* Use SRAM for initial stack */
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Initial RAM address */
+#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of used area in RAM */
+
+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
+#ifdef CONFIG_FSL_DIU_FB
+#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
+#else
+#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
+#endif
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 6 /* console is on PSC6 */
+#if CONFIG_PSC_CONSOLE != 6
+#error CONFIG_PSC_CONSOLE must be 6
+#endif
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+
+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC6_TX_SIZE
+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC6_TX_ADDR
+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC6_RX_SIZE
+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC6_RX_ADDR
+
+/*
+ * Used PSC UART devices
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_PSC1
+#define CONFIG_SYS_PSC4
+#define CONFIG_SYS_PSC6
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+/*
+ * MAC addr in EEPROM
+ */
+#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0
+#define CONFIG_SYS_I2C_EEPROM 0x50
+#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10
+
+/*
+ * Enabled only to delete ethaddr before testing
+ * ethaddr setting from EEPROM
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * IIM - IC Identification Module
+ */
+#undef CONFIG_IIM
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC512x_FEC 1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR 0x1F
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_FEC_AN_TIMEOUT 1
+#define CONFIG_HAS_ETH0
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+/* This has to be a multiple of the Flash sector size */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */
+
+/* Address and size of Redundant Environment Sector */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+#undef CONFIG_CMD_FUSE
+
+/*
+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock.
+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set
+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer
+ * to chapter 36 of the MPC5121e Reference Manual.
+ */
+#undef CONFIG_WATCHDOG /* disable watchdog */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF
+
+ /*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+
+#ifdef CONFIG_CMD_KGDB
+ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CONFIG_SYS_DCACHE_SIZE 32768
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+#endif
+
+#define CONFIG_SYS_HID0_INIT 0x000000000
+#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE)
+#define CONFIG_SYS_HID2 HID2_HBE
+
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+#ifdef CONFIG_SERIAL_MULTI
+/* POST support */
+#define CONFIG_POST (CONFIG_SYS_POST_COPROC)
+
+#define CONFIG_POST_COPROC {\
+ "Coprocessors communication test", \
+ "coproc_com", \
+ "This test checks communication with coprocessors.", \
+ POST_RAM | POST_ALWAYS | POST_CRITICAL, \
+ &pdm360ng_coprocessor_post_test, \
+ NULL, \
+ NULL, \
+ CONFIG_SYS_POST_COPROC \
+ }
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_HOSTNAME pdm360ng
+#define CONFIG_LOADADDR 400000 /* default location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo PDM360NG SAMPLE;" \
+ "echo"
+
+#define CONFIG_BOOTCOMMAND "run env_cont"
+
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
+
+#define OF_CPU "PowerPC,5121@0"
+#define OF_SOC_COMPAT "fsl,mpc5121-immr"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc at 80000000/serial at 11600"
+
+#endif /* __CONFIG_H */
diff --git a/include/post.h b/include/post.h
index 9fcd3ce..d147103 100644
--- a/include/post.h
+++ b/include/post.h
@@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
#define CONFIG_SYS_POST_BSPEC4 0x00080000
#define CONFIG_SYS_POST_BSPEC5 0x00100000
#define CONFIG_SYS_POST_CODEC 0x00200000
+#define CONFIG_SYS_POST_COPROC 0x00400000
#endif /* CONFIG_POST */
diff --git a/post/tests.c b/post/tests.c
index 3224f00..06e9dc0 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
extern int fpga_post_test (int flags);
extern int lwmon5_watchdog_post_test(int flags);
extern int sysmon1_post_test(int flags);
+extern int pdm360ng_coprocessor_post_test(int flags);
extern int sysmon_init_f (void);
@@ -286,6 +287,9 @@ struct post_test post_list[] =
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
CONFIG_POST_BSPEC5,
#endif
+#if CONFIG_POST & CONFIG_SYS_POST_COPROC
+ CONFIG_POST_COPROC,
+#endif
};
unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
@ 2010-02-23 22:49 ` Wolfgang Denk
2010-02-24 10:03 ` Anatolij Gustschin
2010-03-21 10:31 ` Wolfgang Denk
2 siblings, 1 reply; 19+ messages in thread
From: Wolfgang Denk @ 2010-02-23 22:49 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-5-git-send-email-agust@denx.de> you wrote:
> Allow displaying run length encoded bitmaps.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> board/freescale/common/fsl_diu_fb.c | 78 +++++++++++++++++++++++++++++++++++
> 1 files changed, 78 insertions(+), 0 deletions(-)
Isn't there a way to implement this feature in common code, so all
boards with bitmap support can benefit from this?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Die Scheu vor Verantwortung ist die Krankheit unserer Zeit.
-- Otto von Bismarck
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board
2010-02-23 22:37 ` [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board Anatolij Gustschin
@ 2010-02-24 9:06 ` Detlev Zundel
2010-02-24 10:27 ` Anatolij Gustschin
2010-03-21 11:03 ` Wolfgang Denk
1 sibling, 1 reply; 19+ messages in thread
From: Detlev Zundel @ 2010-02-24 9:06 UTC (permalink / raw)
To: u-boot
Hi Anatolij,
this looks pretty good - only a few remarks below.
> PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
>
> Signed-off-by: Michael Weiss michael.weiss at ifm.com
Please fix the e-mail format.
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> MAKEALL | 1 +
> Makefile | 3 +
> board/freescale/common/fsl_diu_fb.c | 29 ++-
> board/pdm360ng/Makefile | 51 +++
> board/pdm360ng/config.mk | 24 ++
> board/pdm360ng/pdm360ng.c | 618 +++++++++++++++++++++++++++++++++++
> cpu/mpc512x/diu.c | 14 +-
> include/configs/pdm360ng.h | 525 +++++++++++++++++++++++++++++
> include/post.h | 1 +
> post/tests.c | 4 +
> 10 files changed, 1264 insertions(+), 6 deletions(-)
> create mode 100644 board/pdm360ng/Makefile
> create mode 100644 board/pdm360ng/config.mk
> create mode 100644 board/pdm360ng/pdm360ng.c
> create mode 100644 include/configs/pdm360ng.h
>
> diff --git a/MAKEALL b/MAKEALL
> index 1e660b6..06ac650 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -93,6 +93,7 @@ LIST_512x=" \
> aria \
> mecp5123 \
> mpc5121ads \
> + pdm360ng \
> "
>
> #########################################################################
> diff --git a/Makefile b/Makefile
> index 524b9da..9003ef9 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -820,6 +820,9 @@ aria_config: unconfig
> mecp5123_config: unconfig
> @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
>
> +pdm360ng_config: unconfig
> + @$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng
> +
> mpc5121ads_config \
> mpc5121ads_rev2_config \
> : unconfig
Keep the list of targets sorted in the Makefile please.
> diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
> index d7c55b5..5512bb2 100644
> --- a/board/freescale/common/fsl_diu_fb.c
> +++ b/board/freescale/common/fsl_diu_fb.c
> @@ -51,6 +51,22 @@ struct fb_videomode {
> #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
> #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
>
> +/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
> +static struct fb_videomode fsl_diu_mode_800 = {
> + .refresh = 60,
> + .xres = 800,
> + .yres = 480,
> + .pixclock = 31250,
> + .left_margin = 86,
> + .right_margin = 42,
> + .upper_margin = 33,
> + .lower_margin = 10,
> + .hsync_len = 128,
> + .vsync_len = 2,
> + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
> + .vmode = FB_VMODE_NONINTERLACED
> +};
> +
> /*
> * These parameters give default parameters
> * for video output 1024x768,
> @@ -211,9 +227,14 @@ int fsl_diu_init(int xres,
>
> disable_lcdc();
>
> - if (xres == 1280) {
> + switch (xres) {
> + case 800:
> + fsl_diu_mode_db = &fsl_diu_mode_800;
> + break;
> + case 1280:
> fsl_diu_mode_db = &fsl_diu_mode_1280;
> - } else {
> + break;
> + default:
> fsl_diu_mode_db = &fsl_diu_mode_1024;
> }
>
> @@ -592,9 +613,9 @@ int fsl_diu_display_bmp(unsigned char *bmp,
> b = *bitmap++;
> for (k = 0; k < 8; k++) {
> if (b & 0x80)
> - *fb_t = palette[1];
> + *fb_t++ = palette[1];
> else
> - *fb_t = palette[0];
> + *fb_t++ = palette[0];
> b = b << 1;
> }
> }
> diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile
> new file mode 100644
> index 0000000..8513242
> --- /dev/null
> +++ b/board/pdm360ng/Makefile
> @@ -0,0 +1,51 @@
> +#
> +# (C) Copyright 2007
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).a
> +
> +COBJS-y := $(BOARD).o
> +
> +COBJS := $(COBJS-y)
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak $(obj).depend
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/pdm360ng/config.mk b/board/pdm360ng/config.mk
> new file mode 100644
> index 0000000..56337e4
> --- /dev/null
> +++ b/board/pdm360ng/config.mk
> @@ -0,0 +1,24 @@
> +#
> +# (C) Copyright 2009
> +# Michael Wei?, ifm ecomatic gmbh, michael.weiss at ifm.com
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +TEXT_BASE = 0xF0000000
> diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c
> new file mode 100644
> index 0000000..f6e601d
> --- /dev/null
> +++ b/board/pdm360ng/pdm360ng.c
> @@ -0,0 +1,618 @@
> +/*
> + * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
> + *
> + * (C) Copyright 2009
> + * Michael Wei?, ifm ecomatic gmbh, michael.weiss at ifm.com
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <common.h>
> +#include <asm/bitops.h>
> +#include <command.h>
> +#include <asm/io.h>
> +#include <asm/processor.h>
> +#include <asm/mpc512x.h>
> +#include <fdt_support.h>
> +#ifdef CONFIG_MISC_INIT_R
> +#include <i2c.h>
> +#endif
> +#include <serial.h>
> +#include <post.h>
> +#include <jffs2/load_kernel.h>
> +#include <mtd_node.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/* Clocks in use */
> +#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
> + CLOCK_SCCR1_LPC_EN | \
> + CLOCK_SCCR1_NFC_EN | \
> + CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
> + CLOCK_SCCR1_PSCFIFO_EN | \
> + CLOCK_SCCR1_DDR_EN | \
> + CLOCK_SCCR1_FEC_EN | \
> + CLOCK_SCCR1_TPR_EN)
> +
> +#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
> + CLOCK_SCCR2_SPDIF_EN | \
> + CLOCK_SCCR2_DIU_EN | \
> + CLOCK_SCCR2_I2C_EN)
> +
> +int board_early_init_f(void)
> +{
> + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
> +
> + /*
> + * Initialize Local Window for FLASH-Bank1 access (CS1)
> + */
> + out_be32(&im->sysconf.lpcs1aw,
> + CSAW_START(CONFIG_SYS_FLASH1_BASE) |
> + CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH1_SIZE)
> + );
> + out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
> +
> + /*
> + * Local Window for MRAM access (CS2)
> + */
> + out_be32(&im->sysconf.lpcs2aw,
> + CSAW_START(CONFIG_SYS_MRAM_BASE) |
> + CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE)
> + );
> + out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
> +
> + sync_law(&im->sysconf.lpcs2aw);
> +
> + /*
> + * Configure Flash Speed
> + */
> + out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
> + out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
> +
> + /*
> + * Enable clocks
> + */
> + out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
> + out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
> +#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
> + setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
> +#endif
> +
> + return 0;
> +}
> +
> +phys_size_t initdram (int board_type)
> +{
> + u32 pdm360ng_init_seq[] = {
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_PCHG_ALL,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_RFSH,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_RFSH,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_MICRON_INIT_DEV_OP,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_EM2,
> + CONFIG_SYS_DDRCMD_NOP,
> + CONFIG_SYS_DDRCMD_PCHG_ALL,
> + CONFIG_SYS_DDRCMD_EM2,
> + CONFIG_SYS_DDRCMD_EM3,
> + CONFIG_SYS_DDRCMD_EN_DLL,
> + CONFIG_SYS_DDRCMD_RES_DLL,
> + CONFIG_SYS_DDRCMD_PCHG_ALL,
> + CONFIG_SYS_DDRCMD_RFSH,
> + CONFIG_SYS_DDRCMD_RFSH,
> + CONFIG_SYS_MICRON_INIT_DEV_OP,
> + CONFIG_SYS_DDRCMD_OCD_DEFAULT,
> + CONFIG_SYS_DDRCMD_OCD_EXIT,
> + CONFIG_SYS_DDRCMD_PCHG_ALL,
> + CONFIG_SYS_DDRCMD_NOP
> + };
> +
> + return fixed_sdram(NULL, pdm360ng_init_seq,
> + ARRAY_SIZE(pdm360ng_init_seq));
> +}
> +
> +#if defined(CONFIG_SERIAL_MULTI)
> +static int set_lcd_brightness(char *);
> +#endif
> +
> +int misc_init_r(void)
> +{
> + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
> +
> +#ifdef CONFIG_FSL_DIU_FB
> +# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
> + mpc5121_diu_init();
> +#endif
> +#if defined(CONFIG_SERIAL_MULTI)
> + set_lcd_brightness(0);
> +#endif
> + /* Switch LCD-Backlight and LVDS-Interface on */
> + setbits_be32(&im->gpio.gpdir, 0x01040000);
> + clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000);
> +#endif
> +
> +#if defined(CONFIG_HARD_I2C)
> + if (!getenv("ethaddr")) {
> + uchar buf[6];
> + char mac[18];
> + int ret;
> +
> + /* I2C-0 for on-board eeprom */
> + i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
> +
> + /* Read ethaddr from EEPROM */
> + ret = i2c_read(CONFIG_SYS_I2C_EEPROM,
> + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
> + if (!ret) {
> + sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
> + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
> + /* Owned by IFM ? */
> + if (strstr(mac, "00:02:01") != mac) {
> + printf("Illegal MAC address in EEPROM: %s\n",
> + mac);
> + } else {
> + debug("Using MAC from I2C EEPROM: %s\n", mac);
> + setenv("ethaddr", mac);
> + }
> + } else {
> + printf("Error: Unable to read MAC from I2C"
> + " EEPROM at address %02X:%02X\n",
> + CONFIG_SYS_I2C_EEPROM,
> + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
> + }
> + }
> +#endif /* defined(CONFIG_HARD_I2C) */
> +
> + return 0;
> +}
> +
> +static iopin_t ioregs_init[] = {
> + /* FUNC1=LPC_CS4 */
> + {
> + offsetof(struct ioctrl512x, io_control_pata_ce1), 1, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
> + IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC1=CAN3_TX */
> + {
> + offsetof(struct ioctrl512x, io_control_pata_isolate), 1, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO12 Sets Next 5 to GPIO pads */
> + /* GPIO12-GPIO16 */
> + {
> + offsetof(struct ioctrl512x, io_control_pata_ior), 5, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC2=DIU_LD22 Sets Next 2 to DIU_LD pads */
> + /* DIU_LD22-DIU_LD23 */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad31), 2, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC2=USB1_DATA7 Sets Next 12 to USB1 pads */
> + /* USB1_DATA7-USB1_DATA0, USB1_STOP, USB1_NEXT, USB1_CLK, USB1_DIR */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad29), 12, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC1=VIU_DATA0 Sets Next 3 to VIU_DATA pads */
> + /* VIU_DATA0-VIU_DATA2 */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad17), 3, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC2=FEC_TXD_0 */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad14), 1, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC1=VIU_DATA3 Sets Next 2 to VIU_DATA pads */
> + /* VIU_DATA3, VIU_DATA4 */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad13), 2, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC2=FEC_RXD_1 Sets Next 12 to FEC pads */
> + /* FEC_RXD_1, FEC_RXD_0, FEC_RX_CLK, FEC_TX_CLK, FEC_RX_ER, FEC_RX_DV */
> + /* FEC_TX_EN, FEC_TX_ER, FEC_CRS, FEC_MDC, FEC_MDIO, FEC_COL */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_ad11), 12, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC2=DIU_LD03 Sets Next 25 to DIU pads */
> + /* DIU_LD00-DIU_LD21 */
> + {
> + offsetof(struct ioctrl512x, io_control_pci_cbe0), 22, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
> + },
> + /* FUNC2=DIU_CLK Sets Next 3 to DIU pads */
> + /* DIU_CLK, DIU_VSYNC, DIU_HSYNC */
> + {
> + offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC2=CAN3_RX */
> + {
> + offsetof(struct ioctrl512x, io_control_irq1), 1, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* Sets lowest slew on 2 CAN_TX Pins*/
> + {
> + offsetof(struct ioctrl512x, io_control_can1_tx), 2, 0,
> + IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=CAN4_TX Sets Next 2 to CAN4 pads */
> + /* CAN4_TX, CAN4_RX */
> + {
> + offsetof(struct ioctrl512x, io_control_j1850_tx), 2, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
> + /* GPIO8, GPIO9 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc0_0), 2, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC1=FEC_TXD_1 Sets Next 3 to FEC pads */
> + /* FEC_TXD_1, FEC_TXD_2, FEC_TXD_3 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc0_4), 3, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC1=FEC_RXD_3 Sets Next 2 to FEC pads */
> + /* FEC_RXD_3, FEC_RXD_2 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc1_4), 2, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC3=GPIO17 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc2_1), 1, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
> + /* GPIO2, GPIO20, GPIO21 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc2_4), 3, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC2=VIU_PIX_CLK */
> + {
> + offsetof(struct ioctrl512x, io_control_psc3_4), 1, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC3=GPIO24 Sets Next 2 to GPIO pads */
> + /* GPIO24, GPIO25 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc4_0), 2, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC1=NFC_CE2 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc4_4), 1, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
> + IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC2=VIU_DATA5 Sets Next 5 to VIU_DATA pads */
> + /* VIU_DATA5-VIU_DATA9 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc5_0), 5, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC1=LPC_TSIZ1 Sets Next 2 to LPC_TSIZ pads */
> + /* LPC_TSIZ1-LPC_TSIZ2 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc6_0), 2, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC1=LPC_TS */
> + {
> + offsetof(struct ioctrl512x, io_control_psc6_4), 1, 0,
> + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + },
> + /* FUNC3=GPIO16 Sets Next 5 to GPIO pads */
> + /* GPIO16-GPIO19, GPT7/GPIO7 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc7_0), 5, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO20 Sets Next 2 to GPIO pads */
> + /* GPIO20, GPIO21 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc8_0), 2, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO0/GPT0 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc8_4), 1, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
> + /* GPIO8, GPIO9 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc10_0), 2, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
> + /* GPIO2, GPIO12, GPIO13 */
> + {
> + offsetof(struct ioctrl512x, io_control_psc10_4), 3, 0,
> + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
> + },
> + /* FUNC2=DIU_DE */
> + {
> + offsetof(struct ioctrl512x, io_control_psc11_4), 1, 0,
> + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
> + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
> + }
> +};
> +
> +int checkboard (void)
> +{
> + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
> +
> + puts("Board: PDM360NG\n");
> +
> + /* initialize function mux & slew rate IO inter alia on IO Pins */
> +
> + iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
> +
> + /* initialize IO_CONTROL_GP (GPIO/GPT-mux-register) */
> + setbits_be32(&im->io_ctrl.io_control_gp, (1 << 0)); /* GP_MUX7->GPIO7 */
> +
> + /* configure GPIO24 (VIU_CE), output/high */
> + setbits_be32(&im->gpio.gpdir, 0x80);
> + setbits_be32(&im->gpio.gpdat, 0x80);
> +
> + return 0;
> +}
> +
> +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
> +#ifdef CONFIG_FDT_FIXUP_PARTITIONS
> +struct node_info nodes[] = {
> + { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, },
> + { "cfi-flash", MTD_DEV_TYPE_NOR, },
> +};
> +#endif
> +
> +void ft_board_setup(void *blob, bd_t *bd)
> +{
> + ft_cpu_setup(blob, bd);
> + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
> +#ifdef CONFIG_FDT_FIXUP_PARTITIONS
> + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
> +#endif
> +}
> +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
> +
> +/*
> + * Co-Processor communication POST
> + */
> +#if defined(CONFIG_POST) && defined(CONFIG_SERIAL_MULTI)
Why is this depending on SERIAL_MULTI? The POST system as such is
orthogonal, no?
> +
> +#if defined(CONFIG_SYS_POST_WORD_ADDR)
> +# define _POST_ADDR (CONFIG_SYS_POST_WORD_ADDR)
> +#else
> +#error echo "No POST word address defined"
> +#endif
> +
> +void post_word_store(ulong a)
> +{
> + volatile void *save_addr = (volatile void *)(_POST_ADDR);
> +
> + out_be32(save_addr, a);
> +}
> +
> +ulong post_word_load(void)
> +{
> + volatile void *save_addr = (volatile void *)(_POST_ADDR);
> +
> + return in_be32(save_addr);
> +}
Can't we put this into 512x shared code? I really dislike putting this
into board code. I know that 5200 set a precedent here, but they all
have identical code. One should rather fix 5200 also.
> +
> +/*
> + * Actually the termination sequence of the coprocessor
> + * commands is "\r\n" (CR LF), but here we use a side effect of
> + * the putc() routine of the serial driver which checks for LF
> + * and sends CR before sending LF. Therefore the termination
> + * sequence in the command below is only "\n".
> + * "alive" string is the coprocessor response for ping command
> + * and not a command, therefore it is terminated with "\r\n".
> + */
> +char ping[] = "$PI;2C\n";
> +char alive[] = "$AL;38\r\n";
> +
> +#define PDM360NG_COPROC_READ_DELAY 5000
> +
> +int pdm360ng_coprocessor_post_test(int flags)
> +{
> + struct stdio_dev *cop_port;
> + int ret;
> + char buf[10];
> +
> + /* Test IO Coprocessor communication */
> + cop_port = open_port(4, 38400);
> + if (!cop_port)
> + return -1;
> +
> + write_port(cop_port, ping);
> + udelay(PDM360NG_COPROC_READ_DELAY);
> +
> + memset(buf, 0, sizeof(buf));
> + ret = read_port(cop_port, buf, sizeof(buf));
> + close_port(4);
> + if (ret <= 0) {
> + post_log("Error: Can't read IO Coprocessor port.\n");
> + return -1;
> + }
> +
> + if (strcmp(buf, alive)) {
> + post_log("Error: IO-Cop. resp.: %s\n", buf);
> + return -1;
> + }
> +
> + /* Test WD Coprocessor communication */
> + cop_port = open_port(1, 38400);
> + if (!cop_port) {
> + post_log("Error: Can't open WD Coprocessor port.\n");
> + return -1;
> + }
> +
> + write_port(cop_port, ping);
> + udelay(PDM360NG_COPROC_READ_DELAY);
> +
> + memset(buf, 0, sizeof(buf));
> + ret = read_port(cop_port, buf, sizeof(buf));
> + close_port(1);
> + if (ret <= 0) {
> + post_log("Error: Can't read WD Coprocessor port.\n");
> + return -1;
> + }
> +
> + if (strcmp(buf, alive)) {
> + post_log("Error: WD-Cop. resp.: %s\n", buf);
> + return -1;
> + }
> +
> + return 0;
> +}
> +#endif /* CONFIG_POST */
Wouldn't it be a good idea to split the POST stuff into a separate file?
> +
> +#if defined(CONFIG_SERIAL_MULTI)
> +/*
> + * If argument is NULL, set the LCD brightness to the
> + * value from "brightness" environment variable. Set
> + * the LCD brightness to the value specified by the
> + * argument otherwise. Default brightness is zero.
> + */
> +#define MAX_BRIGHTNESS 99
> +static int set_lcd_brightness(char *brightness)
> +{
> + struct stdio_dev *cop_port;
> + char *env;
> + char cmd_buf[20];
> + int val = 0;
> + int cs = 0;
> + int len, i;
> +
> + if (brightness) {
> + val = simple_strtol(brightness, NULL, 10);
> + } else {
> + env = getenv("brightness");
> + if (env)
> + val = simple_strtol(env, NULL, 10);
> + }
> +
> + if (val < 0)
> + val = 0;
> +
> + if (val > MAX_BRIGHTNESS)
> + val = MAX_BRIGHTNESS;
> +
> + sprintf(cmd_buf, "$SB;%04d;", val);
> +
> + len = strlen(cmd_buf);
> + for (i = 1; i <= len; i++)
> + cs += cmd_buf[i];
> +
> + cs = (~cs + 1) & 0xff;
> + sprintf(cmd_buf + len, "%02X\n", cs);
> +
> + /* IO Coprocessor communication */
> + cop_port = open_port(4, 38400);
> + if (!cop_port) {
> + printf("Error: Can't open IO Coprocessor port.\n");
> + return -1;
> + }
> +
> + debug("%s: cmd: %s", __func__, cmd_buf);
> + write_port(cop_port, cmd_buf);
> + /*
> + * Wait for transmission and maybe response data
> + * before closing the port.
> + */
> + udelay(PDM360NG_COPROC_READ_DELAY);
> + memset(cmd_buf, 0, sizeof(cmd_buf));
> + len = read_port(cop_port, cmd_buf, sizeof(cmd_buf));
> + if (len)
> + printf("Error: %s\n", cmd_buf);
> +
> + close_port(4);
> +
> + return 0;
> +}
> +
> +static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
> + int argc, char *argv[])
> +{
> + if (argc < 2) {
> + cmd_usage(cmdtp);
> + return 1;
> + }
> +
> + return set_lcd_brightness(argv[1]);
> +}
> +
> +U_BOOT_CMD(lcdbr, 2, 1, cmd_lcd_brightness,
> + "set LCD brightness",
> + "<brightness> - set LCD backlight level to <brightness>.\n"
> +);
> +#endif /* CONFIG_SERIAL_MULTI */
> diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
> index a24f395..fc43a9d 100644
> --- a/cpu/mpc512x/diu.c
> +++ b/cpu/mpc512x/diu.c
> @@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
> unsigned long h_addr;
>
> h_addr = simple_strtoul(addr, NULL, 16);
> - if (h_addr < CONFIG_SYS_FLASH_BASE ||
> - h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
> + if ((h_addr < CONFIG_SYS_FLASH_BASE ||
> + h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
> +#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
> + && (h_addr < CONFIG_SYS_FLASH1_BASE ||
> + h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
> +#endif
> + ) {
> printf("bmp addr %lx is not a valid flash address\n", h_addr);
> return 0;
> } else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
> @@ -85,8 +90,13 @@ int mpc5121_diu_init(void)
> char *bmp = NULL;
> char *bmp_env;
>
> +#ifdef CONFIG_PDM360NG
> + xres = 800;
> + yres = 480;
> +#else
> xres = 1024;
> yres = 768;
> +#endif
> pixel_format = 0x88883316;
>
> debug("mpc5121_diu_init\n");
> diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
> new file mode 100644
> index 0000000..5e59dd1
> --- /dev/null
> +++ b/include/configs/pdm360ng.h
> @@ -0,0 +1,525 @@
> +/*
> + * (C) Copyright 2009
> + * Michael Wei?, ifm ecomatic gmbh, michael.weiss at ifm.com
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/*
> + * pdm360ng board configuration file
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#undef DEBUG
> +
> +#define CONFIG_PDM360NG 1
> +#define CONFIG_PDM360NG_BIG /* PDM360NG with big memory */
> +#undef CONFIG_PDM360NG_SMALL /* PDM360NG with small memory */
> +
> +/*
> + * Memory map for the PDM360NG board:
> + *
> + * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB)
> + * 0x2000_0000 - 0x3FFF_FFFF reserved (DDR RAM (512 MB)
> + * 0x5000_0000 - 0x5001_FFFF SRAM (128 KB)
> + * 0x5004_0000 - 0x5005_FFFF MRAM (CS2) (128 KB)
> + * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB)
> + * 0xF000_0000 - 0xF7FF_FFFF NOR FLASH (CS0) (128 MB)
> + * 0xF800_0000 - 0xFFFF_FFFF NOR FLASH (CS1) (128 MB)
> + */
> +
> +/*
> + * High Level Configuration Options
> + */
> +#define CONFIG_E300 1 /* E300 Family */
> +#define CONFIG_MPC512X 1 /* MPC512X family */
> +#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
> +#undef CONFIG_FSL_DIU_LOGO_BMP /* Don't include FSL DIU binary bmp */
> +
> +/* Used for silent command in environment */
> +#define CONFIG_SYS_DEVICE_NULLDEV
> +#define CONFIG_SILENT_CONSOLE
> +
> +/* Video */
> +#undef CONFIG_VIDEO
> +
> +#if defined(CONFIG_VIDEO)
> +#define CONFIG_CFB_CONSOLE
> +#define CONFIG_VGA_AS_SINGLE_DEVICE
> +#endif
> +
> +#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */
> +
> +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
> +#define CONFIG_MISC_INIT_R
> +
> +#define CONFIG_SYS_IMMR 0x80000000
> +#define CONFIG_SYS_DIU_ADDR ((CONFIG_SYS_IMMR) + 0x2100)
> +
> +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
> +#define CONFIG_SYS_MEMTEST_END 0x00400000
> +
> +/*
> + * DDR Setup - manually set all parameters as there's no SPD etc.
> + */
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_DDR_SIZE 512 /* MB */
> +#elif defined CONFIG_PDM360NG_SMALL
> +#define CONFIG_SYS_DDR_SIZE 128 /* MB */
> +#else
> +#error No memory configuration level defined!
> +#endif
> +#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/
> +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
> +
> +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000012 /* DDR pin mux and slew rate */
> +
> +/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
> + *
> + * SYS_CFG:
> + * [31:31] MDDRC Soft Reset: Diabled
> + * [30:30] DRAM CKE pin: Enabled
> + * [29:29] DRAM CLK: Enabled
> + * [28:28] Command Mode: Enabled (For initialization only)
> + * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
> + * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
> + * [20:19] Read Test: DON'T USE
> + * [18:18] Self Refresh: Enabled
> + * [17:17] 16bit Mode: Disabled
> + * [16:13] Read Delay: 3
> + * [12:12] Half DQS Delay: Disabled
> + * [11:11] Quarter DQS Delay: Disabled
> + * [10:08] Write Delay: 2
> + * [07:07] Early ODT: Disabled
> + * [06:06] On DIE Termination: Enabled
> + * [05:05] FIFO Overflow Clear: DON'T USE here
> + * [04:04] FIFO Underflow Clear: DON'T USE here
> + * [03:03] FIFO Overflow Pending: DON'T USE here
> + * [02:02] FIFO Underlfow Pending: DON'T USE here
> + * [01:01] FIFO Overlfow Enabled: Enabled
> + * [00:00] FIFO Underflow Enabled: Enabled
> + * TIME_CFG0
> + * [31:16] DRAM Refresh Time: 0 CSB clocks
> + * [15:8] DRAM Command Time: 0 CSB clocks
> + * [07:00] DRAM Precharge Time: 0 CSB clocks
> + * TIME_CFG1
> + * [31:26] DRAM tRFC:
> + * [25:21] DRAM tWR1:
> + * [20:17] DRAM tWRT1:
> + * [16:11] DRAM tDRR:
> + * [10:05] DRAM tRC:
> + * [04:00] DRAM tRAS:
> + * TIME_CFG2
> + * [31:28] DRAM tRCD:
> + * [27:23] DRAM tFAW:
> + * [22:19] DRAM tRTW1:
> + * [18:15] DRAM tCCD:
> + * [14:10] DRAM tRTP:
> + * [09:05] DRAM tRP:
> + * [04:00] DRAM tRPA
> + */
> +
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_MDDRC_SYS_CFG 0xEA804A40
> +#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E
> +#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168
> +#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864
> +
> +#elif defined CONFIG_PDM360NG_SMALL
> +#define CONFIG_SYS_MDDRC_SYS_CFG 0xE8604A40
> +#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E
> +#define CONFIG_SYS_MDDRC_TIME_CFG1 0x3CEC1168
> +#define CONFIG_SYS_MDDRC_TIME_CFG2 0x33310863
> +#else
> +#error No memory configuration level defined!
> +#endif
> +
> +#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000
> +
> +#define CONFIG_SYS_DDRCMD_NOP 0x01380000
> +#define CONFIG_SYS_DDRCMD_PCHG_ALL 0x01100400
> +#define CONFIG_SYS_DDRCMD_EM2 0x01020000 /* EMR2 */
> +#define CONFIG_SYS_DDRCMD_EM3 0x01030000 /* EMR3 */
> +#define CONFIG_SYS_DDRCMD_EN_DLL 0x01010040 /* EMR with 150 ohm ODT todo: verify*/
> +#define CONFIG_SYS_DDRCMD_RES_DLL 0x01000100
> +#define CONFIG_SYS_DDRCMD_RFSH 0x01080000
> +#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432
> +#define CONFIG_SYS_DDRCMD_OCD_DEFAULT 0x010107C0 /* EMR with 150 ohm ODT todo: verify*/
> +#define CONFIG_SYS_DDRCMD_OCD_EXIT 0x01010440 /* EMR new command with 150 ohm ODT todo: verify*/
> +
> +/* DDR Priority Manager Configuration */
> +#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777
> +#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000
> +#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001
> +#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC
> +#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA
> +#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666
> +#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555
> +#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444
> +#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444
> +#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555
> +#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558
> +#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122
> +#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa
> +#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa
> +#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666
> +#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666
> +#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111
> +#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111
> +
> +/*
> + * NOR FLASH on the Local Bus
> + */
> +#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
> +#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
> +
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */
> +#define CONFIG_SYS_FLASH1_BASE 0xF8000000 /* start of FLASH-Bank1 */
> +#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max flash size of FLASH-Bank0 in bytes */
> +#define CONFIG_SYS_FLASH1_SIZE 0x08000000 /* max flash size of FLASH-Bank1 in bytes */
> +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
> + /* 512 sectors with size 0x40000 for 128MB*/
> +#elif defined CONFIG_PDM360NG_SMALL
> +#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */
> +#define CONFIG_SYS_FLASH1_BASE 0xF4000000 /* start of FLASH-Bank1 */
> +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* max flash size of FLASH-Bank0 in bytes */
> +#define CONFIG_SYS_FLASH1_SIZE 0x04000000 /* max flash size of FLASH-Bank1 in bytes */
> +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */
> + /* 256 sectors with size 0x40000 for 64MB*/
> +#else
> +#error No memory configuration level defined!
> +#endif
> +
> +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
> +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
> +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE}
> +
> +#undef CONFIG_SYS_FLASH_CHECKSUM
> +
> +#define CONFIG_SYS_SRAM_BASE 0x50000000
> +#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
> +
> +#define CONFIG_SYS_CS0_CFG 0x05059350 /* ALE active low, data size 4bytes */
> +#define CONFIG_SYS_CS1_CFG 0x05059350 /* ALE active low, data size 4bytes */
> +
> +#define CONFIG_SYS_MRAM_BASE 0x50040000
> +#define CONFIG_SYS_MRAM_SIZE 0x00020000
> +#define CONFIG_SYS_CS2_CFG 0x05059150 /* ALE active low, data size 4bytes */
> +
> +#define CONFIG_SYS_CS_ALETIMING 0x00000007 /* alt. CS timing for CS0, CS1, CS2 */
> +
> +/*
> + * NAND FLASH
> + */
> +#define CONFIG_CMD_NAND /* enable NAND support */
> +#define CONFIG_NAND_MPC5121_NFC
> +#define CONFIG_SYS_NAND_BASE 0x40000000
> +
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
> +#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */
> +
> +/*
> + * Configuration parameters for MPC5121 NAND driver
> + */
> +#define CONFIG_FSL_NFC_WIDTH 1
> +#define CONFIG_FSL_NFC_WRITE_SIZE 2048
> +#define CONFIG_FSL_NFC_SPARE_SIZE 64
> +#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
> +
> +/*
> + * Dynamic MTD partition support
> + */
> +#define CONFIG_CMD_MTDPARTS
> +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
> +#define CONFIG_FLASH_CFI_MTD
> +#define MTDIDS_DEFAULT "nor0=f0000000.flash,nor1=f8000000.flash," \
> + "nand0=MPC5121 NAND"
> +
> +/*
> + * Flash layout
> + */
> +#define MTDPARTS_DEFAULT "mtdparts=f0000000.flash:512k(u-boot)," \
> + "256k(environment1)," \
> + "256k(environment2)," \
> + "256k(splash-factory)," \
> + "2m(FIT: recovery)," \
> + "4608k(fs-recovery)," \
> + "256k(splash-customer),"\
> + "5m(FIT: kernel+dtb)," \
> + "64m(rootfs squash)ro," \
> + "51m(userfs ubi);" \
> + "f8000000.flash:-(unused);" \
> + "MPC5121 NAND:1024m(extended-userfs)"
> +
> +/*
> + * Override partitions in device tree using info
> + * in mtdparts env. variable.
> + */
> +#ifdef CONFIG_CMD_MTDPARTS
> +#define CONFIG_FDT_FIXUP_PARTITIONS
> +#endif
> +
> +/* Use SRAM for initial stack */
> +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Initial RAM address */
> +#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of used area in RAM */
> +
> +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
> +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
> +#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
> +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
Isn't this shared among the 512x implementations so we can put it in a
common file?
> +
> +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
> +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
> +#ifdef CONFIG_FSL_DIU_FB
> +#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
> +#else
> +#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
> +#endif
> +
> +/*
> + * Serial Port
> + */
> +#define CONFIG_CONS_INDEX 1
> +#undef CONFIG_SERIAL_SOFTWARE_FIFO
> +
> +/*
> + * Serial console configuration
> + */
> +#define CONFIG_PSC_CONSOLE 6 /* console is on PSC6 */
> +#if CONFIG_PSC_CONSOLE != 6
> +#error CONFIG_PSC_CONSOLE must be 6
> +#endif
> +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
> +#define CONFIG_SYS_BAUDRATE_TABLE \
> + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
> +
> +#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC6_TX_SIZE
> +#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC6_TX_ADDR
> +#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC6_RX_SIZE
> +#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC6_RX_ADDR
> +
> +/*
> + * Used PSC UART devices
> + */
> +#define CONFIG_SERIAL_MULTI
> +#define CONFIG_SYS_PSC1
> +#define CONFIG_SYS_PSC4
> +#define CONFIG_SYS_PSC6
> +
> +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
> +/* Use the HUSH parser */
> +#define CONFIG_SYS_HUSH_PARSER
> +#ifdef CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> +#endif
> +
> +/* I2C */
> +#define CONFIG_HARD_I2C /* I2C with hardware support */
> +#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
> +#define CONFIG_I2C_MULTI_BUS
> +#define CONFIG_I2C_CMD_TREE
> +#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
> +#define CONFIG_SYS_I2C_SLAVE 0x7F
> +
> +/*
> + * MAC addr in EEPROM
> + */
> +#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0
> +#define CONFIG_SYS_I2C_EEPROM 0x50
> +#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10
> +
> +/*
> + * Enabled only to delete ethaddr before testing
> + * ethaddr setting from EEPROM
> + */
> +#define CONFIG_ENV_OVERWRITE
> +
> +/*
> + * IIM - IC Identification Module
> + */
> +#undef CONFIG_IIM
> +
> +/*
> + * EEPROM configuration
> + */
> +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
> +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
> +
> +/*
> + * Ethernet configuration
> + */
> +#define CONFIG_MPC512x_FEC 1
> +#define CONFIG_NET_MULTI
> +#define CONFIG_PHY_ADDR 0x1F
> +#define CONFIG_MII 1 /* MII PHY management */
> +#define CONFIG_FEC_AN_TIMEOUT 1
> +#define CONFIG_HAS_ETH0
> +
> +/*
> + * Configure on-board RTC
> + */
> +#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */
> +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
> +
> +/*
> + * Environment
> + */
> +#define CONFIG_ENV_IS_IN_FLASH 1
> +/* This has to be a multiple of the Flash sector size */
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
> +#define CONFIG_ENV_SIZE 0x2000
> +#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */
> +
> +/* Address and size of Redundant Environment Sector */
> +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
> +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
> +
> +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
> +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
> +
> +#include <config_cmd_default.h>
> +
> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_I2C
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_NFS
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_REGINFO
> +#define CONFIG_CMD_EEPROM
> +#define CONFIG_CMD_DATE
> +#undef CONFIG_CMD_FUSE
> +
> +/*
> + * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock.
> + * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set
> + * to 0xFFFF, watchdog timeouts after about 64s. For details refer
> + * to chapter 36 of the MPC5121e Reference Manual.
> + */
> +#undef CONFIG_WATCHDOG /* disable watchdog */
> +#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF
> +
> + /*
> + * Miscellaneous configurable options
> + */
> +#define CONFIG_SYS_LONGHELP /* undef to save memory */
> +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
> +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
> +
> +#ifdef CONFIG_CMD_KGDB
> + #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
> +#else
> + #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
> +#endif
> +
> +/* Print Buffer Size */
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
> +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
> +
> +/*
> + * For booting Linux, the board info and command line data
> + * have to be in the first 8 MB of memory, since this is
> + * the maximum mapped by the Linux kernel during initialization.
> + */
> +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
> +
> +/* Cache Configuration */
> +#define CONFIG_SYS_DCACHE_SIZE 32768
> +#define CONFIG_SYS_CACHELINE_SIZE 32
> +#ifdef CONFIG_CMD_KGDB
> +#define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
> +#endif
> +
> +#define CONFIG_SYS_HID0_INIT 0x000000000
> +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE)
> +#define CONFIG_SYS_HID2 HID2_HBE
> +
> +#define CONFIG_HIGH_BATS 1 /* High BATs supported */
> +
> +/*
> + * Internal Definitions
> + *
> + * Boot Flags
> + */
> +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
> +#define BOOTFLAG_WARM 0x02 /* Software reboot */
> +
> +#ifdef CONFIG_CMD_KGDB
> +#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
> +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
> +#endif
> +
> +#ifdef CONFIG_SERIAL_MULTI
> +/* POST support */
> +#define CONFIG_POST (CONFIG_SYS_POST_COPROC)
> +
> +#define CONFIG_POST_COPROC {\
> + "Coprocessors communication test", \
> + "coproc_com", \
> + "This test checks communication with coprocessors.", \
> + POST_RAM | POST_ALWAYS | POST_CRITICAL, \
> + &pdm360ng_coprocessor_post_test, \
> + NULL, \
> + NULL, \
> + CONFIG_SYS_POST_COPROC \
> + }
> +#endif
> +
> +/*
> + * Environment Configuration
> + */
> +#define CONFIG_TIMESTAMP
> +
> +#define CONFIG_HOSTNAME pdm360ng
> +#define CONFIG_LOADADDR 400000 /* default location for tftp and bootm */
> +
> +#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */
> +#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
> +
> +#define CONFIG_BAUDRATE 115200
> +
> +#define CONFIG_PREBOOT "echo;" \
> + "echo PDM360NG SAMPLE;" \
> + "echo"
> +
> +#define CONFIG_BOOTCOMMAND "run env_cont"
> +
> +#define CONFIG_OF_LIBFDT 1
> +#define CONFIG_OF_BOARD_SETUP 1
> +#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1
> +
> +#define OF_CPU "PowerPC,5121 at 0"
> +#define OF_SOC_COMPAT "fsl,mpc5121-immr"
> +#define OF_TBCLK (bd->bi_busfreq / 4)
> +#define OF_STDOUT_PATH "/soc at 80000000/serial at 11600"
> +
> +#endif /* __CONFIG_H */
> diff --git a/include/post.h b/include/post.h
> index 9fcd3ce..d147103 100644
> --- a/include/post.h
> +++ b/include/post.h
> @@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
> #define CONFIG_SYS_POST_BSPEC4 0x00080000
> #define CONFIG_SYS_POST_BSPEC5 0x00100000
> #define CONFIG_SYS_POST_CODEC 0x00200000
> +#define CONFIG_SYS_POST_COPROC 0x00400000
>
> #endif /* CONFIG_POST */
>
> diff --git a/post/tests.c b/post/tests.c
> index 3224f00..06e9dc0 100644
> --- a/post/tests.c
> +++ b/post/tests.c
> @@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
> extern int fpga_post_test (int flags);
> extern int lwmon5_watchdog_post_test(int flags);
> extern int sysmon1_post_test(int flags);
> +extern int pdm360ng_coprocessor_post_test(int flags);
>
> extern int sysmon_init_f (void);
>
> @@ -286,6 +287,9 @@ struct post_test post_list[] =
> #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
> CONFIG_POST_BSPEC5,
> #endif
> +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
> + CONFIG_POST_COPROC,
> +#endif
> };
>
> unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
Cheers
Detlev
--
And like the software patent issue, I also don't necessarily like DRM myself,
but I still ended up feeling the same: I'm an "Oppenheimer", and I refuse to
play politics with Linux, and I think you can use Linux for whatever you want
to - which very much includes things I don't necessarily personally approve
of. -- Linus Torvalds in lmkl
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps
2010-02-23 22:49 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Wolfgang Denk
@ 2010-02-24 10:03 ` Anatolij Gustschin
2010-03-22 2:32 ` Timur Tabi
0 siblings, 1 reply; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-24 10:03 UTC (permalink / raw)
To: u-boot
Hello Wolfgang,
Wolfgang Denk <wd@denx.de> wrote:
> Dear Anatolij Gustschin,
>
> In message <1266964630-7754-5-git-send-email-agust@denx.de> you wrote:
> > Allow displaying run length encoded bitmaps.
> >
> > Signed-off-by: Anatolij Gustschin <agust@denx.de>
> > ---
> > board/freescale/common/fsl_diu_fb.c | 78 +++++++++++++++++++++++++++++++++++
> > 1 files changed, 78 insertions(+), 0 deletions(-)
>
> Isn't there a way to implement this feature in common code, so all
> boards with bitmap support can benefit from this?
There is a way to do it, sure. The problem is, diu driver doesn't
use this common code. I'll rework the diu driver to do so.
Best regards,
Anatolij
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board
2010-02-24 9:06 ` Detlev Zundel
@ 2010-02-24 10:27 ` Anatolij Gustschin
0 siblings, 0 replies; 19+ messages in thread
From: Anatolij Gustschin @ 2010-02-24 10:27 UTC (permalink / raw)
To: u-boot
Hi Detlev,
Detlev Zundel <dzu@denx.de> wrote:
> > Signed-off-by: Michael Weiss michael.weiss at ifm.com
>
> Please fix the e-mail format.
Ok.
> > @@ -820,6 +820,9 @@ aria_config: unconfig
> > mecp5123_config: unconfig
> > @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
> >
> > +pdm360ng_config: unconfig
> > + @$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng
> > +
> > mpc5121ads_config \
> > mpc5121ads_rev2_config \
> > : unconfig
>
> Keep the list of targets sorted in the Makefile please.
Ok!
> > +/*
> > + * Co-Processor communication POST
> > + */
> > +#if defined(CONFIG_POST) && defined(CONFIG_SERIAL_MULTI)
>
> Why is this depending on SERIAL_MULTI? The POST system as such is
> orthogonal, no?
Currently there is only Coprocessor POST only which depends
on SERIAL_MULTI. I think I should better do something like:
#if defined(CONFIG_POST)
#if defined(CONFIG_SERIAL_MULTI)
/* Co-Processor POST code */
...
#endif
#endif
Even better would be to move POST code to separate file, it seems.
> > +
> > +#if defined(CONFIG_SYS_POST_WORD_ADDR)
> > +# define _POST_ADDR (CONFIG_SYS_POST_WORD_ADDR)
> > +#else
> > +#error echo "No POST word address defined"
> > +#endif
> > +
> > +void post_word_store(ulong a)
> > +{
> > + volatile void *save_addr = (volatile void *)(_POST_ADDR);
> > +
> > + out_be32(save_addr, a);
> > +}
> > +
> > +ulong post_word_load(void)
> > +{
> > + volatile void *save_addr = (volatile void *)(_POST_ADDR);
> > +
> > + return in_be32(save_addr);
> > +}
>
> Can't we put this into 512x shared code? I really dislike putting this
> into board code. I know that 5200 set a precedent here, but they all
> have identical code. One should rather fix 5200 also.
I'll move it to cpu/mpc512x/commproc.c.
...
> > + ret = read_port(cop_port, buf, sizeof(buf));
> > + close_port(1);
> > + if (ret <= 0) {
> > + post_log("Error: Can't read WD Coprocessor port.\n");
> > + return -1;
> > + }
> > +
> > + if (strcmp(buf, alive)) {
> > + post_log("Error: WD-Cop. resp.: %s\n", buf);
> > + return -1;
> > + }
> > +
> > + return 0;
> > +}
> > +#endif /* CONFIG_POST */
>
> Wouldn't it be a good idea to split the POST stuff into a separate file?
I'll move it to a separate file.
> > +/* Use SRAM for initial stack */
> > +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Initial RAM address */
> > +#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of used area in RAM */
> > +
> > +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
> > +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
> > +#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
> > +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
>
> Isn't this shared among the 512x implementations so we can put it in a
> common file?
Yes, we should put it in a common file.
Thanks,
Anatolij
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option
2010-02-23 22:37 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Anatolij Gustschin
@ 2010-03-21 10:25 ` Wolfgang Denk
1 sibling, 0 replies; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 10:25 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-2-git-send-email-agust@denx.de> you wrote:
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> cpu/mpc512x/fixed_sdram.c | 2 +-
> include/asm-ppc/immap_512x.h | 4 ----
> include/configs/aria.h | 2 ++
> include/configs/mecp5123.h | 2 ++
> include/configs/mpc5121ads.h | 2 ++
> 5 files changed, 7 insertions(+), 5 deletions(-)
Applied to u-boot-mpc5xxx repo, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If A equals success, then the formula is A = X + Y + Z. X is work. Y
is play. Z is keep your mouth shut. - Albert Einstein
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support
2010-02-23 22:37 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Anatolij Gustschin
@ 2010-03-21 10:25 ` Wolfgang Denk
1 sibling, 0 replies; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 10:25 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-3-git-send-email-agust@denx.de> you wrote:
> Extend mpc512x serial driver to support multiple PSCs ports.
>
> Supsequent patches for PDM360NG board support make use of this
> functionality by defining CONFIG_SERIAL_MULTI in the board config
> file. Additionally the used PSC devices are specified by defining
> e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.
>
> Support for PSC devices other than 1, 3, 4 and 6 is not added
> by this patch because these aren't used currently. In the future
> it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
> INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
> Additionally you have to add code for registering added
> devices in serial_initialise() in common/serial.c.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> common/serial.c | 23 ++++
> cpu/mpc512x/serial.c | 266 +++++++++++++++++++++++++++++++++++++-----
> include/asm-ppc/immap_512x.h | 108 +++++++++---------
> include/serial.h | 8 ++
> 4 files changed, 324 insertions(+), 81 deletions(-)
Applied to u-boot-mpc5xxx repo, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Gods don't like people not doing much work. People who aren't busy
all the time might start to _think_. - Terry Pratchett, _Small Gods_
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines
2010-02-23 22:37 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
@ 2010-03-21 10:26 ` Wolfgang Denk
1 sibling, 0 replies; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 10:26 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-4-git-send-email-agust@denx.de> you wrote:
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> cpu/mpc512x/serial.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++
> include/serial.h | 7 ++++
> 2 files changed, 94 insertions(+), 0 deletions(-)
Applied to u-boot-mpc5xxx repo, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Space is big. You just won't believe how vastly, hugely, mind-
bogglingly big it is. I mean, you may think it's a long way down the
road to the drug store, but that's just peanuts to space.
-- The Hitchhiker's Guide to the Galaxy
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
2010-02-23 22:49 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Wolfgang Denk
@ 2010-03-21 10:31 ` Wolfgang Denk
2 siblings, 0 replies; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 10:31 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-5-git-send-email-agust@denx.de> you wrote:
> Allow displaying run length encoded bitmaps.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> board/freescale/common/fsl_diu_fb.c | 78 +++++++++++++++++++++++++++++++++++
> 1 files changed, 78 insertions(+), 0 deletions(-)
Applied to u-boot-mpc5xxx repo, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The only person who always got his work done by Friday
was Robinson Crusoe.
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board Anatolij Gustschin
@ 2010-03-21 10:33 ` Wolfgang Denk
2010-03-21 17:49 ` Gerald Van Baren
1 sibling, 1 reply; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 10:33 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-6-git-send-email-agust@denx.de> you wrote:
> Allow overriding defined partitions in the device tree blob
> using partition info defined in the 'mtdparts' environment
> variable.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Cc: Gerald Van Baren <vanbaren@cideas.com>
> ---
> common/cmd_mtdparts.c | 2 +-
> common/fdt_support.c | 214 +++++++++++++++++++++++++++++++++++++++++++
> include/fdt_support.h | 2 +
> include/jffs2/load_kernel.h | 1 +
> include/mtd_node.h | 11 ++
> 5 files changed, 229 insertions(+), 1 deletions(-)
> create mode 100644 include/mtd_node.h
Applied to "next" branch, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Infidels in all ages have battled for the rights of man, and have at
all times been the fearless advocates of liberty and justice."
- Robert Green Ingersoll
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board
2010-02-23 22:37 ` [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board Anatolij Gustschin
2010-02-24 9:06 ` Detlev Zundel
@ 2010-03-21 11:03 ` Wolfgang Denk
1 sibling, 0 replies; 19+ messages in thread
From: Wolfgang Denk @ 2010-03-21 11:03 UTC (permalink / raw)
To: u-boot
Dear Anatolij Gustschin,
In message <1266964630-7754-7-git-send-email-agust@denx.de> you wrote:
> --===============1816892533==
>
> PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
>
> Signed-off-by: Michael Weiss michael.weiss at ifm.com
Incorrect mail address format.
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> MAKEALL | 1 +
> Makefile | 3 +
> board/freescale/common/fsl_diu_fb.c | 29 ++-
> board/pdm360ng/Makefile | 51 +++
> board/pdm360ng/config.mk | 24 ++
> board/pdm360ng/pdm360ng.c | 618 +++++++++++++++++++++++++++++++++++
> cpu/mpc512x/diu.c | 14 +-
> include/configs/pdm360ng.h | 525 +++++++++++++++++++++++++++++
> include/post.h | 1 +
> post/tests.c | 4 +
> 10 files changed, 1264 insertions(+), 6 deletions(-)
> create mode 100644 board/pdm360ng/Makefile
> create mode 100644 board/pdm360ng/config.mk
> create mode 100644 board/pdm360ng/pdm360ng.c
> create mode 100644 include/configs/pdm360ng.h
Entry to MAINTAINERS file is missing.
...
> +#if defined(CONFIG_HARD_I2C)
> + if (!getenv("ethaddr")) {
> + uchar buf[6];
> + char mac[18];
> + int ret;
> +
> + /* I2C-0 for on-board eeprom */
> + i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
> +
> + /* Read ethaddr from EEPROM */
> + ret = i2c_read(CONFIG_SYS_I2C_EEPROM,
> + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
> + if (!ret) {
> + sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
> + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
If you really want to do this, then please use
sprintf(mac, "%pM", buf);
instead.
> + /* Owned by IFM ? */
> + if (strstr(mac, "00:02:01") != mac) {
> + printf("Illegal MAC address in EEPROM: %s\n",
> + mac);
Why not simply a memcmp() or a strncmp() ?
> + } else {
> + debug("Using MAC from I2C EEPROM: %s\n", mac);
> + setenv("ethaddr", mac);
> + }
> + } else {
> + printf("Error: Unable to read MAC from I2C"
> + " EEPROM at address %02X:%02X\n",
> + CONFIG_SYS_I2C_EEPROM,
> + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
> + }
All this seems overly complicated to me. All these string conversions
are not really needed. Why not like this:
uchar ifm_oui[3] = { 0, 2, 1, };
ret = i2c_read(...);
if (ret != 0) {
printf("Error: Unable to read MAC from I2C"
" EEPROM at address %02X:%02X\n",
CONFIG_SYS_I2C_EEPROM,
CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
return 0;
/* or rather return 1; ??? */
}
if (memcmp(buf, ifm_oui, sizeof(ifm_oui)) {
printf("Illegal MAC address in EEPROM: %pM\n",
buf):
}
eth_setenv_enetaddr("ethaddr", buf);
> +#if defined(CONFIG_SERIAL_MULTI)
> +/*
> + * If argument is NULL, set the LCD brightness to the
> + * value from "brightness" environment variable. Set
> + * the LCD brightness to the value specified by the
> + * argument otherwise. Default brightness is zero.
> + */
> +#define MAX_BRIGHTNESS 99
> +static int set_lcd_brightness(char *brightness)
This seems wrong to me. Why does LCD related code depend on
CONFIG_SERIAL_MULTI ???
> diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
> index a24f395..fc43a9d 100644
> --- a/cpu/mpc512x/diu.c
> +++ b/cpu/mpc512x/diu.c
> @@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
> unsigned long h_addr;
>
> h_addr = simple_strtoul(addr, NULL, 16);
> - if (h_addr < CONFIG_SYS_FLASH_BASE ||
> - h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
> + if ((h_addr < CONFIG_SYS_FLASH_BASE ||
> + h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
> +#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
> + && (h_addr < CONFIG_SYS_FLASH1_BASE ||
> + h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
> +#endif
> + ) {
I don't like this. Why do we see hardcoded values here and not the
data from the CFI driver's auto-sizing? I assume both flash banks are
maped into one big contiguous array of NOR flash, right? Then there
should be just a single test for "< base || >(base+size)" here, using
the total size of the combined flash banks.
> printf("bmp addr %lx is not a valid flash address\n", h_addr);
> return 0;
And why would it be necessary that the BMP resides in NOR flash in the
first place?
Why cannot - for example - a "preboot" command be used to read it from
SDCard into RAM?
> +#ifdef CONFIG_PDM360NG
> + xres = 800;
> + yres = 480;
> +#else
> xres = 1024;
> yres = 768;
> +#endif
Please avoid the board specific #define here. check for a feature
instead (resolution = 800x400).
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#undef DEBUG
Please remove dead code.
> +#define CONFIG_PDM360NG 1
> +#define CONFIG_PDM360NG_BIG /* PDM360NG with big memory */
> +#undef CONFIG_PDM360NG_SMALL /* PDM360NG with small memory */
This makes no sense. If you want to toggle between "small" and "big"
configurations, then please use a single #define which is either set
or not set.
I don't see why this is needed at all. Does not U-Boot auto-detect the
RAM size, so you can auto-adjust all code where needed?
> +/*
> + * DDR Setup - manually set all parameters as there's no SPD etc.
> + */
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_DDR_SIZE 512 /* MB */
> +#elif defined CONFIG_PDM360NG_SMALL
> +#define CONFIG_SYS_DDR_SIZE 128 /* MB */
Please use auto-sizing with get_ram_size() instead, so a single
U-Bootimage can be used with both configurations.
> +/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
Do comment and code match?
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */
> +#define CONFIG_SYS_FLASH1_BASE 0xF8000000 /* start of FLASH-Bank1 */
> +#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max flash size of FLASH-Bank0 in bytes */
> +#define CONFIG_SYS_FLASH1_SIZE 0x08000000 /* max flash size of FLASH-Bank1 in bytes */
> +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
Lines way too long. Please fix globally.
> + * Serial Port
> + */
> +#define CONFIG_CONS_INDEX 1
> +#undef CONFIG_SERIAL_SOFTWARE_FIFO
Please do not #undef what is not defined anyway. Remove dead code.
> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_I2C
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_NFS
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_REGINFO
> +#define CONFIG_CMD_EEPROM
> +#define CONFIG_CMD_DATE
> +#undef CONFIG_CMD_FUSE
You may want to sort that list.
> +/* POST support */
> +#define CONFIG_POST (CONFIG_SYS_POST_COPROC)
> +
> +#define CONFIG_POST_COPROC {\
> + "Coprocessors communication test", \
> + "coproc_com", \
> + "This test checks communication with coprocessors.", \
> + POST_RAM | POST_ALWAYS | POST_CRITICAL, \
> + &pdm360ng_coprocessor_post_test, \
> + NULL, \
> + NULL, \
> + CONFIG_SYS_POST_COPROC \
> + }
> +#endif
This does not belong into the board config file.
> diff --git a/include/post.h b/include/post.h
> index 9fcd3ce..d147103 100644
> --- a/include/post.h
> +++ b/include/post.h
> @@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
> #define CONFIG_SYS_POST_BSPEC4 0x00080000
> #define CONFIG_SYS_POST_BSPEC5 0x00100000
> #define CONFIG_SYS_POST_CODEC 0x00200000
> +#define CONFIG_SYS_POST_COPROC 0x00400000
Please split the POST specific code out into a separate commit.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Prediction is very difficult, especially of the future. - Niels Bohr
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node
2010-03-21 10:33 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Wolfgang Denk
@ 2010-03-21 17:49 ` Gerald Van Baren
0 siblings, 0 replies; 19+ messages in thread
From: Gerald Van Baren @ 2010-03-21 17:49 UTC (permalink / raw)
To: u-boot
Wolfgang Denk wrote:
> Dear Anatolij Gustschin,
>
> In message <1266964630-7754-6-git-send-email-agust@denx.de> you wrote:
>> Allow overriding defined partitions in the device tree blob
>> using partition info defined in the 'mtdparts' environment
>> variable.
>>
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>> Cc: Gerald Van Baren <vanbaren@cideas.com>
>> ---
>> common/cmd_mtdparts.c | 2 +-
>> common/fdt_support.c | 214 +++++++++++++++++++++++++++++++++++++++++++
>> include/fdt_support.h | 2 +
>> include/jffs2/load_kernel.h | 1 +
>> include/mtd_node.h | 11 ++
>> 5 files changed, 229 insertions(+), 1 deletions(-)
>> create mode 100644 include/mtd_node.h
>
> Applied to "next" branch, thanks.
>
> Best regards,
>
> Wolfgang Denk
Thanks for applying this,
gvb
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps
2010-02-24 10:03 ` Anatolij Gustschin
@ 2010-03-22 2:32 ` Timur Tabi
0 siblings, 0 replies; 19+ messages in thread
From: Timur Tabi @ 2010-03-22 2:32 UTC (permalink / raw)
To: u-boot
On Wed, Feb 24, 2010 at 5:03 AM, Anatolij Gustschin <agust@denx.de> wrote:
>> Isn't there a way to implement this feature in common code, so all
>> boards with bitmap support can benefit from this?
>
> There is a way to do it, sure. The problem is, diu driver doesn't
> use this common code. I'll rework the diu driver to do so.
Can you be more specific? What does the DIU driver do wrong?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2010-03-22 2:32 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-02-23 22:37 [U-Boot] [PATCH 0/6] Add support for PDM360NG board Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Anatolij Gustschin
2010-02-23 22:37 ` [U-Boot] [PATCH 6/6] mpc5121: add support for PDM360NG board Anatolij Gustschin
2010-02-24 9:06 ` Detlev Zundel
2010-02-24 10:27 ` Anatolij Gustschin
2010-03-21 11:03 ` Wolfgang Denk
2010-03-21 10:33 ` [U-Boot] [PATCH 5/6] fdt_support: add partitions fixup in mtd node Wolfgang Denk
2010-03-21 17:49 ` Gerald Van Baren
2010-02-23 22:49 ` [U-Boot] [PATCH 4/6] fsl_diu_fb.c: add support for RLE8 bitmaps Wolfgang Denk
2010-02-24 10:03 ` Anatolij Gustschin
2010-03-22 2:32 ` Timur Tabi
2010-03-21 10:31 ` Wolfgang Denk
2010-03-21 10:26 ` [U-Boot] [PATCH 3/6] mpc5121: add PSC serial communication routines Wolfgang Denk
2010-03-21 10:25 ` [U-Boot] [PATCH 2/6] mpc512x: add multi serial PSC support Wolfgang Denk
2010-03-21 10:25 ` [U-Boot] [PATCH 1/6] mpc512x: make MEM IO Control configuration a board config option Wolfgang Denk
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