[PATCH 0/9] rt2x00: Align with vendor driver and add support for rt3070/rt3071/rt3090/rt3390.

[PATCH 0/9] rt2x00: Align with vendor driver and add support for rt3070/rt3071/rt3090/rt3390.

[Gertjan van Wingerde]

This patch series aligns rt2x00 with the latest versions of the Ralink 
rt2860 / rt2870 / rt3070 / rt3090 drivers, and adds support for RT3070,
RT3071, RT3090, and RT3390 based devices.

The patches are relative to wireless-next-2.6, and can also be pulled
from:

	git://git.gwingerde.nl/rt2x00-next-2.6

Gertjan van Wingerde (9):
  rt2x00: Let RF chipset decide the RF channel switch method to use in rt2800.
  rt2x00: Update rt2800 register definitions towards latest definitions.
  rt2x00: Align RT chipset definitions with vendor driver.
  rt2x00: Remove rt2800 version constants.
  rt2x00: Align rt2800 register initialization with vendor driver.
  rt2x00: Finish rt3070 support in rt2800 register initialization.
  rt2x00: Add rt3071 support in rt2800 register initialization.
  rt2x00: Add rt3090 support in rt2800 register initialization.
  rt2x00: Add rt3390 support in rt2800 register initialization.

 drivers/net/wireless/rt2x00/rt2800.h    |   64 ++++-
 drivers/net/wireless/rt2x00/rt2800lib.c |  496 ++++++++++++++++++++++---------
 drivers/net/wireless/rt2x00/rt2800pci.c |   13 -
 drivers/net/wireless/rt2x00/rt2x00.h    |    7 +-
 4 files changed, 411 insertions(+), 169 deletions(-)

[PATCH 1/9] rt2x00: Let RF chipset decide the RF channel switch method to use in rt2800.

[Gertjan van Wingerde]

It seems that the distinction between RF channel switch method is solely based
on the RF chipset that is used.
Refactor the channel switch decision to just take the RF chipset into account,
thereby greatly simplifying the check.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |   31 ++++++++++++++-----------------
 1 files changed, 14 insertions(+), 17 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index ec3ec78..6fdec15 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -717,10 +717,10 @@ static void rt2800_config_lna_gain(struct rt2x00_dev *rt2x00dev,
 	rt2x00dev->lna_gain = lna_gain;
 }
 
-static void rt2800_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
-				       struct ieee80211_conf *conf,
-				       struct rf_channel *rf,
-				       struct channel_info *info)
+static void rt2800_config_channel_rf2xxx(struct rt2x00_dev *rt2x00dev,
+					 struct ieee80211_conf *conf,
+					 struct rf_channel *rf,
+					 struct channel_info *info)
 {
 	rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 
@@ -786,10 +786,10 @@ static void rt2800_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
 	rt2800_rf_write(rt2x00dev, 4, rf->rf4);
 }
 
-static void rt2800_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
-				       struct ieee80211_conf *conf,
-				       struct rf_channel *rf,
-				       struct channel_info *info)
+static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
+					 struct ieee80211_conf *conf,
+					 struct rf_channel *rf,
+					 struct channel_info *info)
 {
 	u8 rfcsr;
 
@@ -826,16 +826,13 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
 	unsigned int tx_pin;
 	u8 bbp;
 
-	if ((rt2x00_rt(rt2x00dev, RT3070) ||
-	     rt2x00_rt(rt2x00dev, RT3090) ||
-	     rt2x00_rt(rt2x00dev, RT2872)) &&
-	    (rt2x00_rf(rt2x00dev, RF2020) ||
-	     rt2x00_rf(rt2x00dev, RF3020) ||
-	     rt2x00_rf(rt2x00dev, RF3021) ||
-	     rt2x00_rf(rt2x00dev, RF3022)))
-		rt2800_config_channel_rt3x(rt2x00dev, conf, rf, info);
+	if (rt2x00_rf(rt2x00dev, RF2020) ||
+	    rt2x00_rf(rt2x00dev, RF3020) ||
+	    rt2x00_rf(rt2x00dev, RF3021) ||
+	    rt2x00_rf(rt2x00dev, RF3022))
+		rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info);
 	else
-		rt2800_config_channel_rt2x(rt2x00dev, conf, rf, info);
+		rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info);
 
 	/*
 	 * Change BBP settings
-- 
1.7.0.4

Re: [PATCH 1/9] rt2x00: Let RF chipset decide the RF channel switch method to use in rt2800.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> It seems that the distinction between RF channel switch method is solely based
> on the RF chipset that is used.
> Refactor the channel switch decision to just take the RF chipset into account,
> thereby greatly simplifying the check.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>

[PATCH 2/9] rt2x00: Update rt2800 register definitions towards latest definitions.

[Gertjan van Wingerde]

Definitions taken from the latest rt2860 / rt2870 / rt3070 / rt3090 Ralink
vendor drivers.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800.h    |   55 +++++++++++++++++++++++++++++-
 drivers/net/wireless/rt2x00/rt2800lib.c |    2 +-
 2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 74c0433..455dc3f 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -56,6 +56,7 @@
 #define RF3021				0x0007
 #define RF3022				0x0008
 #define RF3052				0x0009
+#define RF3320				0x000b
 
 /*
  * Chipset version.
@@ -90,10 +91,16 @@
 #define NUM_TX_QUEUES			4
 
 /*
- * USB registers.
+ * Registers.
  */
 
 /*
+ * OPT_14: Unknown register used by rt3xxx devices.
+ */
+#define OPT_14_CSR			0x0114
+#define OPT_14_CSR_BIT0			FIELD32(0x00000001)
+
+/*
  * INT_SOURCE_CSR: Interrupt source register.
  * Write one to clear corresponding bit.
  * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
@@ -398,6 +405,31 @@
 #define EFUSE_DATA3			0x059c
 
 /*
+ * LDO_CFG0
+ */
+#define LDO_CFG0			0x05d4
+#define LDO_CFG0_DELAY3			FIELD32(0x000000ff)
+#define LDO_CFG0_DELAY2			FIELD32(0x0000ff00)
+#define LDO_CFG0_DELAY1			FIELD32(0x00ff0000)
+#define LDO_CFG0_BGSEL			FIELD32(0x03000000)
+#define LDO_CFG0_LDO_CORE_VLEVEL	FIELD32(0x1c000000)
+#define LD0_CFG0_LDO25_LEVEL		FIELD32(0x60000000)
+#define LDO_CFG0_LDO25_LARGEA		FIELD32(0x80000000)
+
+/*
+ * GPIO_SWITCH
+ */
+#define GPIO_SWITCH			0x05dc
+#define GPIO_SWITCH_0			FIELD32(0x00000001)
+#define GPIO_SWITCH_1			FIELD32(0x00000002)
+#define GPIO_SWITCH_2			FIELD32(0x00000004)
+#define GPIO_SWITCH_3			FIELD32(0x00000008)
+#define GPIO_SWITCH_4			FIELD32(0x00000010)
+#define GPIO_SWITCH_5			FIELD32(0x00000020)
+#define GPIO_SWITCH_6			FIELD32(0x00000040)
+#define GPIO_SWITCH_7			FIELD32(0x00000080)
+
+/*
  * MAC Control/Status Registers(CSR).
  * Some values are set in TU, whereas 1 TU == 1024 us.
  */
@@ -1492,6 +1524,14 @@ struct mac_iveiv_entry {
 #define BBP4_BANDWIDTH			FIELD8(0x18)
 
 /*
+ * BBP 138: Unknown
+ */
+#define BBP138_RX_ADC1			FIELD8(0x02)
+#define BBP138_RX_ADC2			FIELD8(0x04)
+#define BBP138_TX_DAC1			FIELD8(0x20)
+#define BBP138_TX_DAC2			FIELD8(0x40)
+
+/*
  * RFCSR registers
  * The wordsize of the RFCSR is 8 bits.
  */
@@ -1499,7 +1539,8 @@ struct mac_iveiv_entry {
 /*
  * RFCSR 6:
  */
-#define RFCSR6_R			FIELD8(0x03)
+#define RFCSR6_R1			FIELD8(0x03)
+#define RFCSR6_R2			FIELD8(0x40)
 
 /*
  * RFCSR 7:
@@ -1512,6 +1553,14 @@ struct mac_iveiv_entry {
 #define RFCSR12_TX_POWER		FIELD8(0x1f)
 
 /*
+ * RFCSR 17:
+ */
+#define RFCSR17_R1			FIELD8(0x07)
+#define RFCSR17_R2			FIELD8(0x08)
+#define RFCSR17_R3			FIELD8(0x20)
+
+
+/*
  * RFCSR 22:
  */
 #define RFCSR22_BASEBAND_LOOPBACK	FIELD8(0x01)
@@ -1603,6 +1652,8 @@ struct mac_iveiv_entry {
 #define EEPROM_NIC_WPS_PBC		FIELD16(0x0080)
 #define EEPROM_NIC_BW40M_BG		FIELD16(0x0100)
 #define EEPROM_NIC_BW40M_A		FIELD16(0x0200)
+#define EEPROM_NIC_ANT_DIVERSITY	FIELD16(0x0800)
+#define EEPROM_NIC_DAC_TEST		FIELD16(0x8000)
 
 /*
  * EEPROM frequency
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 6fdec15..394c8e4 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -797,7 +797,7 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
 	rt2800_rfcsr_write(rt2x00dev, 3, rf->rf3);
 
 	rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
-	rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
+	rt2x00_set_field8(&rfcsr, RFCSR6_R1, rf->rf2);
 	rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
 
 	rt2800_rfcsr_read(rt2x00dev, 12, &rfcsr);
-- 
1.7.0.4

Re: [PATCH 2/9] rt2x00: Update rt2800 register definitions towards latest definitions.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Definitions taken from the latest rt2860 / rt2870 / rt3070 / rt3090 Ralink
> vendor drivers.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>

[PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Gertjan van Wingerde]

Only include definitions for RT chipsets that are also used inside the
Ralink vendor drivers.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
 drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
 2 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 394c8e4..4bc7e09 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
 	if ((rt2x00_rt(rt2x00dev, RT2872) &&
 	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
-	    rt2x00_rt(rt2x00dev, RT2880) ||
 	    rt2x00_rt(rt2x00dev, RT2883) ||
-	    rt2x00_rt(rt2x00dev, RT2890) ||
-	    rt2x00_rt(rt2x00dev, RT3052) ||
 	    (rt2x00_rt(rt2x00dev, RT3070) &&
 	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
 		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
@@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 		rt2800_bbp_write(rt2x00dev, 105, 0x05);
 	}
 
-	if (rt2x00_rt(rt2x00dev, RT3052)) {
-		rt2800_bbp_write(rt2x00dev, 31, 0x08);
-		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
-		rt2800_bbp_write(rt2x00dev, 80, 0x08);
-	}
-
 	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
 
@@ -1772,7 +1763,6 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 	} else if (rt2x00_rt(rt2x00dev, RT2860) ||
 		   rt2x00_rt(rt2x00dev, RT2870) ||
 		   rt2x00_rt(rt2x00dev, RT2872) ||
-		   rt2x00_rt(rt2x00dev, RT2880) ||
 		   (rt2x00_rt(rt2x00dev, RT2883) &&
 		    (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
 		/*
@@ -1879,10 +1869,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
 	if (!rt2x00_rt(rt2x00dev, RT2860) &&
 	    !rt2x00_rt(rt2x00dev, RT2870) &&
 	    !rt2x00_rt(rt2x00dev, RT2872) &&
-	    !rt2x00_rt(rt2x00dev, RT2880) &&
 	    !rt2x00_rt(rt2x00dev, RT2883) &&
-	    !rt2x00_rt(rt2x00dev, RT2890) &&
-	    !rt2x00_rt(rt2x00dev, RT3052) &&
 	    !rt2x00_rt(rt2x00dev, RT3070) &&
 	    !rt2x00_rt(rt2x00dev, RT3071) &&
 	    !rt2x00_rt(rt2x00dev, RT3090) &&
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index d9daa9c..16aa850 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -177,16 +177,15 @@ struct rt2x00_chip {
 #define RT2573		0x2573
 #define RT2860		0x2860	/* 2.4GHz PCI/CB */
 #define RT2870		0x2870
-#define RT2872		0x2872
-#define RT2880		0x2880	/* WSOC */
+#define RT2872		0x2872	/* WSOC */
 #define RT2883		0x2883	/* WSOC */
-#define RT2890		0x2890	/* 2.4GHz PCIe */
-#define RT3052		0x3052	/* WSOC */
 #define RT3070		0x3070
 #define RT3071		0x3071
 #define RT3090		0x3090	/* 2.4GHz PCIe */
 #define RT3390		0x3390
 #define RT3572		0x3572
+#define RT3593		0x3593	/* PCIe */
+#define RT3883		0x3883	/* WSOC */
 
 	u16 rf;
 	u16 rev;
-- 
1.7.0.4

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Felix Fietkau]

On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
> Only include definitions for RT chipsets that are also used inside the
> Ralink vendor drivers.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> ---
>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>  2 files changed, 3 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> index 394c8e4..4bc7e09 100644
> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>  	    rt2x00_rt(rt2x00dev, RT2883) ||
> -	    rt2x00_rt(rt2x00dev, RT2890) ||
> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>  	}
>  
> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
> -	}
> -
Why are you removing support for RT3052? IMHO those writes were
necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.

- Felix

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Gertjan van Wingerde]

On 04/09/10 00:28, Felix Fietkau wrote:
> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>> Only include definitions for RT chipsets that are also used inside the
>> Ralink vendor drivers.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>> ---
>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>> index 394c8e4..4bc7e09 100644
>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>  	}
>>  
>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>> -	}
>> -
> Why are you removing support for RT3052? IMHO those writes were
> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.

That is because I have not been able to find them in any of the Ralink vendor drivers.
Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
RT2872 devices, but even for them I haven't found these BBP initializations.
That's why I removed this part.

I have no problem re-instating this if I can find some evidence that these devices
actually exist.

---
Gertjan.

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Gertjan van Wingerde]

On 04/09/10 07:10, Gertjan van Wingerde wrote:
> On 04/09/10 00:28, Felix Fietkau wrote:
>> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>>> Only include definitions for RT chipsets that are also used inside the
>>> Ralink vendor drivers.
>>>
>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>> ---
>>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>>
>>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> index 394c8e4..4bc7e09 100644
>>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>>  	}
>>>  
>>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>>> -	}
>>> -
>> Why are you removing support for RT3052? IMHO those writes were
>> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> 
> That is because I have not been able to find them in any of the Ralink vendor drivers.
> Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> RT2872 devices, but even for them I haven't found these BBP initializations.
> That's why I removed this part.
> 
> I have no problem re-instating this if I can find some evidence that these devices
> actually exist.
> 

Hold on, I seem to have found something here. And there are more things to be set, according
to the code I found. However, that code is unclear with respect to how the chip identifies
itself.

Is it possible for you to found out on you RT3052 WiSoC how the chip identifies itself
(i.e. what is the contents of the MAC_CSR0 register)?

Helmut, Luis, I know you guys have been experimenting with WiSoC devices as well, what kind
of devices do you have, and how do these identify themselves?

---
Gertjan

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Helmut Schaa]

Am Freitag 09 April 2010 schrieb Gertjan van Wingerde:
> On 04/09/10 07:10, Gertjan van Wingerde wrote:
> > On 04/09/10 00:28, Felix Fietkau wrote:
> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
> >>> Only include definitions for RT chipsets that are also used inside the
> >>> Ralink vendor drivers.
> >>>
> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> >>> ---
> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
> >>>
> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> index 394c8e4..4bc7e09 100644
> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
> >>>  	}
> >>>  
> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
> >>> -	}
> >>> -
> >> Why are you removing support for RT3052? IMHO those writes were
> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> > 
> > That is because I have not been able to find them in any of the Ralink vendor drivers.
> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> > RT2872 devices, but even for them I haven't found these BBP initializations.
> > That's why I removed this part.
> > 
> > I have no problem re-instating this if I can find some evidence that these devices
> > actually exist.
> > 
> 
> Hold on, I seem to have found something here. And there are more things to be set, according
> to the code I found. However, that code is unclear with respect to how the chip identifies
> itself.
> 
> Is it possible for you to found out on you RT3052 WiSoC how the chip identifies itself
> (i.e. what is the contents of the MAC_CSR0 register)?
> 
> Helmut, Luis, I know you guys have been experimenting with WiSoC devices as well, what kind
> of devices do you have, and how do these identify themselves?

I've got two different devices and both use the same rt chipset 2872, one has
a rf 3020 (1T1R) and the other one a rf 3022 (2T2R).

Helmut

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Felix Fietkau]

On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
> On 04/09/10 00:28, Felix Fietkau wrote:
>> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>>> Only include definitions for RT chipsets that are also used inside the
>>> Ralink vendor drivers.
>>>
>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>> ---
>>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>>
>>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> index 394c8e4..4bc7e09 100644
>>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>>  	}
>>>  
>>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>>> -	}
>>> -
>> Why are you removing support for RT3052? IMHO those writes were
>> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> 
> That is because I have not been able to find them in any of the Ralink vendor drivers.
> Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> RT2872 devices, but even for them I haven't found these BBP initializations.
> That's why I removed this part.
> 
> I have no problem re-instating this if I can find some evidence that these devices
> actually exist.
These chipsets won't show up in STA-only drivers, because they belong to
embedded APs. If you download GPL sources for devices such as ASUS
RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
values in BBPRegTable in the driver sources.
I have a few devices based on RT3052, which is why I added this code.
At some point I even had basic Rx/Tx working on it, but haven't tested
in a while.

- Felix

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Helmut Schaa]

Am Freitag 09 April 2010 schrieb Felix Fietkau:
> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
> > On 04/09/10 00:28, Felix Fietkau wrote:
> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
> >>> Only include definitions for RT chipsets that are also used inside the
> >>> Ralink vendor drivers.
> >>>
> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> >>> ---
> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
> >>>
> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> index 394c8e4..4bc7e09 100644
> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
> >>>  	}
> >>>  
> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
> >>> -	}
> >>> -
> >> Why are you removing support for RT3052? IMHO those writes were
> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> > 
> > That is because I have not been able to find them in any of the Ralink vendor drivers.
> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> > RT2872 devices, but even for them I haven't found these BBP initializations.
> > That's why I removed this part.
> > 
> > I have no problem re-instating this if I can find some evidence that these devices
> > actually exist.
> These chipsets won't show up in STA-only drivers, because they belong to
> embedded APs. If you download GPL sources for devices such as ASUS
> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
> values in BBPRegTable in the driver sources.
> I have a few devices based on RT3052, which is why I added this code.
> At some point I even had basic Rx/Tx working on it, but haven't tested
> in a while.

I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
However, the ralink drivers defines a 3052 _rf_ chip:

#define RFIC_3052                   9       // 2.4G/5G 2T2R

I don't have such an rf chip in my devices but I don't think the BPP
register setup should depend on the actual rf chip. So, if the register
setup is really needed we should maybe check for rt2x00_is_soc instead
of removing the code?

I couldn't test yet if the bpp register setup makes any difference here.

Helmut

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Felix Fietkau]

On 2010-04-09 1:32 PM, Helmut Schaa wrote:
> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
>> > On 04/09/10 00:28, Felix Fietkau wrote:
>> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>> >>> Only include definitions for RT chipsets that are also used inside the
>> >>> Ralink vendor drivers.
>> >>>
>> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>> >>> ---
>> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
>> >>>
>> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>> >>> index 394c8e4..4bc7e09 100644
>> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>> >>>  	}
>> >>>  
>> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>> >>> -	}
>> >>> -
>> >> Why are you removing support for RT3052? IMHO those writes were
>> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
>> > 
>> > That is because I have not been able to find them in any of the Ralink vendor drivers.
>> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
>> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
>> > RT2872 devices, but even for them I haven't found these BBP initializations.
>> > That's why I removed this part.
>> > 
>> > I have no problem re-instating this if I can find some evidence that these devices
>> > actually exist.
>> These chipsets won't show up in STA-only drivers, because they belong to
>> embedded APs. If you download GPL sources for devices such as ASUS
>> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
>> values in BBPRegTable in the driver sources.
>> I have a few devices based on RT3052, which is why I added this code.
>> At some point I even had basic Rx/Tx working on it, but haven't tested
>> in a while.
> 
> I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
> However, the ralink drivers defines a 3052 _rf_ chip:
> 
> #define RFIC_3052                   9       // 2.4G/5G 2T2R
RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
of it. Since wifi is integrated in the SoC, I don't think there is a
separate name for just the wifi part.

> I don't have such an rf chip in my devices but I don't think the BPP
> register setup should depend on the actual rf chip. So, if the register
> setup is really needed we should maybe check for rt2x00_is_soc instead
> of removing the code?
Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
slightly different compared to RT3052. I've only tested RT3052 myself.

- Felix

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Helmut Schaa]

Am Freitag 09 April 2010 schrieb Felix Fietkau:
> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
> > Am Freitag 09 April 2010 schrieb Felix Fietkau:
> >> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
> >> > On 04/09/10 00:28, Felix Fietkau wrote:
> >> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
> >> >>> Only include definitions for RT chipsets that are also used inside the
> >> >>> Ralink vendor drivers.
> >> >>>
> >> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> >> >>> ---
> >> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
> >> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
> >> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
> >> >>>
> >> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >>> index 394c8e4..4bc7e09 100644
> >> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
> >> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
> >> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
> >> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
> >> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
> >> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
> >> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
> >> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
> >> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
> >> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
> >> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
> >> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
> >> >>>  	}
> >> >>>  
> >> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
> >> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
> >> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
> >> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
> >> >>> -	}
> >> >>> -
> >> >> Why are you removing support for RT3052? IMHO those writes were
> >> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> >> > 
> >> > That is because I have not been able to find them in any of the Ralink vendor drivers.
> >> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> >> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> >> > RT2872 devices, but even for them I haven't found these BBP initializations.
> >> > That's why I removed this part.
> >> > 
> >> > I have no problem re-instating this if I can find some evidence that these devices
> >> > actually exist.
> >> These chipsets won't show up in STA-only drivers, because they belong to
> >> embedded APs. If you download GPL sources for devices such as ASUS
> >> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
> >> values in BBPRegTable in the driver sources.
> >> I have a few devices based on RT3052, which is why I added this code.
> >> At some point I even had basic Rx/Tx working on it, but haven't tested
> >> in a while.
> > 
> > I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
> > However, the ralink drivers defines a 3052 _rf_ chip:
> > 
> > #define RFIC_3052                   9       // 2.4G/5G 2T2R
> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
> of it. Since wifi is integrated in the SoC, I don't think there is a
> separate name for just the wifi part.

There is. I have one 3052 and one 3050 board (basically a 3052 but only
1T1R), and both identify themselves as RT2872 with different rf "chips"
(of course, there are no additional chips). Hence, the check for RT3052
was never true on both platforms.

> > I don't have such an rf chip in my devices but I don't think the BPP
> > register setup should depend on the actual rf chip. So, if the register
> > setup is really needed we should maybe check for rt2x00_is_soc instead
> > of removing the code?
> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
> slightly different compared to RT3052. I've only tested RT3052 myself.

Right. So, from what I've seen so far it seems like all 305x boards identify
themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
check and leave the code as is.

Helmut

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Felix Fietkau]

On 2010-04-09 2:23 PM, Helmut Schaa wrote:
> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
>> > Am Freitag 09 April 2010 schrieb Felix Fietkau:
>> >> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
>> >> > On 04/09/10 00:28, Felix Fietkau wrote:
>> >> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>> >> >>> Only include definitions for RT chipsets that are also used inside the
>> >> >>> Ralink vendor drivers.
>> >> >>>
>> >> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>> >> >>> ---
>> >> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>> >> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>> >> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
>> >> >>>
>> >> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>> >> >>> index 394c8e4..4bc7e09 100644
>> >> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>> >> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>> >> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>> >> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>> >> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>> >> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>> >> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>> >> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>> >> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>> >> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>> >> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>> >> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>> >> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>> >> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>> >> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>> >> >>>  	}
>> >> >>>  
>> >> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>> >> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>> >> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>> >> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>> >> >>> -	}
>> >> >>> -
>> >> >> Why are you removing support for RT3052? IMHO those writes were
>> >> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
>> >> > 
>> >> > That is because I have not been able to find them in any of the Ralink vendor drivers.
>> >> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
>> >> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
>> >> > RT2872 devices, but even for them I haven't found these BBP initializations.
>> >> > That's why I removed this part.
>> >> > 
>> >> > I have no problem re-instating this if I can find some evidence that these devices
>> >> > actually exist.
>> >> These chipsets won't show up in STA-only drivers, because they belong to
>> >> embedded APs. If you download GPL sources for devices such as ASUS
>> >> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
>> >> values in BBPRegTable in the driver sources.
>> >> I have a few devices based on RT3052, which is why I added this code.
>> >> At some point I even had basic Rx/Tx working on it, but haven't tested
>> >> in a while.
>> > 
>> > I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
>> > However, the ralink drivers defines a 3052 _rf_ chip:
>> > 
>> > #define RFIC_3052                   9       // 2.4G/5G 2T2R
>> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
>> of it. Since wifi is integrated in the SoC, I don't think there is a
>> separate name for just the wifi part.
> 
> There is. I have one 3052 and one 3050 board (basically a 3052 but only
> 1T1R), and both identify themselves as RT2872 with different rf "chips"
> (of course, there are no additional chips). Hence, the check for RT3052
> was never true on both platforms.
Back when I tested it, I forced the chip to identify itself as RT3052 by
taking the id from the platform device.

>> > I don't have such an rf chip in my devices but I don't think the BPP
>> > register setup should depend on the actual rf chip. So, if the register
>> > setup is really needed we should maybe check for rt2x00_is_soc instead
>> > of removing the code?
>> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
>> slightly different compared to RT3052. I've only tested RT3052 myself.
> 
> Right. So, from what I've seen so far it seems like all 305x boards identify
> themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
> check and leave the code as is.
OK, if that doesn't conflict with any PCI based stuff...

- Felix

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Luis Correia]

On Fri, Apr 9, 2010 at 13:26, Felix Fietkau <nbd@openwrt.org> wrote:
> On 2010-04-09 2:23 PM, Helmut Schaa wrote:
>> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
>>> > Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>> >> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
>>> >> > On 04/09/10 00:28, Felix Fietkau wrote:
>>> >> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>>> >> >>> Only include definitions for RT chipsets that are also used inside the
>>> >> >>> Ralink vendor drivers.
>>> >> >>>
>>> >> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>> >> >>> ---
>>> >> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>> >> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>> >> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>> >> >>>
>>> >> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> >> >>> index 394c8e4..4bc7e09 100644
>>> >> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>>> >> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>>> >> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>> >> >>>       rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>> >> >>>       if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>> >> >>>            (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>>> >> >>> -         rt2x00_rt(rt2x00dev, RT2880) ||
>>> >> >>>           rt2x00_rt(rt2x00dev, RT2883) ||
>>> >> >>> -         rt2x00_rt(rt2x00dev, RT2890) ||
>>> >> >>> -         rt2x00_rt(rt2x00dev, RT3052) ||
>>> >> >>>           (rt2x00_rt(rt2x00dev, RT3070) &&
>>> >> >>>            (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>> >> >>>               rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>>> >> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>> >> >>>               rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>> >> >>>       }
>>> >> >>>
>>> >> >>> -     if (rt2x00_rt(rt2x00dev, RT3052)) {
>>> >> >>> -             rt2800_bbp_write(rt2x00dev, 31, 0x08);
>>> >> >>> -             rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>>> >> >>> -             rt2800_bbp_write(rt2x00dev, 80, 0x08);
>>> >> >>> -     }
>>> >> >>> -
>>> >> >> Why are you removing support for RT3052? IMHO those writes were
>>> >> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
>>> >> >
>>> >> > That is because I have not been able to find them in any of the Ralink vendor drivers.
>>> >> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
>>> >> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
>>> >> > RT2872 devices, but even for them I haven't found these BBP initializations.
>>> >> > That's why I removed this part.
>>> >> >
>>> >> > I have no problem re-instating this if I can find some evidence that these devices
>>> >> > actually exist.
>>> >> These chipsets won't show up in STA-only drivers, because they belong to
>>> >> embedded APs. If you download GPL sources for devices such as ASUS
>>> >> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
>>> >> values in BBPRegTable in the driver sources.
>>> >> I have a few devices based on RT3052, which is why I added this code.
>>> >> At some point I even had basic Rx/Tx working on it, but haven't tested
>>> >> in a while.
>>> >
>>> > I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
>>> > However, the ralink drivers defines a 3052 _rf_ chip:
>>> >
>>> > #define RFIC_3052                   9       // 2.4G/5G 2T2R
>>> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
>>> of it. Since wifi is integrated in the SoC, I don't think there is a
>>> separate name for just the wifi part.
>>
>> There is. I have one 3052 and one 3050 board (basically a 3052 but only
>> 1T1R), and both identify themselves as RT2872 with different rf "chips"
>> (of course, there are no additional chips). Hence, the check for RT3052
>> was never true on both platforms.
> Back when I tested it, I forced the chip to identify itself as RT3052 by
> taking the id from the platform device.
>
>>> > I don't have such an rf chip in my devices but I don't think the BPP
>>> > register setup should depend on the actual rf chip. So, if the register
>>> > setup is really needed we should maybe check for rt2x00_is_soc instead
>>> > of removing the code?
>>> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
>>> slightly different compared to RT3052. I've only tested RT3052 myself.
>>
>> Right. So, from what I've seen so far it seems like all 305x boards identify
>> themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
>> check and leave the code as is.
> OK, if that doesn't conflict with any PCI based stuff...

I have a rt2880 based SOC device, my main AP Minitar, I'll hook up the
console to it and report what RT-RF chipset combination it has.

>
> - Felix
> --

Luis Correia

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Gabor Juhos]

Luis Correia írta:
> On Fri, Apr 9, 2010 at 13:26, Felix Fietkau <nbd@openwrt.org> wrote:
>> On 2010-04-09 2:23 PM, Helmut Schaa wrote:
>>> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>>> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
>>>>> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>>>>> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
>>>>>>> On 04/09/10 00:28, Felix Fietkau wrote:
>>>>>>>> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>>>>>>>>> Only include definitions for RT chipsets that are also used inside the
>>>>>>>>> Ralink vendor drivers.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>>>>>>> ---
>>>>>>>>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>>>>>>>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>>>>>>>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>>>>>>>>
>>>>>>>>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> index 394c8e4..4bc7e09 100644
>>>>>>>>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>>>>>>>>       rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>>>>>>>>       if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>>>>>>>>            (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>>>>>>>>> -         rt2x00_rt(rt2x00dev, RT2880) ||
>>>>>>>>>           rt2x00_rt(rt2x00dev, RT2883) ||
>>>>>>>>> -         rt2x00_rt(rt2x00dev, RT2890) ||
>>>>>>>>> -         rt2x00_rt(rt2x00dev, RT3052) ||
>>>>>>>>>           (rt2x00_rt(rt2x00dev, RT3070) &&
>>>>>>>>>            (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>>>>>>>>               rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>>>>>>>>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>>>>>>>>               rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>>>>>>>>       }
>>>>>>>>>
>>>>>>>>> -     if (rt2x00_rt(rt2x00dev, RT3052)) {
>>>>>>>>> -             rt2800_bbp_write(rt2x00dev, 31, 0x08);
>>>>>>>>> -             rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>>>>>>>>> -             rt2800_bbp_write(rt2x00dev, 80, 0x08);
>>>>>>>>> -     }
>>>>>>>>> -
>>>>>>>> Why are you removing support for RT3052? IMHO those writes were
>>>>>>>> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
>>>>>>> That is because I have not been able to find them in any of the Ralink vendor drivers.
>>>>>>> Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
>>>>>>> as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
>>>>>>> RT2872 devices, but even for them I haven't found these BBP initializations.
>>>>>>> That's why I removed this part.
>>>>>>>
>>>>>>> I have no problem re-instating this if I can find some evidence that these devices
>>>>>>> actually exist.
>>>>>> These chipsets won't show up in STA-only drivers, because they belong to
>>>>>> embedded APs. If you download GPL sources for devices such as ASUS
>>>>>> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
>>>>>> values in BBPRegTable in the driver sources.
>>>>>> I have a few devices based on RT3052, which is why I added this code.
>>>>>> At some point I even had basic Rx/Tx working on it, but haven't tested
>>>>>> in a while.
>>>>> I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
>>>>> However, the ralink drivers defines a 3052 _rf_ chip:
>>>>>
>>>>> #define RFIC_3052                   9       // 2.4G/5G 2T2R
>>>> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
>>>> of it. Since wifi is integrated in the SoC, I don't think there is a
>>>> separate name for just the wifi part.
>>> There is. I have one 3052 and one 3050 board (basically a 3052 but only
>>> 1T1R), and both identify themselves as RT2872 with different rf "chips"
>>> (of course, there are no additional chips). Hence, the check for RT3052
>>> was never true on both platforms.
>> Back when I tested it, I forced the chip to identify itself as RT3052 by
>> taking the id from the platform device.
>>
>>>>> I don't have such an rf chip in my devices but I don't think the BPP
>>>>> register setup should depend on the actual rf chip. So, if the register
>>>>> setup is really needed we should maybe check for rt2x00_is_soc instead
>>>>> of removing the code?
>>>> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
>>>> slightly different compared to RT3052. I've only tested RT3052 myself.
>>> Right. So, from what I've seen so far it seems like all 305x boards identify
>>> themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
>>> check and leave the code as is.
>> OK, if that doesn't conflict with any PCI based stuff...
> 
> I have a rt2880 based SOC device, my main AP Minitar, I'll hook up the
> console to it and report what RT-RF chipset combination it has.

The ASUS RT-N15 says this:

root@OpenWrt:/# cat /proc/cpuinfo
system type             : Ralink RT2880   id:2 rev:1
machine                 : Asus RT-N15
processor               : 0
cpu model               : MIPS 4KEc V6.12
BogoMIPS                : 266.24
wait instruction        : yes
microsecond timers      : yes
tlb_entries             : 16
extra interrupt vector  : yes
hardware watchpoint     : yes, count: 0, address/irw mask: []
ASEs implemented        : mips16
shadow register sets    : 1
core                    : 0
VCED exceptions         : not available
VCEI exceptions         : not available

root@OpenWrt:/# cat /sys/kernel/debug/ieee80211/phy0/rt2800pci/chipset
rt chip:        2872
rf chip:        0001
revision:       0200

register        base    words   wordsize
csr     4096    512     4
eeprom  0       136     2
bbp     0       128     1
rf      4       4       4
root@OpenWrt:/#

-Gabor

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Helmut Schaa]

Am Freitag 09 April 2010 schrieb Felix Fietkau:
> On 2010-04-09 2:23 PM, Helmut Schaa wrote:
> > Am Freitag 09 April 2010 schrieb Felix Fietkau:
> >> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
> >> > Am Freitag 09 April 2010 schrieb Felix Fietkau:
> >> >> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
> >> >> > On 04/09/10 00:28, Felix Fietkau wrote:
> >> >> >> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
> >> >> >>> Only include definitions for RT chipsets that are also used inside the
> >> >> >>> Ralink vendor drivers.
> >> >> >>>
> >> >> >>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> >> >> >>> ---
> >> >> >>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
> >> >> >>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
> >> >> >>>  2 files changed, 3 insertions(+), 17 deletions(-)
> >> >> >>>
> >> >> >>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >> >>> index 394c8e4..4bc7e09 100644
> >> >> >>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >> >>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> >> >> >>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >> >> >>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
> >> >> >>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
> >> >> >>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
> >> >> >>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
> >> >> >>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
> >> >> >>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
> >> >> >>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
> >> >> >>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
> >> >> >>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
> >> >> >>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
> >> >> >>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
> >> >> >>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
> >> >> >>>  	}
> >> >> >>>  
> >> >> >>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
> >> >> >>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
> >> >> >>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
> >> >> >>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
> >> >> >>> -	}
> >> >> >>> -
> >> >> >> Why are you removing support for RT3052? IMHO those writes were
> >> >> >> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
> >> >> > 
> >> >> > That is because I have not been able to find them in any of the Ralink vendor drivers.
> >> >> > Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
> >> >> > as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
> >> >> > RT2872 devices, but even for them I haven't found these BBP initializations.
> >> >> > That's why I removed this part.
> >> >> > 
> >> >> > I have no problem re-instating this if I can find some evidence that these devices
> >> >> > actually exist.
> >> >> These chipsets won't show up in STA-only drivers, because they belong to
> >> >> embedded APs. If you download GPL sources for devices such as ASUS
> >> >> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
> >> >> values in BBPRegTable in the driver sources.
> >> >> I have a few devices based on RT3052, which is why I added this code.
> >> >> At some point I even had basic Rx/Tx working on it, but haven't tested
> >> >> in a while.
> >> > 
> >> > I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
> >> > However, the ralink drivers defines a 3052 _rf_ chip:
> >> > 
> >> > #define RFIC_3052                   9       // 2.4G/5G 2T2R
> >> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
> >> of it. Since wifi is integrated in the SoC, I don't think there is a
> >> separate name for just the wifi part.
> > 
> > There is. I have one 3052 and one 3050 board (basically a 3052 but only
> > 1T1R), and both identify themselves as RT2872 with different rf "chips"
> > (of course, there are no additional chips). Hence, the check for RT3052
> > was never true on both platforms.
> Back when I tested it, I forced the chip to identify itself as RT3052 by
> taking the id from the platform device.

Ah, understood.

> >> > I don't have such an rf chip in my devices but I don't think the BPP
> >> > register setup should depend on the actual rf chip. So, if the register
> >> > setup is really needed we should maybe check for rt2x00_is_soc instead
> >> > of removing the code?
> >> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
> >> slightly different compared to RT3052. I've only tested RT3052 myself.
> > 
> > Right. So, from what I've seen so far it seems like all 305x boards identify
> > themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
> > check and leave the code as is.
> OK, if that doesn't conflict with any PCI based stuff...

According to Gertjan there seems to be no none-SOC adapter which identifies
itself like that. So I guess that should be safe.

Thanks,
Helmut

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Gertjan van Wingerde]

On 04/09/10 14:32, Helmut Schaa wrote:
> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>> On 2010-04-09 2:23 PM, Helmut Schaa wrote:
>>> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>>> On 2010-04-09 1:32 PM, Helmut Schaa wrote:
>>>>> Am Freitag 09 April 2010 schrieb Felix Fietkau:
>>>>>> On 2010-04-09 7:10 AM, Gertjan van Wingerde wrote:
>>>>>>> On 04/09/10 00:28, Felix Fietkau wrote:
>>>>>>>> On 2010-04-08 11:50 PM, Gertjan van Wingerde wrote:
>>>>>>>>> Only include definitions for RT chipsets that are also used inside the
>>>>>>>>> Ralink vendor drivers.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>>>>>>> ---
>>>>>>>>>  drivers/net/wireless/rt2x00/rt2800lib.c |   13 -------------
>>>>>>>>>  drivers/net/wireless/rt2x00/rt2x00.h    |    7 +++----
>>>>>>>>>  2 files changed, 3 insertions(+), 17 deletions(-)
>>>>>>>>>
>>>>>>>>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> index 394c8e4..4bc7e09 100644
>>>>>>>>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>>>>>>>>> @@ -1209,10 +1209,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>>>>>>>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
>>>>>>>>>  	if ((rt2x00_rt(rt2x00dev, RT2872) &&
>>>>>>>>>  	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
>>>>>>>>> -	    rt2x00_rt(rt2x00dev, RT2880) ||
>>>>>>>>>  	    rt2x00_rt(rt2x00dev, RT2883) ||
>>>>>>>>> -	    rt2x00_rt(rt2x00dev, RT2890) ||
>>>>>>>>> -	    rt2x00_rt(rt2x00dev, RT3052) ||
>>>>>>>>>  	    (rt2x00_rt(rt2x00dev, RT3070) &&
>>>>>>>>>  	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
>>>>>>>>>  		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
>>>>>>>>> @@ -1511,12 +1508,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
>>>>>>>>>  		rt2800_bbp_write(rt2x00dev, 105, 0x05);
>>>>>>>>>  	}
>>>>>>>>>  
>>>>>>>>> -	if (rt2x00_rt(rt2x00dev, RT3052)) {
>>>>>>>>> -		rt2800_bbp_write(rt2x00dev, 31, 0x08);
>>>>>>>>> -		rt2800_bbp_write(rt2x00dev, 78, 0x0e);
>>>>>>>>> -		rt2800_bbp_write(rt2x00dev, 80, 0x08);
>>>>>>>>> -	}
>>>>>>>>> -
>>>>>>>> Why are you removing support for RT3052? IMHO those writes were
>>>>>>>> necessary, last time I tested the rt2800pci code on the RT3052 WiSoC.
>>>>>>>
>>>>>>> That is because I have not been able to find them in any of the Ralink vendor drivers.
>>>>>>> Actually, none of the Ralink vendor drivers mention an RT chipset that identifies itself
>>>>>>> as a RT3052. The only mentioning Ive seen is RT305x devices that identify themselves as
>>>>>>> RT2872 devices, but even for them I haven't found these BBP initializations.
>>>>>>> That's why I removed this part.
>>>>>>>
>>>>>>> I have no problem re-instating this if I can find some evidence that these devices
>>>>>>> actually exist.
>>>>>> These chipsets won't show up in STA-only drivers, because they belong to
>>>>>> embedded APs. If you download GPL sources for devices such as ASUS
>>>>>> RT-N15 you will find ifdefs for CONFIG_RALINK_RT3052 and the above
>>>>>> values in BBPRegTable in the driver sources.
>>>>>> I have a few devices based on RT3052, which is why I added this code.
>>>>>> At some point I even had basic Rx/Tx working on it, but haven't tested
>>>>>> in a while.
>>>>>
>>>>> I also couldn't find any evidence of the existence of an 3052 _rt_ chipset.
>>>>> However, the ralink drivers defines a 3052 _rf_ chip:
>>>>>
>>>>> #define RFIC_3052                   9       // 2.4G/5G 2T2R
>>>> RT3052 is the name of the whole WiSoC chip, not just the MAC or RF part
>>>> of it. Since wifi is integrated in the SoC, I don't think there is a
>>>> separate name for just the wifi part.
>>>
>>> There is. I have one 3052 and one 3050 board (basically a 3052 but only
>>> 1T1R), and both identify themselves as RT2872 with different rf "chips"
>>> (of course, there are no additional chips). Hence, the check for RT3052
>>> was never true on both platforms.
>> Back when I tested it, I forced the chip to identify itself as RT3052 by
>> taking the id from the platform device.
> 
> Ah, understood.
> 
>>>>> I don't have such an rf chip in my devices but I don't think the BPP
>>>>> register setup should depend on the actual rf chip. So, if the register
>>>>> setup is really needed we should maybe check for rt2x00_is_soc instead
>>>>> of removing the code?
>>>> Yes, but rt2x00_is_soc() is not enough, since RT2880 is also SoC, but
>>>> slightly different compared to RT3052. I've only tested RT3052 myself.
>>>
>>> Right. So, from what I've seen so far it seems like all 305x boards identify
>>> themselves as rt2872. Hence, we can just replace 3052 with 2872 in the above
>>> check and leave the code as is.
>> OK, if that doesn't conflict with any PCI based stuff...
> 
> According to Gertjan there seems to be no none-SOC adapter which identifies
> itself like that. So I guess that should be safe.
> 

(looks like you guys had some fun discussing things while I was away earning my money ;-))

Anyway, Helmut is right here. The correct check to make is to see if the chip
has identified itself as an RT2872.
However, based on the Ralink source-code I saw, there is more that we need to do, i.e. in
the RF CSR initialization space. Also, a lot of the default BBP CSR values are different
from the other RT chipsets.

I'll cook up a patch to properly add RT2872 support to the driver.

---
Gertjan

Re: [PATCH 3/9] rt2x00: Align RT chipset definitions with vendor driver.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Only include definitions for RT chipsets that are also used inside the
> Ralink vendor drivers.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>

[PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Gertjan van Wingerde]

The rt2800 version constants are inconsistent, and the version number don't
mean a lot of things anyway. Use the literal values in the code instead of
some sort of fabricated version name macro.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800.h    |    9 ---------
 drivers/net/wireless/rt2x00/rt2800lib.c |   31 +++++++++++--------------------
 2 files changed, 11 insertions(+), 29 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 455dc3f..de39d5c 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -59,15 +59,6 @@
 #define RF3320				0x000b
 
 /*
- * Chipset version.
- */
-#define RT2860C_VERSION			0x0100
-#define RT2860D_VERSION			0x0101
-#define RT2880E_VERSION			0x0200
-#define RT2883_VERSION			0x0300
-#define RT3070_VERSION			0x0200
-
-/*
  * Signal information.
  * Default offset is required for RSSI <-> dBm conversion.
  */
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 4bc7e09..d15b230 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -896,8 +896,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
 	rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
 	rt2800_bbp_write(rt2x00dev, 3, bbp);
 
-	if (rt2x00_rt(rt2x00dev, RT2860) &&
-	    (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
+	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) == 0x0100) {
 		if (conf_is_ht40(conf)) {
 			rt2800_bbp_write(rt2x00dev, 69, 0x1a);
 			rt2800_bbp_write(rt2x00dev, 70, 0x0a);
@@ -1061,7 +1060,7 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
 		if (rt2x00_is_usb(rt2x00dev) &&
 		    rt2x00_rt(rt2x00dev, RT3070) &&
-		    (rt2x00_rev(rt2x00dev) == RT3070_VERSION))
+		    rt2x00_rev(rt2x00dev) == 0x0200)
 			return 0x1c + (2 * rt2x00dev->lna_gain);
 		else
 			return 0x2e + rt2x00dev->lna_gain;
@@ -1092,8 +1091,7 @@ EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
 void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
 		       const u32 count)
 {
-	if (rt2x00_rt(rt2x00dev, RT2860) &&
-	    (rt2x00_rev(rt2x00dev) == RT2860C_VERSION))
+	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) == 0x0100)
 		return;
 
 	/*
@@ -1179,8 +1177,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
 	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) &&
-	    (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
+	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
 		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -1207,11 +1204,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
 	rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
-	if ((rt2x00_rt(rt2x00dev, RT2872) &&
-	     (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
+	if ((rt2x00_rt(rt2x00dev, RT2872) && rt2x00_rev(rt2x00dev) >= 0x0200) ||
 	    rt2x00_rt(rt2x00dev, RT2883) ||
-	    (rt2x00_rt(rt2x00dev, RT3070) &&
-	     (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
+	    (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0200))
 		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
 	else
 		rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
@@ -1490,19 +1485,16 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 103, 0x00);
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
 
-	if (rt2x00_rt(rt2x00dev, RT2860) &&
-	    (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
+	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) == 0x0100) {
 		rt2800_bbp_write(rt2x00dev, 69, 0x16);
 		rt2800_bbp_write(rt2x00dev, 73, 0x12);
 	}
 
-	if (rt2x00_rt(rt2x00dev, RT2860) &&
-	    (rt2x00_rev(rt2x00dev) > RT2860D_VERSION))
+	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) > 0x0101)
 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
 
 	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) &&
-	    (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
+	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
 		rt2800_bbp_write(rt2x00dev, 70, 0x0a);
 		rt2800_bbp_write(rt2x00dev, 84, 0x99);
 		rt2800_bbp_write(rt2x00dev, 105, 0x05);
@@ -1588,8 +1580,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	u8 bbp;
 
 	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) &&
-	    (rt2x00_rev(rt2x00dev) != RT3070_VERSION))
+	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) != 0x0200)
 		return 0;
 
 	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
@@ -1764,7 +1755,7 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 		   rt2x00_rt(rt2x00dev, RT2870) ||
 		   rt2x00_rt(rt2x00dev, RT2872) ||
 		   (rt2x00_rt(rt2x00dev, RT2883) &&
-		    (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
+		    rt2x00_rev(rt2x00dev) < 0x0300)) {
 		/*
 		 * There is a max of 2 RX streams for RT28x0 series
 		 */
-- 
1.7.0.4

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> The rt2800 version constants are inconsistent, and the version number don't
> mean a lot of things anyway. Use the literal values in the code instead of
> some sort of fabricated version name macro.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Perhaps a more elegant way of using and defining needs to be found.
But at least the defined show what the purpose for the values is
rather then having magical values spread around the code.

Ivo

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Julian Calaby]

On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>> The rt2800 version constants are inconsistent, and the version number don't
>> mean a lot of things anyway. Use the literal values in the code instead of
>> some sort of fabricated version name macro.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>
> Perhaps a more elegant way of using and defining needs to be found.
> But at least the defined show what the purpose for the values is
> rather then having magical values spread around the code.

Maybe something like:

#define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
                                                   rt2x00_rev(dev) < 0x0300)

Thanks,

-- 

Julian Calaby

Email: julian.calaby@gmail.com
.Plan: http://sites.google.com/site/juliancalaby/

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Ivo Van Doorn]

On Fri, Apr 9, 2010 at 1:53 AM, Julian Calaby <julian.calaby@gmail.com> wrote:
> On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>>> The rt2800 version constants are inconsistent, and the version number don't
>>> mean a lot of things anyway. Use the literal values in the code instead of
>>> some sort of fabricated version name macro.
>>>
>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>
>> Perhaps a more elegant way of using and defining needs to be found.
>> But at least the defined show what the purpose for the values is
>> rather then having magical values spread around the code.
>
> Maybe something like:
>
> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>                                                   rt2x00_rev(dev) < 0x0300)

I considered this as well, but we have many checks which either do
    rt2x00_rev() < 0xffff
but also
    rt2x00_ref() == 0xffff

Ivo

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Julian Calaby]

On Fri, Apr 9, 2010 at 16:54, Ivo Van Doorn <ivdoorn@gmail.com> wrote:
> On Fri, Apr 9, 2010 at 1:53 AM, Julian Calaby <julian.calaby@gmail.com> wrote:
>> On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
>>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>>>> The rt2800 version constants are inconsistent, and the version number don't
>>>> mean a lot of things anyway. Use the literal values in the code instead of
>>>> some sort of fabricated version name macro.
>>>>
>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>
>>> Perhaps a more elegant way of using and defining needs to be found.
>>> But at least the defined show what the purpose for the values is
>>> rather then having magical values spread around the code.
>>
>> Maybe something like:
>>
>> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>>                                                   rt2x00_rev(dev) < 0x0300)
>
> I considered this as well, but we have many checks which either do
>    rt2x00_rev() < 0xffff
> but also
>    rt2x00_ref() == 0xffff

I assume that there are certain ranges of revisions that correspond to
certain chips with certain ... features. So, you could have:

#define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
                                                  rt2x00_rev(dev) < 0x0300)

for the original chip, then

#define RTDEV_IS_RT2883_R2(dev) (rt2x00_rt(dev, RT2883) && \
                                                  rt2x00_rev(dev) >= 0x0300 && \
                                                  rt2x00_rev(dev) < 0x1000)

for the troubled second version and

#define RTDEV_IS_RT2883_R3(dev) (rt2x00_rt(dev, RT2883) && \
                                                  rt2x00_rev(dev) >= 0x1000)

as a catch all for newer chips.

Thanks,

-- 

Julian Calaby

Email: julian.calaby@gmail.com
.Plan: http://sites.google.com/site/juliancalaby/

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Gertjan van Wingerde]

On 04/09/10 09:00, Julian Calaby wrote:
> On Fri, Apr 9, 2010 at 16:54, Ivo Van Doorn <ivdoorn@gmail.com> wrote:
>> On Fri, Apr 9, 2010 at 1:53 AM, Julian Calaby <julian.calaby@gmail.com> wrote:
>>> On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
>>>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>>>>> The rt2800 version constants are inconsistent, and the version number don't
>>>>> mean a lot of things anyway. Use the literal values in the code instead of
>>>>> some sort of fabricated version name macro.
>>>>>
>>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>>
>>>> Perhaps a more elegant way of using and defining needs to be found.
>>>> But at least the defined show what the purpose for the values is
>>>> rather then having magical values spread around the code.
>>>
>>> Maybe something like:
>>>
>>> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>>>                                                   rt2x00_rev(dev) < 0x0300)
>>
>> I considered this as well, but we have many checks which either do
>>    rt2x00_rev() < 0xffff
>> but also
>>    rt2x00_ref() == 0xffff
> 
> I assume that there are certain ranges of revisions that correspond to
> certain chips with certain ... features. So, you could have:
> 
> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>                                                   rt2x00_rev(dev) < 0x0300)
> 
> for the original chip, then
> 
> #define RTDEV_IS_RT2883_R2(dev) (rt2x00_rt(dev, RT2883) && \
>                                                   rt2x00_rev(dev) >= 0x0300 && \
>                                                   rt2x00_rev(dev) < 0x1000)
> 
> for the troubled second version and
> 
> #define RTDEV_IS_RT2883_R3(dev) (rt2x00_rt(dev, RT2883) && \
>                                                   rt2x00_rev(dev) >= 0x1000)
> 
> as a catch all for newer chips.

OK. After spending the entire morning trying to understand the Ralink numbering scheme,
I think I have come up with some sensible constant naming scheme and a set of helpers
to clarify the code. As you can see below there is no constant numbering scheme for all
chipsets, and the revision codes are chipset specific.

First of all, we would define the following chipset revision constants:

#define REV_RT2860C	0x0100
#define REV_RT2860D	0x0101
#define REV_RT2870D	0x0101
#define REV_RT2872E	0x0200
#define REV_RT3070E	0x0200
#define REV_RT3070F	0x0201
#define REV_RT3071E	0x0211
#define REV_RT3090E	0x0211
#define REV_RT3390E	0x0211

Next, we would create three helper functions:

bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
bool rt2x00_less_than_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
bool rt2x00_at_least_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);

This would cover all the usages that we currently have inside the code.

Obviously more can be added once needed.

Are you guys OK with this proposal?
If yes, I'll update the series to change the version constants removal
patch into a patch converting to the above scheme.

---
Gertjan.

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Ivo van Doorn]

On Saturday 10 April 2010, Gertjan van Wingerde wrote:
> On 04/09/10 09:00, Julian Calaby wrote:
> > On Fri, Apr 9, 2010 at 16:54, Ivo Van Doorn <ivdoorn@gmail.com> wrote:
> >> On Fri, Apr 9, 2010 at 1:53 AM, Julian Calaby <julian.calaby@gmail.com> wrote:
> >>> On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
> >>>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> >>>>> The rt2800 version constants are inconsistent, and the version number don't
> >>>>> mean a lot of things anyway. Use the literal values in the code instead of
> >>>>> some sort of fabricated version name macro.
> >>>>>
> >>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> >>>>
> >>>> Perhaps a more elegant way of using and defining needs to be found.
> >>>> But at least the defined show what the purpose for the values is
> >>>> rather then having magical values spread around the code.
> >>>
> >>> Maybe something like:
> >>>
> >>> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
> >>>                                                   rt2x00_rev(dev) < 0x0300)
> >>
> >> I considered this as well, but we have many checks which either do
> >>    rt2x00_rev() < 0xffff
> >> but also
> >>    rt2x00_ref() == 0xffff
> > 
> > I assume that there are certain ranges of revisions that correspond to
> > certain chips with certain ... features. So, you could have:
> > 
> > #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
> >                                                   rt2x00_rev(dev) < 0x0300)
> > 
> > for the original chip, then
> > 
> > #define RTDEV_IS_RT2883_R2(dev) (rt2x00_rt(dev, RT2883) && \
> >                                                   rt2x00_rev(dev) >= 0x0300 && \
> >                                                   rt2x00_rev(dev) < 0x1000)
> > 
> > for the troubled second version and
> > 
> > #define RTDEV_IS_RT2883_R3(dev) (rt2x00_rt(dev, RT2883) && \
> >                                                   rt2x00_rev(dev) >= 0x1000)
> > 
> > as a catch all for newer chips.
> 
> OK. After spending the entire morning trying to understand the Ralink numbering scheme,
> I think I have come up with some sensible constant naming scheme and a set of helpers
> to clarify the code. As you can see below there is no constant numbering scheme for all
> chipsets, and the revision codes are chipset specific.
> 
> First of all, we would define the following chipset revision constants:
> 
> #define REV_RT2860C	0x0100
> #define REV_RT2860D	0x0101
> #define REV_RT2870D	0x0101
> #define REV_RT2872E	0x0200
> #define REV_RT3070E	0x0200
> #define REV_RT3070F	0x0201
> #define REV_RT3071E	0x0211
> #define REV_RT3090E	0x0211
> #define REV_RT3390E	0x0211

Looks good, but could you make the chipset versioning naming
similar to that what is used in rt2500pci and rt2500usb?

> Next, we would create three helper functions:
> 
> bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
> bool rt2x00_less_than_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
> bool rt2x00_at_least_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);

I think we can shorten these names with:

	rt2x00_rt_rev
	rt2x00_rt_rev_lt
	rt2x00_rt_rev_gt

> This would cover all the usages that we currently have inside the code.
> 
> Obviously more can be added once needed.
> 
> Are you guys OK with this proposal?
> If yes, I'll update the series to change the version constants removal
> patch into a patch converting to the above scheme.

Yes, this implementation would be fine. :)

Thanks,

Ivo

Re: [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Julian Calaby]

On Sat, Apr 10, 2010 at 18:57, Gertjan van Wingerde <gwingerde@gmail.com> wrote:
> On 04/09/10 09:00, Julian Calaby wrote:
>> On Fri, Apr 9, 2010 at 16:54, Ivo Van Doorn <ivdoorn@gmail.com> wrote:
>>> On Fri, Apr 9, 2010 at 1:53 AM, Julian Calaby <julian.calaby@gmail.com> wrote:
>>>> On Fri, Apr 9, 2010 at 08:32, Ivo van Doorn <ivdoorn@gmail.com> wrote:
>>>>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>>>>>> The rt2800 version constants are inconsistent, and the version number don't
>>>>>> mean a lot of things anyway. Use the literal values in the code instead of
>>>>>> some sort of fabricated version name macro.
>>>>>>
>>>>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>>>
>>>>> Perhaps a more elegant way of using and defining needs to be found.
>>>>> But at least the defined show what the purpose for the values is
>>>>> rather then having magical values spread around the code.
>>>>
>>>> Maybe something like:
>>>>
>>>> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>>>>                                                   rt2x00_rev(dev) < 0x0300)
>>>
>>> I considered this as well, but we have many checks which either do
>>>    rt2x00_rev() < 0xffff
>>> but also
>>>    rt2x00_ref() == 0xffff
>>
>> I assume that there are certain ranges of revisions that correspond to
>> certain chips with certain ... features. So, you could have:
>>
>> #define RTDEV_IS_RT2883_R1(dev) (rt2x00_rt(dev, RT2883) && \
>>                                                   rt2x00_rev(dev) < 0x0300)
>>
>> for the original chip, then
>>
>> #define RTDEV_IS_RT2883_R2(dev) (rt2x00_rt(dev, RT2883) && \
>>                                                   rt2x00_rev(dev) >= 0x0300 && \
>>                                                   rt2x00_rev(dev) < 0x1000)
>>
>> for the troubled second version and
>>
>> #define RTDEV_IS_RT2883_R3(dev) (rt2x00_rt(dev, RT2883) && \
>>                                                   rt2x00_rev(dev) >= 0x1000)
>>
>> as a catch all for newer chips.
>
> OK. After spending the entire morning trying to understand the Ralink numbering scheme,
> I think I have come up with some sensible constant naming scheme and a set of helpers
> to clarify the code. As you can see below there is no constant numbering scheme for all
> chipsets, and the revision codes are chipset specific.
>
> First of all, we would define the following chipset revision constants:
>
> #define REV_RT2860C     0x0100
> #define REV_RT2860D     0x0101
> #define REV_RT2870D     0x0101
> #define REV_RT2872E     0x0200
> #define REV_RT3070E     0x0200
> #define REV_RT3070F     0x0201
> #define REV_RT3071E     0x0211
> #define REV_RT3090E     0x0211
> #define REV_RT3390E     0x0211
>
> Next, we would create three helper functions:
>
> bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
> bool rt2x00_less_than_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
> bool rt2x00_at_least_rt_rev(struct rt2x00_dev *rt2x00dev, u16 rt, u16 rev);
>
> This would cover all the usages that we currently have inside the code.
>
> Obviously more can be added once needed.
>
> Are you guys OK with this proposal?

I have no real say, but for what it's worth, that seems like a good idea.

Thanks,

-- 

Julian Calaby

Email: julian.calaby@gmail.com
.Plan: http://sites.google.com/site/juliancalaby/

Re: [rt2x00-users] [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Benoit PAPILLAULT]

Ivo van Doorn a écrit :
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>   
>> The rt2800 version constants are inconsistent, and the version number don't
>> mean a lot of things anyway. Use the literal values in the code instead of
>> some sort of fabricated version name macro.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>     
>
> Perhaps a more elegant way of using and defining needs to be found.
> But at least the defined show what the purpose for the values is
> rather then having magical values spread around the code.
>
> Ivo
>
>   
Agreed, it's a lot better to avoid hardcoded value. #define adds a 
meaning to the numeric value and if such define needs to be changed, 
there's only one place to change, avoiding bugs by duplicating hardcoded 
values and only changing one instance.

Even, #define MCS_0 0 is useful :-)

Regards,
Benoit

Re: [rt2x00-users] [PATCH 4/9] rt2x00: Remove rt2800 version constants.

[Gertjan van Wingerde]

On 04/09/10 23:53, Benoit PAPILLAULT wrote:
> Ivo van Doorn a écrit :
>> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>>  
>>> The rt2800 version constants are inconsistent, and the version number
>>> don't
>>> mean a lot of things anyway. Use the literal values in the code
>>> instead of
>>> some sort of fabricated version name macro.
>>>
>>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>>>     
>>
>> Perhaps a more elegant way of using and defining needs to be found.
>> But at least the defined show what the purpose for the values is
>> rather then having magical values spread around the code.
>>
>> Ivo
>>
>>   
> Agreed, it's a lot better to avoid hardcoded value. #define adds a
> meaning to the numeric value and if such define needs to be changed,
> there's only one place to change, avoiding bugs by duplicating hardcoded
> values and only changing one instance.
> 
> Even, #define MCS_0 0 is useful :-)
> 

To be honest, I don't think that constants with meaningless names are better
or useful.

If a constant is used it should have a meaningful name, otherwise it is just
as bad as using a magical value. The only change is that it now is a magical
name. IMHO that actually worsens the situation as code readers will start
thinking about what that name actually means.

However, I think I found some sort of scheme that can be used for the version
numbers. See my other email to the mailing list.

---
Gertjan.

[PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Gertjan van Wingerde]

Align the rt2800 register initializations with the latest versions of the
Ralink vendor driver.
This patch is also preparation for the addition of support for RT3070 /
RT3071 / RT3090 / RT3390 based devices.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |  155 +++++++++++++++++++++++--------
 drivers/net/wireless/rt2x00/rt2800pci.c |   13 ---
 2 files changed, 114 insertions(+), 54 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index d15b230..51e6ca8 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -359,11 +359,6 @@ static int rt2800_blink_set(struct led_classdev *led_cdev,
 	rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
 	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
 	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
-	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
-	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
 	rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
 
 	return 0;
@@ -531,12 +526,8 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
 			   !(filter_flags & FIF_PLCPFAIL));
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
 			   !(filter_flags & FIF_PROMISC_IN_BSS));
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
 			   !(filter_flags & FIF_ALLMULTI));
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
 			   !(filter_flags & FIF_CONTROL));
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
@@ -549,8 +540,6 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
 			   !(filter_flags & FIF_CONTROL));
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
 			   !(filter_flags & FIF_PSPOLL));
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
-	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
 	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
 			   !(filter_flags & FIF_CONTROL));
 	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
@@ -609,10 +598,6 @@ void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
 {
 	u32 reg;
 
-	rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
-	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
-	rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
 	rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
 			   !!erp->short_preamble);
@@ -631,15 +616,12 @@ void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
 
 	rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
 	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
-	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
-	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
-	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
 	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
@@ -984,10 +966,6 @@ static void rt2800_config_retry_limit(struct rt2x00_dev *rt2x00dev,
 			   libconf->conf->short_frame_max_tx_count);
 	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
 			   libconf->conf->long_frame_max_tx_count);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
 	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
 }
 
@@ -1111,6 +1089,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	u32 reg;
 	unsigned int i;
 
+	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
+	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+
 	if (rt2x00_is_usb(rt2x00dev)) {
 		/*
 		 * Wait until BBP and RF are ready.
@@ -1130,8 +1116,25 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 		rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
 		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL,
 				      reg & ~0x00002000);
-	} else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
+	} else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
+		/*
+		 * Reset DMA indexes
+		 */
+		rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
+		rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
+
+		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
+		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
+
 		rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
+	}
 
 	rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
 	rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
@@ -1176,6 +1179,31 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
 	rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
+	rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST, 0);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
+	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL, 1);
+	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
+
+	rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
+	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, 9);
+	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
+	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
+
 	if (rt2x00_is_usb(rt2x00dev) &&
 	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
@@ -1199,6 +1227,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
 	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
+	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 32);
 	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
 	rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
 
@@ -1214,38 +1243,61 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
 	rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
 
+	rt2800_register_read(rt2x00dev, LED_CFG, &reg);
+	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, 70);
+	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, 30);
+	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
+	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
+	rt2800_register_write(rt2x00dev, LED_CFG, reg);
+
 	rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
 
+	rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 15);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 31);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
+	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
+
 	rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
+	rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY, 1);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
+	rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE, 1);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
 	rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 3);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 1);
 	rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 3);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 1);
 	rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
@@ -1258,11 +1310,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
-	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
+	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
+		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 1);
+	else if (rt2x00_is_usb(rt2x00dev))
+		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
@@ -1270,6 +1326,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
@@ -1282,6 +1339,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
@@ -1294,6 +1352,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
 
 	if (rt2x00_is_usb(rt2x00dev)) {
@@ -1323,6 +1382,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
 
 	rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
+
+	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, 32);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, 32);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, 314);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
+	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
+
 	rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
 
 	/*
@@ -1472,26 +1540,31 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_bbp_write(rt2x00dev, 65, 0x2c);
 	rt2800_bbp_write(rt2x00dev, 66, 0x38);
-	rt2800_bbp_write(rt2x00dev, 69, 0x12);
+
+	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) == 0x0100) {
+		rt2800_bbp_write(rt2x00dev, 69, 0x16);
+		rt2800_bbp_write(rt2x00dev, 73, 0x12);
+	} else {
+		rt2800_bbp_write(rt2x00dev, 69, 0x12);
+		rt2800_bbp_write(rt2x00dev, 73, 0x10);
+	}
+
 	rt2800_bbp_write(rt2x00dev, 70, 0x0a);
-	rt2800_bbp_write(rt2x00dev, 73, 0x10);
 	rt2800_bbp_write(rt2x00dev, 81, 0x37);
 	rt2800_bbp_write(rt2x00dev, 82, 0x62);
 	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
-	rt2800_bbp_write(rt2x00dev, 84, 0x99);
+
+	if (rt2x00_rev(rt2x00dev) == 0x101)
+		rt2800_bbp_write(rt2x00dev, 84, 0x19);
+	else
+		rt2800_bbp_write(rt2x00dev, 84, 0x99);
+
 	rt2800_bbp_write(rt2x00dev, 86, 0x00);
 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
 	rt2800_bbp_write(rt2x00dev, 92, 0x00);
 	rt2800_bbp_write(rt2x00dev, 103, 0x00);
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
-
-	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) == 0x0100) {
-		rt2800_bbp_write(rt2x00dev, 69, 0x16);
-		rt2800_bbp_write(rt2x00dev, 73, 0x12);
-	}
-
-	if (rt2x00_rt(rt2x00dev, RT2860) && rt2x00_rev(rt2x00dev) > 0x0101)
-		rt2800_bbp_write(rt2x00dev, 84, 0x19);
+	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
 	if (rt2x00_is_usb(rt2x00dev) &&
 	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index a2b37d3..2131f8f 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -347,19 +347,6 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
 	struct queue_entry_priv_pci *entry_priv;
 	u32 reg;
 
-	rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
-	rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
-
-	rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
-	rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
-
 	/*
 	 * Initialize registers.
 	 */
-- 
1.7.0.4

Re: [PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Align the rt2800 register initializations with the latest versions of the
> Ralink vendor driver.
> This patch is also preparation for the addition of support for RT3070 /
> RT3071 / RT3090 / RT3390 based devices.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> ---
>  drivers/net/wireless/rt2x00/rt2800lib.c |  155 +++++++++++++++++++++++--------
>  drivers/net/wireless/rt2x00/rt2800pci.c |   13 ---
>  2 files changed, 114 insertions(+), 54 deletions(-)

> @@ -531,12 +526,8 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
>  			   !(filter_flags & FIF_PLCPFAIL));
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
>  			   !(filter_flags & FIF_PROMISC_IN_BSS));
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
>  			   !(filter_flags & FIF_ALLMULTI));
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
>  			   !(filter_flags & FIF_CONTROL));
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
> @@ -549,8 +540,6 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
>  			   !(filter_flags & FIF_CONTROL));
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
>  			   !(filter_flags & FIF_PSPOLL));
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
>  			   !(filter_flags & FIF_CONTROL));
>  	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);

I'm not a big fan of these changes. Unless the filters don't work as expected,
I rather see the entire list of filters set to their correct values here.

> @@ -1176,6 +1179,31 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
>  	rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
>  
> +	rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST, 0);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL, 1);
> +	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);

Can't we just fix this by calling the config_filter() function with the proper settings?
This function is getting huge by now, so we could try to reduce it a bit.

> @@ -1214,38 +1243,61 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
>  	rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
>  
> +	rt2800_register_read(rt2x00dev, LED_CFG, &reg);
> +	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, 70);
> +	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, 30);
> +	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
> +	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
> +	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
> +	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
> +	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
> +	rt2800_register_write(rt2x00dev, LED_CFG, reg);

Same here.

>  	rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
>  
> +	rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 15);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 31);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
> +	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
> +	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);

And here.

> +	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 1);
> +	else if (rt2x00_is_usb(rt2x00dev))
> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);

perhaps:
	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, !rt2x00_is_usb(rt2x00dev));

> @@ -1323,6 +1382,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
>  
>  	rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
> +
> +	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, 32);
> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, 32);
> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, 314);
> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
> +	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);

Not really fond of the magical values written to the device, while mac80211
sends us the proper values later. This is probably a register initialization ordering issue?

Ivo

Re: [PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Gertjan van Wingerde]

On 04/09/10 00:33, Ivo van Doorn wrote:
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>> Align the rt2800 register initializations with the latest versions of the
>> Ralink vendor driver.
>> This patch is also preparation for the addition of support for RT3070 /
>> RT3071 / RT3090 / RT3390 based devices.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>> ---
>>  drivers/net/wireless/rt2x00/rt2800lib.c |  155 +++++++++++++++++++++++--------
>>  drivers/net/wireless/rt2x00/rt2800pci.c |   13 ---
>>  2 files changed, 114 insertions(+), 54 deletions(-)
> 
>> @@ -531,12 +526,8 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
>>  			   !(filter_flags & FIF_PLCPFAIL));
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
>>  			   !(filter_flags & FIF_PROMISC_IN_BSS));
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
>>  			   !(filter_flags & FIF_ALLMULTI));
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
>>  			   !(filter_flags & FIF_CONTROL));
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
>> @@ -549,8 +540,6 @@ void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
>>  			   !(filter_flags & FIF_CONTROL));
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
>>  			   !(filter_flags & FIF_PSPOLL));
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
>> -	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
>>  	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
>>  			   !(filter_flags & FIF_CONTROL));
>>  	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
> 
> I'm not a big fan of these changes. Unless the filters don't work as expected,
> I rather see the entire list of filters set to their correct values here.

OK. I'll back this out for now. I removed these bits as they now are being set at initialization
time already, and it didn't seem necessary to program these particular filters again to the same
value. But it is not critical, and it doesn't fix anything anyway.

> 
>> @@ -1176,6 +1179,31 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
>>  	rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
>>  
>> +	rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST, 0);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
>> +	rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL, 1);
>> +	rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
> 
> Can't we just fix this by calling the config_filter() function with the proper settings?
> This function is getting huge by now, so we could try to reduce it a bit.

Yep, it should be doable to do this by calling config_filter.

> 
>> @@ -1214,38 +1243,61 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
>>  	rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
>>  
>> +	rt2800_register_read(rt2x00dev, LED_CFG, &reg);
>> +	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, 70);
>> +	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, 30);
>> +	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
>> +	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
>> +	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
>> +	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
>> +	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
>> +	rt2800_register_write(rt2x00dev, LED_CFG, reg);
> 
> Same here.

That's difficult. We have no other function simply manipulating the LED_CFG register.
There is rt2800_blink_set, but that is working completely different.
I'd prefer to leave this as is, instead of introducing another small helper.

> 
>>  	rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
>>  
>> +	rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 15);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 31);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
>> +	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
>> +	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
> 
> And here.

Same as for LED_CFG. Using rt2800_config_retry_limit would involve setting up a
complete libconf structure. Seems like a bit of overkill for the purpose.

> 
>> +	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
>> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 1);
>> +	else if (rt2x00_is_usb(rt2x00dev))
>> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
> 
> perhaps:
> 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, !rt2x00_is_usb(rt2x00dev));

Hmm, could be. Not too fond of that construction though. I think the somewhat more verbose
variant I had is clearer and easier to understand what is going on.

> 
>> @@ -1323,6 +1382,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
>>  
>>  	rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
>> +
>> +	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
>> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, 32);
>> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, 32);
>> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
>> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, 314);
>> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
>> +	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
> 
> Not really fond of the magical values written to the device, while mac80211
> sends us the proper values later. This is probably a register initialization ordering issue?

These magical values come straight from the Ralink vendor driver. As you know that code isn't
the best documented code we've seen, so I don't know what these magical values actually represent.
They are just initialization values for the time until we get associated.

For code clarity in comparison to the Ralink vendor driver I prefer to leave these in.

---
Gertjan

Re: [PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Ivo van Doorn]

> > 
> >> @@ -1214,38 +1243,61 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >>  	rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
> >>  	rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
> >>  
> >> +	rt2800_register_read(rt2x00dev, LED_CFG, &reg);
> >> +	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, 70);
> >> +	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, 30);
> >> +	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
> >> +	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
> >> +	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
> >> +	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
> >> +	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
> >> +	rt2800_register_write(rt2x00dev, LED_CFG, reg);
> > 
> > Same here.
> 
> That's difficult. We have no other function simply manipulating the LED_CFG register.
> There is rt2800_blink_set, but that is working completely different.
> I'd prefer to leave this as is, instead of introducing another small helper.
> 
> > 
> >>  	rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
> >>  
> >> +	rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 15);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 31);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
> >> +	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
> >> +	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
> > 
> > And here.
> 
> Same as for LED_CFG. Using rt2800_config_retry_limit would involve setting up a
> complete libconf structure. Seems like a bit of overkill for the purpose.

Ok, we could fix this later because it might not even be required to do this initialization here,
it isn't needed for the other (older) chipsets either. But until the rt2800 drivers have problems
we should stick as close as possible to the original driver. :)

> >> +	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
> >> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 1);
> >> +	else if (rt2x00_is_usb(rt2x00dev))
> >> +		rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
> > 
> > perhaps:
> > 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, !rt2x00_is_usb(rt2x00dev));
> 
> Hmm, could be. Not too fond of that construction though. I think the somewhat more verbose
> variant I had is clearer and easier to understand what is going on.

Of, but the if-else-if can be replaced with if-else, unless you expect a 4th platform ;)

> >> @@ -1323,6 +1382,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
> >>  	rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
> >>  
> >>  	rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
> >> +
> >> +	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
> >> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, 32);
> >> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, 32);
> >> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
> >> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, 314);
> >> +	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
> >> +	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
> > 
> > Not really fond of the magical values written to the device, while mac80211
> > sends us the proper values later. This is probably a register initialization ordering issue?
> 
> These magical values come straight from the Ralink vendor driver. As you know that code isn't
> the best documented code we've seen, so I don't know what these magical values actually represent.
> They are just initialization values for the time until we get associated.
> 
> For code clarity in comparison to the Ralink vendor driver I prefer to leave these in.

Ok.

Ivo

[PATCH 6/9] rt2x00: Finish rt3070 support in rt2800 register initialization.

[Gertjan van Wingerde]

rt2x00 had preliminary support for RT3070 based devices, but the support was
incomplete.
Update the RT3070 register initialization to be similar to the latest Ralink
vendor driver.

With this patch my rt3070 based devices start showing a sign of life.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |  142 ++++++++++++++++--------------
 1 files changed, 76 insertions(+), 66 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 51e6ca8..52e2422 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1,6 +1,6 @@
 /*
 	Copyright (C) 2009 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
-	Copyright (C) 2009 Gertjan van Wingerde <gwingerde@gmail.com>
+	Copyright (C) 2009,2010 Gertjan van Wingerde <gwingerde@gmail.com>
 
 	Based on the original rt2800pci.c and rt2800usb.c.
 	  Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
@@ -1036,9 +1036,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
 static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 {
 	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
-		if (rt2x00_is_usb(rt2x00dev) &&
-		    rt2x00_rt(rt2x00dev, RT3070) &&
-		    rt2x00_rev(rt2x00dev) == 0x0200)
+		if (rt2x00_rt(rt2x00dev, RT3070))
 			return 0x1c + (2 * rt2x00dev->lna_gain);
 		else
 			return 0x2e + rt2x00dev->lna_gain;
@@ -1086,7 +1084,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
  */
 int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 {
-	u32 reg;
+	u32 reg, reg2;
 	unsigned int i;
 
 	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
@@ -1204,11 +1202,18 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
-	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
+	if (rt2x00_rt(rt2x00dev, RT3070)) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
-		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
-		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+
+		if (rt2x00_rev(rt2x00dev) < 0x0201) {
+			reg = 0x00000000;
+			reg2 = 0x0000002c;
+		} else {
+			reg = 0x00080606;
+			reg2 = 0x00000000;
+		}
+		rt2800_register_write(rt2x00dev, TX_SW_CFG1, reg);
+		rt2800_register_write(rt2x00dev, TX_SW_CFG2, reg2);
 	} else {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
@@ -1538,6 +1543,12 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 		     rt2800_wait_bbp_ready(rt2x00dev)))
 		return -EACCES;
 
+	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0211) {
+		rt2800_bbp_read(rt2x00dev, 31, &value);
+		value &= ~0x03;
+		rt2800_bbp_write(rt2x00dev, 31, value);
+	}
+
 	rt2800_bbp_write(rt2x00dev, 65, 0x2c);
 	rt2800_bbp_write(rt2x00dev, 66, 0x38);
 
@@ -1550,11 +1561,19 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	}
 
 	rt2800_bbp_write(rt2x00dev, 70, 0x0a);
-	rt2800_bbp_write(rt2x00dev, 81, 0x37);
+
+	if (rt2x00_rt(rt2x00dev, RT3070)) {
+		rt2800_bbp_write(rt2x00dev, 79, 0x13);
+		rt2800_bbp_write(rt2x00dev, 80, 0x05);
+		rt2800_bbp_write(rt2x00dev, 81, 0x33);
+	} else {
+		rt2800_bbp_write(rt2x00dev, 81, 0x37);
+	}
+
 	rt2800_bbp_write(rt2x00dev, 82, 0x62);
 	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
 
-	if (rt2x00_rev(rt2x00dev) == 0x101)
+	if (!rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x101)
 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
 	else
 		rt2800_bbp_write(rt2x00dev, 84, 0x99);
@@ -1562,17 +1581,15 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 86, 0x00);
 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
 	rt2800_bbp_write(rt2x00dev, 92, 0x00);
-	rt2800_bbp_write(rt2x00dev, 103, 0x00);
+
+	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0201)
+		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
+	else
+		rt2800_bbp_write(rt2x00dev, 103, 0x00);
+
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
 	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
-	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
-		rt2800_bbp_write(rt2x00dev, 70, 0x0a);
-		rt2800_bbp_write(rt2x00dev, 84, 0x99);
-		rt2800_bbp_write(rt2x00dev, 105, 0x05);
-	}
-
 	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
 
@@ -1651,18 +1668,12 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 {
 	u8 rfcsr;
 	u8 bbp;
+	u32 reg;
+	u16 eeprom;
 
-	if (rt2x00_is_usb(rt2x00dev) &&
-	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) != 0x0200)
+	if (!rt2x00_rt(rt2x00dev, RT3070))
 		return 0;
 
-	if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
-		if (!rt2x00_rf(rt2x00dev, RF3020) &&
-		    !rt2x00_rf(rt2x00dev, RF3021) &&
-		    !rt2x00_rf(rt2x00dev, RF3022))
-			return 0;
-	}
-
 	/*
 	 * Init RF calibration.
 	 */
@@ -1673,13 +1684,13 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
 	rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
 
-	if (rt2x00_is_usb(rt2x00dev)) {
+	if (rt2x00_rt(rt2x00dev, RT3070)) {
 		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
 		rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
 		rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
 		rt2800_rfcsr_write(rt2x00dev, 7, 0x70);
 		rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
-		rt2800_rfcsr_write(rt2x00dev, 10, 0x71);
+		rt2800_rfcsr_write(rt2x00dev, 10, 0x41);
 		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
 		rt2800_rfcsr_write(rt2x00dev, 12, 0x7b);
 		rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
@@ -1692,48 +1703,25 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
 		rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
 		rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
-		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
 		rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
-	} else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
-		rt2800_rfcsr_write(rt2x00dev, 0, 0x50);
-		rt2800_rfcsr_write(rt2x00dev, 1, 0x01);
-		rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);
-		rt2800_rfcsr_write(rt2x00dev, 3, 0x75);
-		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
-		rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
-		rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
-		rt2800_rfcsr_write(rt2x00dev, 7, 0x50);
-		rt2800_rfcsr_write(rt2x00dev, 8, 0x39);
-		rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
-		rt2800_rfcsr_write(rt2x00dev, 10, 0x60);
-		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
-		rt2800_rfcsr_write(rt2x00dev, 12, 0x75);
-		rt2800_rfcsr_write(rt2x00dev, 13, 0x75);
-		rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
-		rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
-		rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
-		rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
-		rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
-		rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
-		rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
-		rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
-		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
-		rt2800_rfcsr_write(rt2x00dev, 23, 0x31);
-		rt2800_rfcsr_write(rt2x00dev, 24, 0x08);
-		rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
-		rt2800_rfcsr_write(rt2x00dev, 26, 0x25);
-		rt2800_rfcsr_write(rt2x00dev, 27, 0x23);
-		rt2800_rfcsr_write(rt2x00dev, 28, 0x13);
-		rt2800_rfcsr_write(rt2x00dev, 29, 0x83);
+	}
+
+	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) {
+		rt2800_register_read(rt2x00dev, LDO_CFG0, &reg);
+		rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
+		rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
+		rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
 	}
 
 	/*
 	 * Set RX Filter calibration for 20MHz and 40MHz
 	 */
-	rt2x00dev->calibration[0] =
-	    rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
-	rt2x00dev->calibration[1] =
-	    rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
+	if (rt2x00_rt(rt2x00dev, RT3070)) {
+		rt2x00dev->calibration[0] =
+			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
+		rt2x00dev->calibration[1] =
+			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
+	}
 
 	/*
 	 * Set back to initial state
@@ -1751,6 +1739,28 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
 	rt2800_bbp_write(rt2x00dev, 4, bbp);
 
+	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
+		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
+
+	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
+	rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
+	rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
+
+	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
+	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
+	rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
+	if ((eeprom & 0x07) >= 1)
+		rt2x00_set_field8(&rfcsr, RFCSR17_R1, eeprom & 0x07);
+	rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
+
+	if (rt2x00_rt(rt2x00dev, RT3070)) {
+		rt2800_rfcsr_read(rt2x00dev, 27, &rfcsr);
+		rfcsr &= 0x77;
+		if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
+			rfcsr |= 0x03;
+		rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
+	}
+
 	return 0;
 }
 EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
-- 
1.7.0.4

Re: [PATCH 6/9] rt2x00: Finish rt3070 support in rt2800 register initialization.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> rt2x00 had preliminary support for RT3070 based devices, but the support was
> incomplete.
> Update the RT3070 register initialization to be similar to the latest Ralink
> vendor driver.
> 
> With this patch my rt3070 based devices start showing a sign of life.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>


> @@ -1086,7 +1084,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
>   */
>  int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  {
> -	u32 reg;
> +	u32 reg, reg2;
>  	unsigned int i;
>  
>  	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
> @@ -1204,11 +1202,18 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
>  	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
>  
> -	if (rt2x00_is_usb(rt2x00dev) &&
> -	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
> +	if (rt2x00_rt(rt2x00dev, RT3070)) {
>  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
> -		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
> -		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
> +
> +		if (rt2x00_rev(rt2x00dev) < 0x0201) {
> +			reg = 0x00000000;
> +			reg2 = 0x0000002c;
> +		} else {
> +			reg = 0x00080606;
> +			reg2 = 0x00000000;
> +		}
> +		rt2800_register_write(rt2x00dev, TX_SW_CFG1, reg);
> +		rt2800_register_write(rt2x00dev, TX_SW_CFG2, reg2);

Might as well put the rt2800_register_write call into the if, rather then storing
it into variables first. That way it is consistent with the rest of the code.
 
> @@ -1751,6 +1739,28 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
>  	rt2800_bbp_write(rt2x00dev, 4, bbp);
>  
> +	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
> +		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
> +
> +	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
> +	rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
> +	rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
> +
> +	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
> +	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
> +	rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
> +	if ((eeprom & 0x07) >= 1)

Might be nicer to do the access using rt2x00_get_field16,
plus some name for this magical field in the header file.

> +		rt2x00_set_field8(&rfcsr, RFCSR17_R1, eeprom & 0x07);
> +	rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
> +
> +	if (rt2x00_rt(rt2x00dev, RT3070)) {
> +		rt2800_rfcsr_read(rt2x00dev, 27, &rfcsr);
> +		rfcsr &= 0x77;
> +		if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
> +			rfcsr |= 0x03;
> +		rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
> +	}

Any ideas what these fields mean? Could set_field8 and _get_field8 simplify the code?

Ivo

Re: [PATCH 6/9] rt2x00: Finish rt3070 support in rt2800 register initialization.

[Gertjan van Wingerde]

On 04/09/10 00:33, Ivo van Doorn wrote:
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>> rt2x00 had preliminary support for RT3070 based devices, but the support was
>> incomplete.
>> Update the RT3070 register initialization to be similar to the latest Ralink
>> vendor driver.
>>
>> With this patch my rt3070 based devices start showing a sign of life.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> 
> 
>> @@ -1086,7 +1084,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
>>   */
>>  int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  {
>> -	u32 reg;
>> +	u32 reg, reg2;
>>  	unsigned int i;
>>  
>>  	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
>> @@ -1204,11 +1202,18 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
>>  	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
>>  
>> -	if (rt2x00_is_usb(rt2x00dev) &&
>> -	    rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x0200) {
>> +	if (rt2x00_rt(rt2x00dev, RT3070)) {
>>  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
>> -		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
>> -		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
>> +
>> +		if (rt2x00_rev(rt2x00dev) < 0x0201) {
>> +			reg = 0x00000000;
>> +			reg2 = 0x0000002c;
>> +		} else {
>> +			reg = 0x00080606;
>> +			reg2 = 0x00000000;
>> +		}
>> +		rt2800_register_write(rt2x00dev, TX_SW_CFG1, reg);
>> +		rt2800_register_write(rt2x00dev, TX_SW_CFG2, reg2);
> 
> Might as well put the rt2800_register_write call into the if, rather then storing
> it into variables first. That way it is consistent with the rest of the code.

OK.

>  
>> @@ -1751,6 +1739,28 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
>>  	rt2800_bbp_write(rt2x00dev, 4, bbp);
>>  
>> +	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
>> +		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
>> +
>> +	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
>> +	rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
>> +	rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
>> +
>> +	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
>> +	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
>> +	rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
>> +	if ((eeprom & 0x07) >= 1)
> 
> Might be nicer to do the access using rt2x00_get_field16,
> plus some name for this magical field in the header file.

OK. I'll do that. Note that the EEPROM field is used in multiple ways, possibly depending
on the chipset type. I'll add a comment stating that, so that it is explained why the
magical field for this EEPROM offset overlap.

> 
>> +		rt2x00_set_field8(&rfcsr, RFCSR17_R1, eeprom & 0x07);
>> +	rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
>> +
>> +	if (rt2x00_rt(rt2x00dev, RT3070)) {
>> +		rt2800_rfcsr_read(rt2x00dev, 27, &rfcsr);
>> +		rfcsr &= 0x77;
>> +		if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
>> +			rfcsr |= 0x03;
>> +		rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
>> +	}
> 
> Any ideas what these fields mean? Could set_field8 and _get_field8 simplify the code?

Again, no idea. I'll create some field names, like RFCSR27_R1, etc. This is aligned with
what was done for other unknown RF CSRs.

---
Gertjan.

[PATCH 7/9] rt2x00: Add rt3071 support in rt2800 register initialization.

[Gertjan van Wingerde]

Add RT3071 specific register initializations to rt2x00, based on the latest
Ralink rt3070 vendor driver.

With this patch my RT3071 based devices start showing a sign of life.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |  105 +++++++++++++++++++++++++++---
 1 files changed, 94 insertions(+), 11 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 52e2422..209fd85 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1036,7 +1036,8 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
 static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 {
 	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
-		if (rt2x00_rt(rt2x00dev, RT3070))
+		if (rt2x00_rt(rt2x00dev, RT3070) ||
+		    rt2x00_rt(rt2x00dev, RT3071))
 			return 0x1c + (2 * rt2x00dev->lna_gain);
 		else
 			return 0x2e + rt2x00dev->lna_gain;
@@ -1085,6 +1086,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
 int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 {
 	u32 reg, reg2;
+	u16 eeprom;
 	unsigned int i;
 
 	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
@@ -1202,7 +1204,20 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
-	if (rt2x00_rt(rt2x00dev, RT3070)) {
+	if (rt2x00_rt(rt2x00dev, RT3071)) {
+		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
+		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
+		if (rt2x00_rev(rt2x00dev) < 0x0211) {
+			rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
+			if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
+				reg = 0x0000002c;
+			else
+				reg = 0x0000000f;
+		} else {
+			reg = 0x00000000;
+		}
+		rt2800_register_write(rt2x00dev, TX_SW_CFG2, reg);
+	} else if (rt2x00_rt(rt2x00dev, RT3070)) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
 
 		if (rt2x00_rev(rt2x00dev) < 0x0201) {
@@ -1543,7 +1558,9 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 		     rt2800_wait_bbp_ready(rt2x00dev)))
 		return -EACCES;
 
-	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0211) {
+	if ((rt2x00_rt(rt2x00dev, RT3070) ||
+	     rt2x00_rt(rt2x00dev, RT3071)) &&
+	    rt2x00_rev(rt2x00dev) >= 0x0211) {
 		rt2800_bbp_read(rt2x00dev, 31, &value);
 		value &= ~0x03;
 		rt2800_bbp_write(rt2x00dev, 31, value);
@@ -1562,7 +1579,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_bbp_write(rt2x00dev, 70, 0x0a);
 
-	if (rt2x00_rt(rt2x00dev, RT3070)) {
+	if (rt2x00_rt(rt2x00dev, RT3070) ||
+	    rt2x00_rt(rt2x00dev, RT3071)) {
 		rt2800_bbp_write(rt2x00dev, 79, 0x13);
 		rt2800_bbp_write(rt2x00dev, 80, 0x05);
 		rt2800_bbp_write(rt2x00dev, 81, 0x33);
@@ -1573,7 +1591,9 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 82, 0x62);
 	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
 
-	if (!rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) == 0x101)
+	if (!rt2x00_rt(rt2x00dev, RT3070) &&
+	    !rt2x00_rt(rt2x00dev, RT3071) &&
+	    rt2x00_rev(rt2x00dev) == 0x101)
 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
 	else
 		rt2800_bbp_write(rt2x00dev, 84, 0x99);
@@ -1582,7 +1602,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
 	rt2800_bbp_write(rt2x00dev, 92, 0x00);
 
-	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0201)
+	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0201) ||
+	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211))
 		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
 	else
 		rt2800_bbp_write(rt2x00dev, 103, 0x00);
@@ -1590,6 +1611,18 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
 	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
+	if (rt2x00_rt(rt2x00dev, RT3071)) {
+		rt2800_bbp_read(rt2x00dev, 138, &value);
+
+		rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
+		if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1)
+			value |= 0x20;
+		if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1)
+			value &= ~0x02;
+
+		rt2800_bbp_write(rt2x00dev, 138, value);
+	}
+
 	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
 
@@ -1671,7 +1704,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	u32 reg;
 	u16 eeprom;
 
-	if (!rt2x00_rt(rt2x00dev, RT3070))
+	if (!rt2x00_rt(rt2x00dev, RT3070) &&
+	    !rt2x00_rt(rt2x00dev, RT3071))
 		return 0;
 
 	/*
@@ -1684,7 +1718,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
 	rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
 
-	if (rt2x00_rt(rt2x00dev, RT3070)) {
+	if (rt2x00_rt(rt2x00dev, RT3070) ||
+	    rt2x00_rt(rt2x00dev, RT3071)) {
 		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
 		rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
 		rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
@@ -1711,6 +1746,23 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
 		rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
 		rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
+	} else if (rt2x00_rt(rt2x00dev, RT3071)) {
+		rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
+		rt2x00_set_field8(&rfcsr, RFCSR6_R2, 1);
+		rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
+
+		rt2800_rfcsr_write(rt2x00dev, 31, 0x14);
+
+		rt2800_register_read(rt2x00dev, LDO_CFG0, &reg);
+		rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
+		if (rt2x00_rev(rt2x00dev) < 0x211) {
+			rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
+			if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
+				rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
+			else
+				rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 0);
+		}
+		rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
 	}
 
 	/*
@@ -1721,6 +1773,11 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
 		rt2x00dev->calibration[1] =
 			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
+	} else if (rt2x00_rt(rt2x00dev, RT3071)) {
+		rt2x00dev->calibration[0] =
+			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13);
+		rt2x00dev->calibration[1] =
+			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15);
 	}
 
 	/*
@@ -1739,7 +1796,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
 	rt2800_bbp_write(rt2x00dev, 4, bbp);
 
-	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
+	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) ||
+	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211))
 		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
 
 	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
@@ -1748,15 +1806,40 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
 	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
+	if (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) {
+		rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
+		if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
+			rt2x00_set_field8(&rfcsr, RFCSR17_R3, 1);
+	}
 	rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
 	if ((eeprom & 0x07) >= 1)
 		rt2x00_set_field8(&rfcsr, RFCSR17_R1, eeprom & 0x07);
 	rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
 
-	if (rt2x00_rt(rt2x00dev, RT3070)) {
+	if (rt2x00_rt(rt2x00dev, RT3071)) {
+		rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
+		rfcsr &= ~0x0c;
+		rfcsr |= 0x31;
+		rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
+
+		rt2800_rfcsr_read(rt2x00dev, 15, &rfcsr);
+		rfcsr &= ~0x08;
+		rt2800_rfcsr_write(rt2x00dev, 15, rfcsr);
+
+		rt2800_rfcsr_read(rt2x00dev, 20, &rfcsr);
+		rfcsr &= ~0x08;
+		rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
+
+		rt2800_rfcsr_read(rt2x00dev, 21, &rfcsr);
+		rfcsr &= ~0x08;
+		rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+	}
+
+	if (rt2x00_rt(rt2x00dev, RT3070) || rt2x00_rt(rt2x00dev, RT3071)) {
 		rt2800_rfcsr_read(rt2x00dev, 27, &rfcsr);
 		rfcsr &= 0x77;
-		if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201)
+		if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) ||
+		    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211))
 			rfcsr |= 0x03;
 		rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
 	}
-- 
1.7.0.4

Re: [PATCH 7/9] rt2x00: Add rt3071 support in rt2800 register initialization.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Add RT3071 specific register initializations to rt2x00, based on the latest
> Ralink rt3070 vendor driver.
> 
> With this patch my RT3071 based devices start showing a sign of life.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
> ---
>  drivers/net/wireless/rt2x00/rt2800lib.c |  105 +++++++++++++++++++++++++++---
>  1 files changed, 94 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
> index 52e2422..209fd85 100644
> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
> @@ -1036,7 +1036,8 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
>  static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
>  {
>  	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
> -		if (rt2x00_rt(rt2x00dev, RT3070))
> +		if (rt2x00_rt(rt2x00dev, RT3070) ||
> +		    rt2x00_rt(rt2x00dev, RT3071))
>  			return 0x1c + (2 * rt2x00dev->lna_gain);
>  		else
>  			return 0x2e + rt2x00dev->lna_gain;
> @@ -1085,6 +1086,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
>  int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  {
>  	u32 reg, reg2;
> +	u16 eeprom;
>  	unsigned int i;
>  
>  	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
> @@ -1202,7 +1204,20 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
>  	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
>  
> -	if (rt2x00_rt(rt2x00dev, RT3070)) {
> +	if (rt2x00_rt(rt2x00dev, RT3071)) {
> +		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
> +		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
> +		if (rt2x00_rev(rt2x00dev) < 0x0211) {
> +			rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
> +			if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
> +				reg = 0x0000002c;
> +			else
> +				reg = 0x0000000f;
> +		} else {
> +			reg = 0x00000000;
> +		}

Is these some meaning to this fields, which makes it easier to use set_field32
with some definition to indicate how the field is named to understand what
the value means?

> -	if (rt2x00_rt(rt2x00dev, RT3070)) {
> +	if (rt2x00_rt(rt2x00dev, RT3071)) {
> +		rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
> +		rfcsr &= ~0x0c;
> +		rfcsr |= 0x31;
> +		rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
> +
> +		rt2800_rfcsr_read(rt2x00dev, 15, &rfcsr);
> +		rfcsr &= ~0x08;
> +		rt2800_rfcsr_write(rt2x00dev, 15, rfcsr);
> +
> +		rt2800_rfcsr_read(rt2x00dev, 20, &rfcsr);
> +		rfcsr &= ~0x08;
> +		rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
> +
> +		rt2800_rfcsr_read(rt2x00dev, 21, &rfcsr);
> +		rfcsr &= ~0x08;
> +		rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
> +	}

Perhaps this needs some rt2x00_set_field8() magic as well. Not sure though

Ivo

Re: [PATCH 7/9] rt2x00: Add rt3071 support in rt2800 register initialization.

[Gertjan van Wingerde]

On 04/09/10 00:38, Ivo van Doorn wrote:
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>> Add RT3071 specific register initializations to rt2x00, based on the latest
>> Ralink rt3070 vendor driver.
>>
>> With this patch my RT3071 based devices start showing a sign of life.
>>
>> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
>> ---
>>  drivers/net/wireless/rt2x00/rt2800lib.c |  105 +++++++++++++++++++++++++++---
>>  1 files changed, 94 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
>> index 52e2422..209fd85 100644
>> --- a/drivers/net/wireless/rt2x00/rt2800lib.c
>> +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
>> @@ -1036,7 +1036,8 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
>>  static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
>>  {
>>  	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
>> -		if (rt2x00_rt(rt2x00dev, RT3070))
>> +		if (rt2x00_rt(rt2x00dev, RT3070) ||
>> +		    rt2x00_rt(rt2x00dev, RT3071))
>>  			return 0x1c + (2 * rt2x00dev->lna_gain);
>>  		else
>>  			return 0x2e + rt2x00dev->lna_gain;
>> @@ -1085,6 +1086,7 @@ EXPORT_SYMBOL_GPL(rt2800_link_tuner);
>>  int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  {
>>  	u32 reg, reg2;
>> +	u16 eeprom;
>>  	unsigned int i;
>>  
>>  	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
>> @@ -1202,7 +1204,20 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
>>  	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
>>  	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
>>  
>> -	if (rt2x00_rt(rt2x00dev, RT3070)) {
>> +	if (rt2x00_rt(rt2x00dev, RT3071)) {
>> +		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
>> +		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
>> +		if (rt2x00_rev(rt2x00dev) < 0x0211) {
>> +			rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
>> +			if (rt2x00_get_field16(eeprom, EEPROM_NIC_DAC_TEST))
>> +				reg = 0x0000002c;
>> +			else
>> +				reg = 0x0000000f;
>> +		} else {
>> +			reg = 0x00000000;
>> +		}
> 
> Is these some meaning to this fields, which makes it easier to use set_field32
> with some definition to indicate how the field is named to understand what
> the value means?

Nope, I'm sorry. I have no clue here. Let's keep it as is for now, as it in the
same style as the other register writes for this register set.

> 
>> -	if (rt2x00_rt(rt2x00dev, RT3070)) {
>> +	if (rt2x00_rt(rt2x00dev, RT3071)) {
>> +		rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
>> +		rfcsr &= ~0x0c;
>> +		rfcsr |= 0x31;
>> +		rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
>> +
>> +		rt2800_rfcsr_read(rt2x00dev, 15, &rfcsr);
>> +		rfcsr &= ~0x08;
>> +		rt2800_rfcsr_write(rt2x00dev, 15, rfcsr);
>> +
>> +		rt2800_rfcsr_read(rt2x00dev, 20, &rfcsr);
>> +		rfcsr &= ~0x08;
>> +		rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
>> +
>> +		rt2800_rfcsr_read(rt2x00dev, 21, &rfcsr);
>> +		rfcsr &= ~0x08;
>> +		rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
>> +	}
> 
> Perhaps this needs some rt2x00_set_field8() magic as well. Not sure though

OK. I'll add some for macros here for these RF CSRs. It probably won't get prettier,
as they will have generic names without a real meaning.

---
Gertjan.

[PATCH 8/9] rt2x00: Add rt3090 support in rt2800 register initialization.

[Gertjan van Wingerde]

Add RT3090 specific register initializations to rt2x00, based on the latest
Ralink rt3090 vendor driver.

Untested as I don't actually own an RT3090 based device, but given experiences
on rt3070/rt3071 very hopeful that this will actually work..

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |   54 ++++++++++++++++++++++--------
 1 files changed, 39 insertions(+), 15 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 209fd85..00f058a 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1037,7 +1037,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 {
 	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
 		if (rt2x00_rt(rt2x00dev, RT3070) ||
-		    rt2x00_rt(rt2x00dev, RT3071))
+		    rt2x00_rt(rt2x00dev, RT3071) ||
+		    rt2x00_rt(rt2x00dev, RT3090))
 			return 0x1c + (2 * rt2x00dev->lna_gain);
 		else
 			return 0x2e + rt2x00dev->lna_gain;
@@ -1204,7 +1205,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
-	if (rt2x00_rt(rt2x00dev, RT3071)) {
+	if (rt2x00_rt(rt2x00dev, RT3071) ||
+	    rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
 		if (rt2x00_rev(rt2x00dev) < 0x0211) {
@@ -1558,9 +1560,9 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 		     rt2800_wait_bbp_ready(rt2x00dev)))
 		return -EACCES;
 
-	if ((rt2x00_rt(rt2x00dev, RT3070) ||
-	     rt2x00_rt(rt2x00dev, RT3071)) &&
-	    rt2x00_rev(rt2x00dev) >= 0x0211) {
+	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211)) {
 		rt2800_bbp_read(rt2x00dev, 31, &value);
 		value &= ~0x03;
 		rt2800_bbp_write(rt2x00dev, 31, value);
@@ -1580,7 +1582,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 70, 0x0a);
 
 	if (rt2x00_rt(rt2x00dev, RT3070) ||
-	    rt2x00_rt(rt2x00dev, RT3071)) {
+	    rt2x00_rt(rt2x00dev, RT3071) ||
+	    rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_bbp_write(rt2x00dev, 79, 0x13);
 		rt2800_bbp_write(rt2x00dev, 80, 0x05);
 		rt2800_bbp_write(rt2x00dev, 81, 0x33);
@@ -1593,6 +1596,7 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	if (!rt2x00_rt(rt2x00dev, RT3070) &&
 	    !rt2x00_rt(rt2x00dev, RT3071) &&
+	    !rt2x00_rt(rt2x00dev, RT3090) &&
 	    rt2x00_rev(rt2x00dev) == 0x101)
 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
 	else
@@ -1603,7 +1607,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 92, 0x00);
 
 	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0201) ||
-	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211))
+	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211))
 		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
 	else
 		rt2800_bbp_write(rt2x00dev, 103, 0x00);
@@ -1611,7 +1616,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
 	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
-	if (rt2x00_rt(rt2x00dev, RT3071)) {
+	if (rt2x00_rt(rt2x00dev, RT3071) ||
+	    rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_bbp_read(rt2x00dev, 138, &value);
 
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
@@ -1705,7 +1711,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	u16 eeprom;
 
 	if (!rt2x00_rt(rt2x00dev, RT3070) &&
-	    !rt2x00_rt(rt2x00dev, RT3071))
+	    !rt2x00_rt(rt2x00dev, RT3071) &&
+	    !rt2x00_rt(rt2x00dev, RT3090))
 		return 0;
 
 	/*
@@ -1719,7 +1726,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
 
 	if (rt2x00_rt(rt2x00dev, RT3070) ||
-	    rt2x00_rt(rt2x00dev, RT3071)) {
+	    rt2x00_rt(rt2x00dev, RT3071) ||
+	    rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
 		rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
 		rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
@@ -1746,7 +1754,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);
 		rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 3);
 		rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
-	} else if (rt2x00_rt(rt2x00dev, RT3071)) {
+	} else if (rt2x00_rt(rt2x00dev, RT3071) || rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
 		rt2x00_set_field8(&rfcsr, RFCSR6_R2, 1);
 		rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
@@ -1773,7 +1781,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
 		rt2x00dev->calibration[1] =
 			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
-	} else if (rt2x00_rt(rt2x00dev, RT3071)) {
+	} else if (rt2x00_rt(rt2x00dev, RT3071) ||
+		   rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2x00dev->calibration[0] =
 			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13);
 		rt2x00dev->calibration[1] =
@@ -1797,7 +1806,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 4, bbp);
 
 	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) ||
-	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211))
+	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211))
 		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
 
 	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
@@ -1806,7 +1816,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
 	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
-	if (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) {
+	if ((rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211)) {
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
 		if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
 			rt2x00_set_field8(&rfcsr, RFCSR17_R3, 1);
@@ -1816,7 +1827,20 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2x00_set_field8(&rfcsr, RFCSR17_R1, eeprom & 0x07);
 	rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
 
-	if (rt2x00_rt(rt2x00dev, RT3071)) {
+	if (rt2x00_rt(rt2x00dev, RT3090)) {
+		rt2800_bbp_read(rt2x00dev, 138, &bbp);
+
+		rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
+		if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH) == 1)
+			rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0);
+		if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) == 1)
+			rt2x00_set_field8(&bbp, BBP138_TX_DAC1, 1);
+
+		rt2800_bbp_write(rt2x00dev, 138, bbp);
+	}
+
+	if (rt2x00_rt(rt2x00dev, RT3071) ||
+	    rt2x00_rt(rt2x00dev, RT3090)) {
 		rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
 		rfcsr &= ~0x0c;
 		rfcsr |= 0x31;
-- 
1.7.0.4

Re: [PATCH 8/9] rt2x00: Add rt3090 support in rt2800 register initialization.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Add RT3090 specific register initializations to rt2x00, based on the latest
> Ralink rt3090 vendor driver.
> 
> Untested as I don't actually own an RT3090 based device, but given experiences
> on rt3070/rt3071 very hopeful that this will actually work..
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>

[PATCH 9/9] rt2x00: Add rt3390 support in rt2800 register initialization.

[Gertjan van Wingerde]

Add RT3390 specific register initializations to rt2x00, based on the latest
Ralink rt3390 vendor driver.

Untested as I don't actually own an RT3390 based device, but given experiences
on rt3070/rt3071 very hopeful that this will actually work..

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |   71 ++++++++++++++++++++++++++-----
 1 files changed, 60 insertions(+), 11 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 00f058a..59542af 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1038,7 +1038,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 	if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
 		if (rt2x00_rt(rt2x00dev, RT3070) ||
 		    rt2x00_rt(rt2x00dev, RT3071) ||
-		    rt2x00_rt(rt2x00dev, RT3090))
+		    rt2x00_rt(rt2x00dev, RT3090) ||
+		    rt2x00_rt(rt2x00dev, RT3390))
 			return 0x1c + (2 * rt2x00dev->lna_gain);
 		else
 			return 0x2e + rt2x00dev->lna_gain;
@@ -1206,7 +1207,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
 	if (rt2x00_rt(rt2x00dev, RT3071) ||
-	    rt2x00_rt(rt2x00dev, RT3090)) {
+	    rt2x00_rt(rt2x00dev, RT3090) ||
+	    rt2x00_rt(rt2x00dev, RT3390)) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
 		if (rt2x00_rev(rt2x00dev) < 0x0211) {
@@ -1562,7 +1564,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
 	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
-	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211)) {
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3390) && rt2x00_rev(rt2x00dev) >= 0x0211)) {
 		rt2800_bbp_read(rt2x00dev, 31, &value);
 		value &= ~0x03;
 		rt2800_bbp_write(rt2x00dev, 31, value);
@@ -1583,7 +1586,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	if (rt2x00_rt(rt2x00dev, RT3070) ||
 	    rt2x00_rt(rt2x00dev, RT3071) ||
-	    rt2x00_rt(rt2x00dev, RT3090)) {
+	    rt2x00_rt(rt2x00dev, RT3090) ||
+	    rt2x00_rt(rt2x00dev, RT3390)) {
 		rt2800_bbp_write(rt2x00dev, 79, 0x13);
 		rt2800_bbp_write(rt2x00dev, 80, 0x05);
 		rt2800_bbp_write(rt2x00dev, 81, 0x33);
@@ -1597,6 +1601,7 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	if (!rt2x00_rt(rt2x00dev, RT3070) &&
 	    !rt2x00_rt(rt2x00dev, RT3071) &&
 	    !rt2x00_rt(rt2x00dev, RT3090) &&
+	    !rt2x00_rt(rt2x00dev, RT3390) &&
 	    rt2x00_rev(rt2x00dev) == 0x101)
 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
 	else
@@ -1608,7 +1613,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) >= 0x0201) ||
 	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
-	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211))
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) >= 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3390) && rt2x00_rev(rt2x00dev) >= 0x0211))
 		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
 	else
 		rt2800_bbp_write(rt2x00dev, 103, 0x00);
@@ -1617,7 +1623,8 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
 	if (rt2x00_rt(rt2x00dev, RT3071) ||
-	    rt2x00_rt(rt2x00dev, RT3090)) {
+	    rt2x00_rt(rt2x00dev, RT3090) ||
+	    rt2x00_rt(rt2x00dev, RT3390)) {
 		rt2800_bbp_read(rt2x00dev, 138, &value);
 
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
@@ -1712,7 +1719,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 
 	if (!rt2x00_rt(rt2x00dev, RT3070) &&
 	    !rt2x00_rt(rt2x00dev, RT3071) &&
-	    !rt2x00_rt(rt2x00dev, RT3090))
+	    !rt2x00_rt(rt2x00dev, RT3090) &&
+	    !rt2x00_rt(rt2x00dev, RT3390))
 		return 0;
 
 	/*
@@ -1747,6 +1755,39 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
 		rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
 		rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
+	} else if (rt2x00_rt(rt2x00dev, RT3390)) {
+		rt2800_rfcsr_write(rt2x00dev, 0, 0xa0);
+		rt2800_rfcsr_write(rt2x00dev, 1, 0xe1);
+		rt2800_rfcsr_write(rt2x00dev, 2, 0xf1);
+		rt2800_rfcsr_write(rt2x00dev, 3, 0x62);
+		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
+		rt2800_rfcsr_write(rt2x00dev, 5, 0x8b);
+		rt2800_rfcsr_write(rt2x00dev, 6, 0x42);
+		rt2800_rfcsr_write(rt2x00dev, 7, 0x34);
+		rt2800_rfcsr_write(rt2x00dev, 8, 0x00);
+		rt2800_rfcsr_write(rt2x00dev, 9, 0xc0);
+		rt2800_rfcsr_write(rt2x00dev, 10, 0x61);
+		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+		rt2800_rfcsr_write(rt2x00dev, 12, 0x3b);
+		rt2800_rfcsr_write(rt2x00dev, 13, 0xe0);
+		rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
+		rt2800_rfcsr_write(rt2x00dev, 15, 0x53);
+		rt2800_rfcsr_write(rt2x00dev, 16, 0xe0);
+		rt2800_rfcsr_write(rt2x00dev, 17, 0x94);
+		rt2800_rfcsr_write(rt2x00dev, 18, 0x5c);
+		rt2800_rfcsr_write(rt2x00dev, 19, 0x4a);
+		rt2800_rfcsr_write(rt2x00dev, 20, 0xb2);
+		rt2800_rfcsr_write(rt2x00dev, 21, 0xf6);
+		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+		rt2800_rfcsr_write(rt2x00dev, 23, 0x14);
+		rt2800_rfcsr_write(rt2x00dev, 24, 0x08);
+		rt2800_rfcsr_write(rt2x00dev, 25, 0x3d);
+		rt2800_rfcsr_write(rt2x00dev, 26, 0x85);
+		rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+		rt2800_rfcsr_write(rt2x00dev, 28, 0x41);
+		rt2800_rfcsr_write(rt2x00dev, 29, 0x8f);
+		rt2800_rfcsr_write(rt2x00dev, 30, 0x20);
+		rt2800_rfcsr_write(rt2x00dev, 31, 0x0f);
 	}
 
 	if (rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) {
@@ -1771,6 +1812,10 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 				rt2x00_set_field32(&reg, LDO_CFG0_LDO_CORE_VLEVEL, 0);
 		}
 		rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
+	} else if (rt2x00_rt(rt2x00dev, RT3390)) {
+		rt2800_register_read(rt2x00dev, GPIO_SWITCH, &reg);
+		rt2x00_set_field32(&reg, GPIO_SWITCH_5, 0);
+		rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg);
 	}
 
 	/*
@@ -1782,7 +1827,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 		rt2x00dev->calibration[1] =
 			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
 	} else if (rt2x00_rt(rt2x00dev, RT3071) ||
-		   rt2x00_rt(rt2x00dev, RT3090)) {
+		   rt2x00_rt(rt2x00dev, RT3090) ||
+		   rt2x00_rt(rt2x00dev, RT3390)) {
 		rt2x00dev->calibration[0] =
 			rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13);
 		rt2x00dev->calibration[1] =
@@ -1807,7 +1853,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 
 	if ((rt2x00_rt(rt2x00dev, RT3070) && rt2x00_rev(rt2x00dev) < 0x0201) ||
 	    (rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) ||
-	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211))
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3390) && rt2x00_rev(rt2x00dev) < 0x0211))
 		rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
 
 	rt2800_register_read(rt2x00dev, OPT_14_CSR, &reg);
@@ -1817,7 +1864,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
 	rt2x00_set_field8(&rfcsr, RFCSR17_R2, 0);
 	if ((rt2x00_rt(rt2x00dev, RT3071) && rt2x00_rev(rt2x00dev) < 0x0211) ||
-	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211)) {
+	    (rt2x00_rt(rt2x00dev, RT3090) && rt2x00_rev(rt2x00dev) < 0x0211) ||
+	    (rt2x00_rt(rt2x00dev, RT3390) && rt2x00_rev(rt2x00dev) < 0x0211)) {
 		rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
 		if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
 			rt2x00_set_field8(&rfcsr, RFCSR17_R3, 1);
@@ -1840,7 +1888,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 	}
 
 	if (rt2x00_rt(rt2x00dev, RT3071) ||
-	    rt2x00_rt(rt2x00dev, RT3090)) {
+	    rt2x00_rt(rt2x00dev, RT3090) ||
+	    rt2x00_rt(rt2x00dev, RT3390)) {
 		rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
 		rfcsr &= ~0x0c;
 		rfcsr |= 0x31;
-- 
1.7.0.4

Re: [PATCH 9/9] rt2x00: Add rt3390 support in rt2800 register initialization.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> Add RT3390 specific register initializations to rt2x00, based on the latest
> Ralink rt3390 vendor driver.
> 
> Untested as I don't actually own an RT3390 based device, but given experiences
> on rt3070/rt3071 very hopeful that this will actually work..
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>

Re: [PATCH 0/9] rt2x00: Align with vendor driver and add support for rt3070/rt3071/rt3090/rt3390.

[Ivo van Doorn]

On Thursday 08 April 2010, Gertjan van Wingerde wrote:
> This patch series aligns rt2x00 with the latest versions of the Ralink 
> rt2860 / rt2870 / rt3070 / rt3090 drivers, and adds support for RT3070,
> RT3071, RT3090, and RT3390 based devices.
> 
> The patches are relative to wireless-next-2.6, and can also be pulled
> from:
> 
> 	git://git.gwingerde.nl/rt2x00-next-2.6

Any idea what the status is of rt2870 and rt2770 devices after this series?

Ivo

Re: [PATCH 0/9] rt2x00: Align with vendor driver and add support for rt3070/rt3071/rt3090/rt3390.

[Gertjan van Wingerde]

On 04/09/10 00:16, Ivo van Doorn wrote:
> On Thursday 08 April 2010, Gertjan van Wingerde wrote:
>> This patch series aligns rt2x00 with the latest versions of the Ralink 
>> rt2860 / rt2870 / rt3070 / rt3090 drivers, and adds support for RT3070,
>> RT3071, RT3090, and RT3390 based devices.
>>
>> The patches are relative to wireless-next-2.6, and can also be pulled
>> from:
>>
>> 	git://git.gwingerde.nl/rt2x00-next-2.6
> 
> Any idea what the status is of rt2870 and rt2770 devices after this series?
> 

To be honest I only could get my RT2870 device (which is actually identified as an
RT2860) to scan properly when I tested it.
However, I had major USB connection issues with that device at the time, so the USB
connectivity would not survive a association / authentication cycle towards my WPA2-
protect network.

However, I did manage to connect to this network with my RT3070 device, so I have
no reason to believe that things would be different for RT2870.

One thing that I believe is still missing for the whole RT28xx/RT3xxx devices is
proper 802.11n support. I am not sure about that, as I haven't really investigated
that yet, but my feeling, based on what other drivers had to do to support 802.11n,
is that we need more work inside rt2x00 to properly support 802.11n.

---
Gertjan.

[PATCH v2 0/9] rt2x00: Align with vendor driver and add support for rt3070/rt3071/rt3090/rt3390.

[Gertjan van Wingerde]

This patch series aligns rt2x00 with the latest versions of the Ralink 
rt2860 / rt2870 / rt3070 / rt3090 drivers, and adds support for RT3070,
RT3071, RT3090, and RT3390 based devices.

The patches are relative to wireless-next-2.6, and can also be pulled
from:

	git://git.gwingerde.nl/rt2x00-next-2.6

v2: Handle comments received from Ivo, Julian and Felix.

Gertjan van Wingerde (9):
  rt2x00: Let RF chipset decide the RF channel switch method to use in rt2800.
  rt2x00: Update rt2800 register definitions towards latest definitions.
  rt2x00: Align RT chipset definitions with vendor driver.
  rt2x00: Refactor rt2800 version constants.
  rt2x00: Align rt2800 register initialization with vendor driver.
  rt2x00: Finish rt3070 support in rt2800 register initialization.
  rt2x00: Add rt3071 support in rt2800 register initialization.
  rt2x00: Add rt3090 support in rt2800 register initialization.
  rt2x00: Add rt3390 support in rt2800 register initialization.

 drivers/net/wireless/rt2x00/rt2800.h    |  108 +++++++-
 drivers/net/wireless/rt2x00/rt2800lib.c |  464 ++++++++++++++++++++++---------
 drivers/net/wireless/rt2x00/rt2800pci.c |   13 -
 drivers/net/wireless/rt2x00/rt2x00.h    |   29 ++-
 4 files changed, 458 insertions(+), 156 deletions(-)

[PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Gertjan van Wingerde]

Align the rt2800 register initializations with the latest versions of the
Ralink vendor driver.
This patch is also preparation for the addition of support for RT3070 /
RT3071 / RT3090 / RT3390 based devices.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
---
 drivers/net/wireless/rt2x00/rt2800lib.c |  130 ++++++++++++++++++++++--------
 drivers/net/wireless/rt2x00/rt2800pci.c |   13 ---
 2 files changed, 95 insertions(+), 48 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 8a4ed76..1890b9a 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -359,11 +359,6 @@ static int rt2800_blink_set(struct led_classdev *led_cdev,
 	rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
 	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
 	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
-	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
-	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
-	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
 	rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
 
 	return 0;
@@ -609,10 +604,6 @@ void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
 {
 	u32 reg;
 
-	rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
-	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
-	rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
 	rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
 			   !!erp->short_preamble);
@@ -631,15 +622,12 @@ void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
 
 	rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
 	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
-	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
 	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
-	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
 	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
-	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
 	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
@@ -984,10 +972,6 @@ static void rt2800_config_retry_limit(struct rt2x00_dev *rt2x00dev,
 			   libconf->conf->short_frame_max_tx_count);
 	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
 			   libconf->conf->long_frame_max_tx_count);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
-	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
 	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
 }
 
@@ -1110,6 +1094,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	u32 reg;
 	unsigned int i;
 
+	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
+	rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
+	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+
 	if (rt2x00_is_usb(rt2x00dev)) {
 		/*
 		 * Wait until BBP and RF are ready.
@@ -1129,8 +1121,25 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 		rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
 		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL,
 				      reg & ~0x00002000);
-	} else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
+	} else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
+		/*
+		 * Reset DMA indexes
+		 */
+		rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
+		rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
+		rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
+
+		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
+		rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
+
 		rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
+	}
 
 	rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
 	rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
@@ -1175,6 +1184,13 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
 	rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
+	rt2800_config_filter(rt2x00dev, FIF_ALLMULTI);
+
+	rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
+	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, 9);
+	rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
+	rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
+
 	if (rt2x00_is_usb(rt2x00dev) &&
 	    rt2x00_rt_rev(rt2x00dev, RT3070, REV_RT3070E)) {
 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
@@ -1198,6 +1214,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
 	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
+	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 32);
 	rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
 	rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
 
@@ -1213,38 +1230,61 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
 	rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
 
+	rt2800_register_read(rt2x00dev, LED_CFG, &reg);
+	rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, 70);
+	rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, 30);
+	rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
+	rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
+	rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
+	rt2800_register_write(rt2x00dev, LED_CFG, reg);
+
 	rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
 
+	rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 15);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 31);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
+	rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
+	rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
+
 	rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
+	rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY, 1);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
+	rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE, 1);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
 	rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
 	rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 3);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
-	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 1);
 	rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 3);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
-	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 1);
 	rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
@@ -1257,11 +1297,13 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
-	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
+	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL,
+			   !rt2x00_is_usb(rt2x00dev));
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
@@ -1269,6 +1311,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
@@ -1281,6 +1324,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+	rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
 
 	rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
@@ -1293,6 +1337,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
 	rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+	rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, 0);
 	rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
 
 	if (rt2x00_is_usb(rt2x00dev)) {
@@ -1322,6 +1367,15 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 	rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
 
 	rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
+
+	rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, 32);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, 32);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, 314);
+	rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
+	rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
+
 	rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
 
 	/*
@@ -1471,26 +1525,32 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
 
 	rt2800_bbp_write(rt2x00dev, 65, 0x2c);
 	rt2800_bbp_write(rt2x00dev, 66, 0x38);
-	rt2800_bbp_write(rt2x00dev, 69, 0x12);
+
+	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {
+		rt2800_bbp_write(rt2x00dev, 69, 0x16);
+		rt2800_bbp_write(rt2x00dev, 73, 0x12);
+	} else {
+		rt2800_bbp_write(rt2x00dev, 69, 0x12);
+		rt2800_bbp_write(rt2x00dev, 73, 0x10);
+	}
+
 	rt2800_bbp_write(rt2x00dev, 70, 0x0a);
-	rt2800_bbp_write(rt2x00dev, 73, 0x10);
 	rt2800_bbp_write(rt2x00dev, 81, 0x37);
 	rt2800_bbp_write(rt2x00dev, 82, 0x62);
 	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
-	rt2800_bbp_write(rt2x00dev, 84, 0x99);
+
+	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D) ||
+	    rt2x00_rt_rev(rt2x00dev, RT2870, REV_RT2870D))
+		rt2800_bbp_write(rt2x00dev, 84, 0x19);
+	else
+		rt2800_bbp_write(rt2x00dev, 84, 0x99);
+
 	rt2800_bbp_write(rt2x00dev, 86, 0x00);
 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
 	rt2800_bbp_write(rt2x00dev, 92, 0x00);
 	rt2800_bbp_write(rt2x00dev, 103, 0x00);
 	rt2800_bbp_write(rt2x00dev, 105, 0x05);
-
-	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {
-		rt2800_bbp_write(rt2x00dev, 69, 0x16);
-		rt2800_bbp_write(rt2x00dev, 73, 0x12);
-	}
-
-	if (rt2x00_rt_rev_gte(rt2x00dev, RT2860, REV_RT2860D))
-		rt2800_bbp_write(rt2x00dev, 84, 0x19);
+	rt2800_bbp_write(rt2x00dev, 106, 0x35);
 
 	if (rt2x00_rt(rt2x00dev, RT2872)) {
 		rt2800_bbp_write(rt2x00dev, 31, 0x08);
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index a2b37d3..2131f8f 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -347,19 +347,6 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
 	struct queue_entry_priv_pci *entry_priv;
 	u32 reg;
 
-	rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
-	rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
-	rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
-
-	rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
-	rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
-
 	/*
 	 * Initialize registers.
 	 */
-- 
1.7.0.4

Re: [PATCH 5/9] rt2x00: Align rt2800 register initialization with vendor driver.

[Ivo van Doorn]

On Sunday 11 April 2010, Gertjan van Wingerde wrote:
> Align the rt2800 register initializations with the latest versions of the
> Ralink vendor driver.
> This patch is also preparation for the addition of support for RT3070 /
> RT3071 / RT3090 / RT3390 based devices.
> 
> Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>

Acked-by: Ivo van Doorn <IvDoorn@gmail.com>