* [PATCH] ASoC: register cache should be 1 byte aligned for 1 byte long register
@ 2010-08-07 15:16 Mike Frysinger
2010-08-10 14:42 ` Mark Brown
0 siblings, 1 reply; 2+ messages in thread
From: Mike Frysinger @ 2010-08-07 15:16 UTC (permalink / raw)
To: alsa-devel, Mark Brown; +Cc: uclinux-dist-devel, Cliff Cai
From: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
sound/soc/soc-cache.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c
index 472af38..adbc68c 100644
--- a/sound/soc/soc-cache.c
+++ b/sound/soc/soc-cache.c
@@ -340,7 +340,7 @@ static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
unsigned int reg)
{
- u16 *cache = codec->reg_cache;
+ u8 *cache = codec->reg_cache;
reg &= 0xff;
if (reg >= codec->reg_cache_size)
@@ -351,7 +351,7 @@ static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
- u16 *cache = codec->reg_cache;
+ u8 *cache = codec->reg_cache;
u8 data[3];
int ret;
--
1.7.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ASoC: register cache should be 1 byte aligned for 1 byte long register
2010-08-07 15:16 [PATCH] ASoC: register cache should be 1 byte aligned for 1 byte long register Mike Frysinger
@ 2010-08-10 14:42 ` Mark Brown
0 siblings, 0 replies; 2+ messages in thread
From: Mark Brown @ 2010-08-10 14:42 UTC (permalink / raw)
To: Mike Frysinger; +Cc: uclinux-dist-devel, alsa-devel, Cliff Cai
On Sat, Aug 07, 2010 at 11:16:27AM -0400, Mike Frysinger wrote:
> From: Cliff Cai <cliff.cai@analog.com>
>
> Signed-off-by: Cliff Cai <cliff.cai@analog.com>
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Applied, thanks.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2010-08-07 15:16 [PATCH] ASoC: register cache should be 1 byte aligned for 1 byte long register Mike Frysinger
2010-08-10 14:42 ` Mark Brown
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