* [PATCH net-next 0/4] cxgb4 updates @ 2010-08-24 3:20 Dimitris Michailidis 2010-08-24 3:20 ` [PATCH net-next 1/4] cxgb4: handle Rx/Tx queue ranges not starting at 0 Dimitris Michailidis 2010-08-24 3:38 ` [PATCH net-next 0/4] cxgb4 updates David Miller 0 siblings, 2 replies; 6+ messages in thread From: Dimitris Michailidis @ 2010-08-24 3:20 UTC (permalink / raw) To: netdev Here are 4 patches for cxgb4 enabling the driver to work on PCI functions other than 0. The first 3 are preparatory, the last one updates PCI IDs. All for net-next. drivers/net/cxgb4/cxgb4.h | 2 + drivers/net/cxgb4/cxgb4_main.c | 94 +++++++++++++++++++++++++++++---------- drivers/net/cxgb4/sge.c | 17 ++++--- drivers/net/cxgb4/t4_hw.h | 1 + drivers/net/cxgb4/t4fw_api.h | 5 ++ 5 files changed, 88 insertions(+), 31 deletions(-) ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH net-next 1/4] cxgb4: handle Rx/Tx queue ranges not starting at 0 2010-08-24 3:20 [PATCH net-next 0/4] cxgb4 updates Dimitris Michailidis @ 2010-08-24 3:20 ` Dimitris Michailidis 2010-08-24 3:20 ` [PATCH net-next 2/4] cxgb4: support eeprom read/write on functions other than 0 Dimitris Michailidis 2010-08-24 3:38 ` [PATCH net-next 0/4] cxgb4 updates David Miller 1 sibling, 1 reply; 6+ messages in thread From: Dimitris Michailidis @ 2010-08-24 3:20 UTC (permalink / raw) To: netdev; +Cc: Dimitris Michailidis Currently the driver assumes that queue IDs start at 0 but that's true only for function 0. To support operation on other functions get the start of the queue ranges from FW and offset accordingly. Signed-off-by: Dimitris Michailidis <dm@chelsio.com> --- drivers/net/cxgb4/cxgb4.h | 2 ++ drivers/net/cxgb4/cxgb4_main.c | 24 +++++++++++++++++++----- drivers/net/cxgb4/sge.c | 15 +++++++++------ drivers/net/cxgb4/t4fw_api.h | 5 +++++ 4 files changed, 35 insertions(+), 11 deletions(-) diff --git a/drivers/net/cxgb4/cxgb4.h b/drivers/net/cxgb4/cxgb4.h index 6e562c0..3ece9f5 100644 --- a/drivers/net/cxgb4/cxgb4.h +++ b/drivers/net/cxgb4/cxgb4.h @@ -463,6 +463,8 @@ struct sge { u8 counter_val[SGE_NCOUNTERS]; unsigned int starve_thres; u8 idma_state[2]; + unsigned int egr_start; + unsigned int ingr_start; void *egr_map[MAX_EGRQ]; /* qid->queue egress queue map */ struct sge_rspq *ingr_map[MAX_INGQ]; /* qid->queue ingress queue map */ DECLARE_BITMAP(starving_fl, MAX_EGRQ); diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c index c327527..6e08e2d 100644 --- a/drivers/net/cxgb4/cxgb4_main.c +++ b/drivers/net/cxgb4/cxgb4_main.c @@ -423,10 +423,11 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp, if (likely(opcode == CPL_SGE_EGR_UPDATE)) { const struct cpl_sge_egr_update *p = (void *)rsp; unsigned int qid = EGR_QID(ntohl(p->opcode_qid)); - struct sge_txq *txq = q->adap->sge.egr_map[qid]; + struct sge_txq *txq; + txq = q->adap->sge.egr_map[qid - q->adap->sge.egr_start]; txq->restarts++; - if ((u8 *)txq < (u8 *)q->adap->sge.ethrxq) { + if ((u8 *)txq < (u8 *)q->adap->sge.ofldtxq) { struct sge_eth_txq *eq; eq = container_of(txq, struct sge_eth_txq, q); @@ -658,6 +659,15 @@ static int setup_rss(struct adapter *adap) } /* + * Return the channel of the ingress queue with the given qid. + */ +static unsigned int rxq_to_chan(const struct sge *p, unsigned int qid) +{ + qid -= p->ingr_start; + return netdev2pinfo(p->ingr_map[qid]->netdev)->tx_chan; +} + +/* * Wait until all NAPI handlers are descheduled. */ static void quiesce_rx(struct adapter *adap) @@ -2304,7 +2314,7 @@ int cxgb4_create_server(const struct net_device *dev, unsigned int stid, req->peer_port = htons(0); req->local_ip = sip; req->peer_ip = htonl(0); - chan = netdev2pinfo(adap->sge.ingr_map[queue]->netdev)->tx_chan; + chan = rxq_to_chan(&adap->sge, queue); req->opt0 = cpu_to_be64(TX_CHAN(chan)); req->opt1 = cpu_to_be64(CONN_POLICY_ASK | SYN_RSS_ENABLE | SYN_RSS_QUEUE(queue)); @@ -2346,7 +2356,7 @@ int cxgb4_create_server6(const struct net_device *dev, unsigned int stid, req->local_ip_lo = *(__be64 *)(sip->s6_addr + 8); req->peer_ip_hi = cpu_to_be64(0); req->peer_ip_lo = cpu_to_be64(0); - chan = netdev2pinfo(adap->sge.ingr_map[queue]->netdev)->tx_chan; + chan = rxq_to_chan(&adap->sge, queue); req->opt0 = cpu_to_be64(TX_CHAN(chan)); req->opt1 = cpu_to_be64(CONN_POLICY_ASK | SYN_RSS_ENABLE | SYN_RSS_QUEUE(queue)); @@ -3061,12 +3071,16 @@ static int adap_init0(struct adapter *adap) params[2] = FW_PARAM_PFVF(L2T_END); params[3] = FW_PARAM_PFVF(FILTER_START); params[4] = FW_PARAM_PFVF(FILTER_END); - ret = t4_query_params(adap, adap->fn, adap->fn, 0, 5, params, val); + params[5] = FW_PARAM_PFVF(IQFLINT_START); + params[6] = FW_PARAM_PFVF(EQ_START); + ret = t4_query_params(adap, adap->fn, adap->fn, 0, 7, params, val); if (ret < 0) goto bye; port_vec = val[0]; adap->tids.ftid_base = val[3]; adap->tids.nftids = val[4] - val[3] + 1; + adap->sge.ingr_start = val[5]; + adap->sge.egr_start = val[6]; if (c.ofldcaps) { /* query offload-related parameters */ diff --git a/drivers/net/cxgb4/sge.c b/drivers/net/cxgb4/sge.c index bf38cfc..44c2e6c 100644 --- a/drivers/net/cxgb4/sge.c +++ b/drivers/net/cxgb4/sge.c @@ -557,7 +557,8 @@ out: cred = q->avail - cred; if (unlikely(fl_starving(q))) { smp_wmb(); - set_bit(q->cntxt_id, adap->sge.starving_fl); + set_bit(q->cntxt_id - adap->sge.egr_start, + adap->sge.starving_fl); } return cred; @@ -1213,7 +1214,8 @@ static void txq_stop_maperr(struct sge_ofld_txq *q) { q->mapping_err++; q->q.stops++; - set_bit(q->q.cntxt_id, q->adap->sge.txq_maperr); + set_bit(q->q.cntxt_id - q->adap->sge.egr_start, + q->adap->sge.txq_maperr); } /** @@ -1835,6 +1837,7 @@ static unsigned int process_intrq(struct adapter *adap) if (RSPD_TYPE(rc->type_gen) == RSP_TYPE_INTR) { unsigned int qid = ntohl(rc->pldbuflen_qid); + qid -= adap->sge.ingr_start; napi_schedule(&adap->sge.ingr_map[qid]->napi); } @@ -2050,14 +2053,14 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, /* set offset to -1 to distinguish ingress queues without FL */ iq->offset = fl ? 0 : -1; - adap->sge.ingr_map[iq->cntxt_id] = iq; + adap->sge.ingr_map[iq->cntxt_id - adap->sge.ingr_start] = iq; if (fl) { fl->cntxt_id = ntohs(c.fl0id); fl->avail = fl->pend_cred = 0; fl->pidx = fl->cidx = 0; fl->alloc_failed = fl->large_alloc_failed = fl->starving = 0; - adap->sge.egr_map[fl->cntxt_id] = fl; + adap->sge.egr_map[fl->cntxt_id - adap->sge.egr_start] = fl; refill_fl(adap, fl, fl_cap(fl), GFP_KERNEL); } return 0; @@ -2087,7 +2090,7 @@ static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id) q->stops = q->restarts = 0; q->stat = (void *)&q->desc[q->size]; q->cntxt_id = id; - adap->sge.egr_map[id] = q; + adap->sge.egr_map[id - adap->sge.egr_start] = q; } int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, @@ -2259,7 +2262,7 @@ static void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, { unsigned int fl_id = fl ? fl->cntxt_id : 0xffff; - adap->sge.ingr_map[rq->cntxt_id] = NULL; + adap->sge.ingr_map[rq->cntxt_id - adap->sge.ingr_start] = NULL; t4_iq_free(adap, adap->fn, adap->fn, 0, FW_IQ_TYPE_FL_INT_CAP, rq->cntxt_id, fl_id, 0xffff); dma_free_coherent(adap->pdev_dev, (rq->size + 1) * rq->iqe_len, diff --git a/drivers/net/cxgb4/t4fw_api.h b/drivers/net/cxgb4/t4fw_api.h index 0969f2f..940584a 100644 --- a/drivers/net/cxgb4/t4fw_api.h +++ b/drivers/net/cxgb4/t4fw_api.h @@ -487,6 +487,11 @@ enum fw_params_param_pfvf { FW_PARAMS_PARAM_PFVF_CPMASK = 0x25, FW_PARAMS_PARAM_PFVF_OCQ_START = 0x26, FW_PARAMS_PARAM_PFVF_OCQ_END = 0x27, + FW_PARAMS_PARAM_PFVF_CONM_MAP = 0x28, + FW_PARAMS_PARAM_PFVF_IQFLINT_START = 0x29, + FW_PARAMS_PARAM_PFVF_IQFLINT_END = 0x2A, + FW_PARAMS_PARAM_PFVF_EQ_START = 0x2B, + FW_PARAMS_PARAM_PFVF_EQ_END = 0x2C, }; /* -- 1.5.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH net-next 2/4] cxgb4: support eeprom read/write on functions other than 0 2010-08-24 3:20 ` [PATCH net-next 1/4] cxgb4: handle Rx/Tx queue ranges not starting at 0 Dimitris Michailidis @ 2010-08-24 3:20 ` Dimitris Michailidis 2010-08-24 3:21 ` [PATCH net-next 3/4] cxgb4: fix setting of the function number in transmit descriptors Dimitris Michailidis 0 siblings, 1 reply; 6+ messages in thread From: Dimitris Michailidis @ 2010-08-24 3:20 UTC (permalink / raw) To: netdev; +Cc: Dimitris Michailidis Extend the address translation for eeprom read/write (code used by ethtool -[eE]) to functions other than 0. Signed-off-by: Dimitris Michailidis <dm@chelsio.com> --- drivers/net/cxgb4/cxgb4_main.c | 40 +++++++++++++++++++++++++++++++--------- drivers/net/cxgb4/t4_hw.h | 1 + 2 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c index 6e08e2d..cadf334 100644 --- a/drivers/net/cxgb4/cxgb4_main.c +++ b/drivers/net/cxgb4/cxgb4_main.c @@ -1681,27 +1681,41 @@ static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) return 0; } -/* - * Translate a physical EEPROM address to virtual. The first 1K is accessed - * through virtual addresses starting at 31K, the rest is accessed through - * virtual addresses starting at 0. This mapping is correct only for PF0. +/** + * eeprom_ptov - translate a physical EEPROM address to virtual + * @phys_addr: the physical EEPROM address + * @fn: the PCI function number + * @sz: size of function-specific area + * + * Translate a physical EEPROM address to virtual. The first 1K is + * accessed through virtual addresses starting at 31K, the rest is + * accessed through virtual addresses starting at 0. + * + * The mapping is as follows: + * [0..1K) -> [31K..32K) + * [1K..1K+A) -> [31K-A..31K) + * [1K+A..ES) -> [0..ES-A-1K) + * + * where A = @fn * @sz, and ES = EEPROM size. */ -static int eeprom_ptov(unsigned int phys_addr) +static int eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz) { + fn *= sz; if (phys_addr < 1024) return phys_addr + (31 << 10); + if (phys_addr < 1024 + fn) + return 31744 - fn + phys_addr - 1024; if (phys_addr < EEPROMSIZE) - return phys_addr - 1024; + return phys_addr - 1024 - fn; return -EINVAL; } /* * The next two routines implement eeprom read/write from physical addresses. - * The physical->virtual translation is correct only for PF0. */ static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) { - int vaddr = eeprom_ptov(phys_addr); + int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE); if (vaddr >= 0) vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); @@ -1710,7 +1724,7 @@ static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) { - int vaddr = eeprom_ptov(phys_addr); + int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE); if (vaddr >= 0) vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); @@ -1753,6 +1767,14 @@ static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, aligned_offset = eeprom->offset & ~3; aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; + if (adapter->fn > 0) { + u32 start = 1024 + adapter->fn * EEPROMPFSIZE; + + if (aligned_offset < start || + aligned_offset + aligned_len > start + EEPROMPFSIZE) + return -EPERM; + } + if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { /* * RMW possibly needed for first or last words. diff --git a/drivers/net/cxgb4/t4_hw.h b/drivers/net/cxgb4/t4_hw.h index 10a0555..c26b455 100644 --- a/drivers/net/cxgb4/t4_hw.h +++ b/drivers/net/cxgb4/t4_hw.h @@ -42,6 +42,7 @@ enum { MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ EEPROMSIZE = 17408, /* Serial EEPROM physical size */ EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ + EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */ RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ TCB_SIZE = 128, /* TCB size */ NMTUS = 16, /* size of MTU table */ -- 1.5.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH net-next 3/4] cxgb4: fix setting of the function number in transmit descriptors 2010-08-24 3:20 ` [PATCH net-next 2/4] cxgb4: support eeprom read/write on functions other than 0 Dimitris Michailidis @ 2010-08-24 3:21 ` Dimitris Michailidis 2010-08-24 3:21 ` [PATCH net-next 4/4] cxgb4: update PCI ids Dimitris Michailidis 0 siblings, 1 reply; 6+ messages in thread From: Dimitris Michailidis @ 2010-08-24 3:21 UTC (permalink / raw) To: netdev; +Cc: Dimitris Michailidis Signed-off-by: Dimitris Michailidis <dm@chelsio.com> --- drivers/net/cxgb4/sge.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/cxgb4/sge.c b/drivers/net/cxgb4/sge.c index 44c2e6c..6ddb3bb 100644 --- a/drivers/net/cxgb4/sge.c +++ b/drivers/net/cxgb4/sge.c @@ -975,7 +975,7 @@ out_free: dev_kfree_skb(skb); } cpl->ctrl0 = htonl(TXPKT_OPCODE(CPL_TX_PKT_XT) | - TXPKT_INTF(pi->tx_chan) | TXPKT_PF(0)); + TXPKT_INTF(pi->tx_chan) | TXPKT_PF(adap->fn)); cpl->pack = htons(0); cpl->len = htons(skb->len); cpl->ctrl1 = cpu_to_be64(cntrl); -- 1.5.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH net-next 4/4] cxgb4: update PCI ids 2010-08-24 3:21 ` [PATCH net-next 3/4] cxgb4: fix setting of the function number in transmit descriptors Dimitris Michailidis @ 2010-08-24 3:21 ` Dimitris Michailidis 0 siblings, 0 replies; 6+ messages in thread From: Dimitris Michailidis @ 2010-08-24 3:21 UTC (permalink / raw) To: netdev; +Cc: Dimitris Michailidis Signed-off-by: Dimitris Michailidis <dm@chelsio.com> --- drivers/net/cxgb4/cxgb4_main.c | 30 ++++++++++++++++++++---------- 1 files changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c index cadf334..7f1f65b 100644 --- a/drivers/net/cxgb4/cxgb4_main.c +++ b/drivers/net/cxgb4/cxgb4_main.c @@ -175,16 +175,26 @@ enum { static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = { CH_DEVICE(0xa000, 0), /* PE10K */ - CH_DEVICE(0x4001, 0), - CH_DEVICE(0x4002, 0), - CH_DEVICE(0x4003, 0), - CH_DEVICE(0x4004, 0), - CH_DEVICE(0x4005, 0), - CH_DEVICE(0x4006, 0), - CH_DEVICE(0x4007, 0), - CH_DEVICE(0x4008, 0), - CH_DEVICE(0x4009, 0), - CH_DEVICE(0x400a, 0), + CH_DEVICE(0x4001, -1), + CH_DEVICE(0x4002, -1), + CH_DEVICE(0x4003, -1), + CH_DEVICE(0x4004, -1), + CH_DEVICE(0x4005, -1), + CH_DEVICE(0x4006, -1), + CH_DEVICE(0x4007, -1), + CH_DEVICE(0x4008, -1), + CH_DEVICE(0x4009, -1), + CH_DEVICE(0x400a, -1), + CH_DEVICE(0x4401, 4), + CH_DEVICE(0x4402, 4), + CH_DEVICE(0x4403, 4), + CH_DEVICE(0x4404, 4), + CH_DEVICE(0x4405, 4), + CH_DEVICE(0x4406, 4), + CH_DEVICE(0x4407, 4), + CH_DEVICE(0x4408, 4), + CH_DEVICE(0x4409, 4), + CH_DEVICE(0x440a, 4), { 0, } }; -- 1.5.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 0/4] cxgb4 updates 2010-08-24 3:20 [PATCH net-next 0/4] cxgb4 updates Dimitris Michailidis 2010-08-24 3:20 ` [PATCH net-next 1/4] cxgb4: handle Rx/Tx queue ranges not starting at 0 Dimitris Michailidis @ 2010-08-24 3:38 ` David Miller 1 sibling, 0 replies; 6+ messages in thread From: David Miller @ 2010-08-24 3:38 UTC (permalink / raw) To: dm; +Cc: netdev From: Dimitris Michailidis <dm@chelsio.com> Date: Mon, 23 Aug 2010 20:20:57 -0700 > > Here are 4 patches for cxgb4 enabling the driver to work on PCI functions > other than 0. The first 3 are preparatory, the last one updates PCI IDs. > All for net-next. All applied, thank you. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2010-08-24 3:38 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2010-08-24 3:20 [PATCH net-next 0/4] cxgb4 updates Dimitris Michailidis 2010-08-24 3:20 ` [PATCH net-next 1/4] cxgb4: handle Rx/Tx queue ranges not starting at 0 Dimitris Michailidis 2010-08-24 3:20 ` [PATCH net-next 2/4] cxgb4: support eeprom read/write on functions other than 0 Dimitris Michailidis 2010-08-24 3:21 ` [PATCH net-next 3/4] cxgb4: fix setting of the function number in transmit descriptors Dimitris Michailidis 2010-08-24 3:21 ` [PATCH net-next 4/4] cxgb4: update PCI ids Dimitris Michailidis 2010-08-24 3:38 ` [PATCH net-next 0/4] cxgb4 updates David Miller
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