All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct
Date: Tue, 14 Sep 2010 00:35:09 +0200	[thread overview]
Message-ID: <1284417314-32070-13-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1284417314-32070-1-git-send-email-daniel.vetter@ffwll.ch>

This is the last differentiator between the different fake agp drivers.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 8e149a8..e6d69ef 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -81,6 +81,7 @@ struct intel_gtt_driver {
 	 * For chipsets that need to support old ums (non-gem) code, this
 	 * needs to be identical to the various supported agp memory types! */
 	bool (*check_flags)(unsigned int flags);
+	void (*chipset_flush)(void);
 };
 
 static struct _intel_private {
@@ -840,7 +841,7 @@ static void intel_i830_setup_flush(void)
  * that buffer out, we just fill 1KB and clflush it out, on the assumption
  * that it'll push whatever was in there out.  It appears to work.
  */
-static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
+static void i830_chipset_flush(void)
 {
 	unsigned int *pg = intel_private.i8xx_flush_page;
 
@@ -1063,6 +1064,11 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
 	return 0;
 }
 
+static void intel_fake_agp_chipset_flush(struct agp_bridge_data *bridge)
+{
+	intel_private.driver->chipset_flush();
+}
+
 static struct agp_memory *intel_fake_agp_alloc_by_type(size_t pg_count,
 						       int type)
 {
@@ -1164,7 +1170,7 @@ static void intel_i9xx_setup_flush(void)
 			"can't ioremap flush page - no chipset flushing\n");
 }
 
-static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
+static void i9xx_chipset_flush(void)
 {
 	if (intel_private.i9xx_flush_page)
 		writel(1, intel_private.i9xx_flush_page);
@@ -1291,7 +1297,7 @@ static const struct agp_bridge_driver intel_830_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i830_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_915_driver = {
@@ -1314,7 +1320,7 @@ static const struct agp_bridge_driver intel_915_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_i965_driver = {
@@ -1337,7 +1343,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_gen6_driver = {
@@ -1360,7 +1366,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_g33_driver = {
@@ -1383,7 +1389,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
 	.agp_alloc_pages        = agp_generic_alloc_pages,
 	.agp_destroy_page	= agp_generic_destroy_page,
 	.agp_destroy_pages      = agp_generic_destroy_pages,
-	.chipset_flush		= intel_i915_chipset_flush,
+	.chipset_flush		= intel_fake_agp_chipset_flush,
 };
 
 static const struct intel_gtt_driver i81x_gtt_driver = {
@@ -1394,6 +1400,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
 	.setup = i830_setup,
 	.write_entry = i830_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i830_chipset_flush,
 };
 static const struct intel_gtt_driver i915_gtt_driver = {
 	.gen = 3,
@@ -1401,6 +1408,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */
 	.write_entry = i830_write_entry, 
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver g33_gtt_driver = {
 	.gen = 3,
@@ -1408,6 +1416,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver pineview_gtt_driver = {
 	.gen = 3,
@@ -1415,18 +1424,21 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver i965_gtt_driver = {
 	.gen = 4,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver g4x_gtt_driver = {
 	.gen = 5,
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.gen = 5,
@@ -1434,12 +1446,14 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
 	.setup = i9xx_setup,
 	.write_entry = i965_write_entry,
 	.check_flags = i830_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 static const struct intel_gtt_driver sandybridge_gtt_driver = {
 	.gen = 6,
 	.setup = i9xx_setup,
 	.write_entry = gen6_write_entry,
 	.check_flags = gen6_check_flags,
+	.chipset_flush = i9xx_chipset_flush,
 };
 
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
-- 
1.7.1

  parent reply	other threads:[~2010-09-13 22:33 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
2010-09-13 22:34 ` [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945 Daniel Vetter
2010-09-13 22:35 ` [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45 Daniel Vetter
2010-09-13 22:35 ` [PATCH 04/17] intel-gtt: introduce pte write function for gen6 Daniel Vetter
2010-09-13 22:35 ` [PATCH 05/17] intel-gtt: drop agp scratch page support stuff Daniel Vetter
2010-09-13 22:35 ` [PATCH 06/17] agp: kill agp_(map|unmap)_page Daniel Vetter
2010-09-13 22:35 ` [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830 Daniel Vetter
2010-09-13 22:35 ` [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915 Daniel Vetter
2010-09-13 22:35 ` [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965 Daniel Vetter
2010-09-13 22:35 ` [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge Daniel Vetter
2010-09-13 22:35 ` [PATCH 11/17] intel-gtt: kill mask_memory functions Daniel Vetter
2010-09-13 22:35 ` Daniel Vetter [this message]
2010-09-13 22:35 ` [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs Daniel Vetter
2010-09-13 22:35 ` [PATCH 14/17] agp: kill agp_(unmap|map)_memory Daniel Vetter
2010-09-13 22:35 ` [PATCH 15/17] intel-gtt: clean up gtt size reporting Daniel Vetter
2010-09-13 22:35 ` [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver Daniel Vetter
2010-09-13 22:35 ` [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff Daniel Vetter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1284417314-32070-13-git-send-email-daniel.vetter@ffwll.ch \
    --to=daniel.vetter@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    --subject='Re: [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.