From: Catalin Marinas <catalin.marinas@arm.com> To: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Colin Cross <ccross@android.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode Date: Tue, 25 Jan 2011 13:19:17 +0000 [thread overview] Message-ID: <1295961557.10109.253.camel@e102109-lin.cambridge.arm.com> (raw) In-Reply-To: <20110123155157.GD30094@n2100.arm.linux.org.uk> On Sun, 2011-01-23 at 15:51 +0000, Russell King - ARM Linux wrote: > On Sun, Jan 16, 2011 at 11:49:21AM +0000, Catalin Marinas wrote: > > On Saturday, 15 January 2011, Russell King - ARM Linux > > <linux@arm.linux.org.uk> wrote: > > > It's a reveq, so I thought we should cover all the instructions with > > > an 'eq' conditional for thumb. > > > > If the it instruction doesn't cover all instructions, gas generates > > some more its. But in this case, for little endian, the it instruction > > covers more since reveq isn't included and having the beq not last in > > the block I think is unpredictable. If you really want to optimise the > > big endian case not to have an additional it generated by gas, you can > > write ittt so that beq is included with little endian but not with big > > endian. I wouldn't bother much for an extra it anyway. > > I think the itttt is correct. Unless you wish to illustrate why you > think it's wrong by pasting the code and showing why you think the > beq isn't the last instruction... With your patch applied (visually), the code becomes (removed the comment before beq): tst r3, #PSR_T_BIT @ Thumb mode? itttt eq @ explicit IT needed for the 1f label subeq r4, r2, #4 @ ARM instr at LR - 4 1: ldreqt r0, [r4] #ifdef CONFIG_CPU_ENDIAN_BE8 reveq r0, r0 @ little endian instruction #endif beq call_fpe The little endian case only has 3 conditional instructions: subeq r4, r2, #4 @ ARM instr at LR - 4 1: ldreqt r0, [r4] beq call_fpe but you add itttt (if-then-then-then-then) which expects 4 conditional instructions, IOW beq is no longer the last. So cutting a 't' would sort it out (unless I misread your patch). > > > tst r3, #PSR_T_BIT > > > subeq r4, r2, #4 > > > 1: ldreqt r0, [r4] > > > reveq r0, r0 > > > beq call_fpe > > > > You can have the T bit set but the instruction a 32-bit Thumb in which > > case r2 is in the middle of such instruction rather than the next. > > Unless you only refer to the ARM mode, in which case the comment is > > fine. > > So? I'm confused why you're making a mountain out of apparantly > nothing. No issue really, the comment can stay as you wrote it (I don't read them anyway :)). -- Catalin
WARNING: multiple messages have this Message-ID (diff)
From: catalin.marinas@arm.com (Catalin Marinas) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: vfp: Fix up exception location in Thumb mode Date: Tue, 25 Jan 2011 13:19:17 +0000 [thread overview] Message-ID: <1295961557.10109.253.camel@e102109-lin.cambridge.arm.com> (raw) In-Reply-To: <20110123155157.GD30094@n2100.arm.linux.org.uk> On Sun, 2011-01-23 at 15:51 +0000, Russell King - ARM Linux wrote: > On Sun, Jan 16, 2011 at 11:49:21AM +0000, Catalin Marinas wrote: > > On Saturday, 15 January 2011, Russell King - ARM Linux > > <linux@arm.linux.org.uk> wrote: > > > It's a reveq, so I thought we should cover all the instructions with > > > an 'eq' conditional for thumb. > > > > If the it instruction doesn't cover all instructions, gas generates > > some more its. But in this case, for little endian, the it instruction > > covers more since reveq isn't included and having the beq not last in > > the block I think is unpredictable. If you really want to optimise the > > big endian case not to have an additional it generated by gas, you can > > write ittt so that beq is included with little endian but not with big > > endian. I wouldn't bother much for an extra it anyway. > > I think the itttt is correct. Unless you wish to illustrate why you > think it's wrong by pasting the code and showing why you think the > beq isn't the last instruction... With your patch applied (visually), the code becomes (removed the comment before beq): tst r3, #PSR_T_BIT @ Thumb mode? itttt eq @ explicit IT needed for the 1f label subeq r4, r2, #4 @ ARM instr at LR - 4 1: ldreqt r0, [r4] #ifdef CONFIG_CPU_ENDIAN_BE8 reveq r0, r0 @ little endian instruction #endif beq call_fpe The little endian case only has 3 conditional instructions: subeq r4, r2, #4 @ ARM instr at LR - 4 1: ldreqt r0, [r4] beq call_fpe but you add itttt (if-then-then-then-then) which expects 4 conditional instructions, IOW beq is no longer the last. So cutting a 't' would sort it out (unless I misread your patch). > > > tst r3, #PSR_T_BIT > > > subeq r4, r2, #4 > > > 1: ldreqt r0, [r4] > > > reveq r0, r0 > > > beq call_fpe > > > > You can have the T bit set but the instruction a 32-bit Thumb in which > > case r2 is in the middle of such instruction rather than the next. > > Unless you only refer to the ARM mode, in which case the comment is > > fine. > > So? I'm confused why you're making a mountain out of apparantly > nothing. No issue really, the comment can stay as you wrote it (I don't read them anyway :)). -- Catalin
next prev parent reply other threads:[~2011-01-25 13:19 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-01-14 7:42 [PATCH] ARM: vfp: Fix up exception location in Thumb mode Colin Cross 2011-01-14 7:42 ` Colin Cross 2011-01-14 11:43 ` Catalin Marinas 2011-01-14 11:43 ` Catalin Marinas 2011-01-14 12:02 ` Russell King - ARM Linux 2011-01-14 12:02 ` Russell King - ARM Linux 2011-01-14 14:10 ` Catalin Marinas 2011-01-14 14:10 ` Catalin Marinas 2011-01-14 15:49 ` Russell King - ARM Linux 2011-01-14 15:49 ` Russell King - ARM Linux 2011-01-14 16:23 ` Catalin Marinas 2011-01-14 16:23 ` Catalin Marinas 2011-01-14 16:35 ` Russell King - ARM Linux 2011-01-14 16:35 ` Russell King - ARM Linux 2011-01-14 16:58 ` Catalin Marinas 2011-01-14 16:58 ` Catalin Marinas 2011-01-14 17:30 ` Russell King - ARM Linux 2011-01-14 17:30 ` Russell King - ARM Linux 2011-01-14 18:47 ` Russell King - ARM Linux 2011-01-14 18:47 ` Russell King - ARM Linux 2011-01-14 19:23 ` Colin Cross 2011-01-14 19:23 ` Colin Cross 2011-01-14 19:51 ` Colin Cross 2011-01-14 19:51 ` Colin Cross 2011-01-14 21:24 ` Russell King - ARM Linux 2011-01-14 21:24 ` Russell King - ARM Linux 2011-01-25 23:33 ` Colin Cross 2011-01-25 23:33 ` Colin Cross 2011-01-26 11:26 ` Russell King - ARM Linux 2011-01-26 11:26 ` Russell King - ARM Linux 2011-01-27 6:11 ` Colin Cross 2011-01-27 6:11 ` Colin Cross 2011-01-27 6:35 ` Colin Cross 2011-01-27 6:35 ` Colin Cross 2011-01-27 7:30 ` Colin Cross 2011-01-27 7:30 ` Colin Cross 2011-02-09 18:12 ` Colin Cross 2011-02-09 18:12 ` Colin Cross 2011-01-15 15:38 ` Catalin Marinas 2011-01-15 15:38 ` Catalin Marinas 2011-01-15 15:43 ` Russell King - ARM Linux 2011-01-15 15:43 ` Russell King - ARM Linux 2011-01-16 11:51 ` Catalin Marinas 2011-01-16 11:51 ` Catalin Marinas 2011-01-15 15:31 ` Catalin Marinas 2011-01-15 15:31 ` Catalin Marinas 2011-01-15 15:40 ` Russell King - ARM Linux 2011-01-15 15:40 ` Russell King - ARM Linux 2011-01-16 11:49 ` Catalin Marinas 2011-01-16 11:49 ` Catalin Marinas 2011-01-23 15:51 ` Russell King - ARM Linux 2011-01-23 15:51 ` Russell King - ARM Linux 2011-01-25 13:19 ` Catalin Marinas [this message] 2011-01-25 13:19 ` Catalin Marinas 2011-01-16 21:25 ` Catalin Marinas 2011-01-16 21:25 ` Catalin Marinas 2011-01-23 15:46 ` Russell King - ARM Linux 2011-01-23 15:46 ` Russell King - ARM Linux 2011-01-25 13:45 ` Catalin Marinas 2011-01-25 13:45 ` Catalin Marinas 2011-01-14 16:24 ` Dave Martin 2011-01-14 16:24 ` Dave Martin 2011-01-14 16:52 ` Russell King - ARM Linux 2011-01-14 16:52 ` Russell King - ARM Linux
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1295961557.10109.253.camel@e102109-lin.cambridge.arm.com \ --to=catalin.marinas@arm.com \ --cc=ccross@android.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@arm.linux.org.uk \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.