* [PATCH 1/5] ath9k_hw: Add a function to read sqsum_dvc.
@ 2011-01-27 9:15 Vivek Natarajan
2011-01-27 9:15 ` [PATCH 2/5] ath9k: Fix a PLL hang issue observed with AR9485 Vivek Natarajan
0 siblings, 1 reply; 7+ messages in thread
From: Vivek Natarajan @ 2011-01-27 9:15 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Vivek Natarajan
Add a function to observe the delta VC of BB_PLL.
For a good chip, the sqsum_dvc is below 2000.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
---
drivers/net/wireless/ath/ath9k/hw.c | 13 +++++++++++++
drivers/net/wireless/ath/ath9k/hw.h | 1 +
drivers/net/wireless/ath/ath9k/reg.h | 6 ++++++
3 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 4615fd9..baa2977 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -671,6 +671,19 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
REGWRITE_BUFFER_FLUSH(ah);
}
+unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
+{
+ REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) & ~(PLL3_DO_MEAS_MASK)));
+ udelay(100);
+ REG_WRITE(ah, PLL3, (REG_READ(ah, PLL3) | PLL3_DO_MEAS_MASK));
+
+ while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)
+ udelay(100);
+
+ return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;
+}
+EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
+
static void ath9k_hw_init_pll(struct ath_hw *ah,
struct ath9k_channel *chan)
{
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index ad8c2c7..ef79f4c 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -929,6 +929,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
void ath9k_hw_reset_tsf(struct ath_hw *ah);
void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
void ath9k_hw_init_global_settings(struct ath_hw *ah);
+unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
void ath9k_hw_set11nmac2040(struct ath_hw *ah);
void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 4df5659..264aea7 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1129,6 +1129,12 @@ enum {
#define AR_RTC_PLL_CLKSEL 0x00000300
#define AR_RTC_PLL_CLKSEL_S 8
+#define PLL3 0x16188
+#define PLL3_DO_MEAS_MASK 0x40000000
+#define PLL4 0x1618c
+#define PLL4_MEAS_DONE 0x8
+#define SQSUM_DVC_MASK 0x007ffff8
+
#define AR_RTC_RESET \
((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
#define AR_RTC_RESET_EN (0x00000001)
--
1.6.3.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/5] ath9k: Fix a PLL hang issue observed with AR9485.
2011-01-27 9:15 [PATCH 1/5] ath9k_hw: Add a function to read sqsum_dvc Vivek Natarajan
@ 2011-01-27 9:15 ` Vivek Natarajan
2011-01-27 9:15 ` [PATCH 3/5] ath9k_hw: DDR_PLL and BB_PLL need correct setting Vivek Natarajan
0 siblings, 1 reply; 7+ messages in thread
From: Vivek Natarajan @ 2011-01-27 9:15 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Vivek Natarajan
When this PLL hang issue is seen, both Rx and Tx fail to work.
The sqsum_dvc needs to be below 2000 for a good chip. During
this issue the sqsum_dvc value is beyond 80000 and only a
full reset can solve this problem.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
---
drivers/net/wireless/ath/ath9k/ath9k.h | 1 +
drivers/net/wireless/ath/ath9k/main.c | 3 +++
drivers/net/wireless/ath/ath9k/xmit.c | 23 +++++++++++++++++++++++
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 6636f3c..72a1c0d 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -652,6 +652,7 @@ struct ath_softc {
#endif
struct ath_beacon_config cur_beacon_conf;
struct delayed_work tx_complete_work;
+ struct delayed_work hw_pll_work;
struct ath_btcoex btcoex;
struct ath_descdma txsdma;
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index facff10..2029665 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -231,6 +231,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
cancel_work_sync(&sc->paprd_work);
cancel_work_sync(&sc->hw_check_work);
cancel_delayed_work_sync(&sc->tx_complete_work);
+ cancel_delayed_work_sync(&sc->hw_pll_work);
ath9k_ps_wakeup(sc);
@@ -291,6 +292,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
if (sc->sc_flags & SC_OP_BEACONS)
ath_beacon_config(sc, NULL);
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
+ ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
ath_start_ani(common);
}
@@ -1298,6 +1300,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
cancel_delayed_work_sync(&sc->ath_led_blink_work);
cancel_delayed_work_sync(&sc->tx_complete_work);
+ cancel_delayed_work_sync(&sc->hw_pll_work);
cancel_work_sync(&sc->paprd_work);
cancel_work_sync(&sc->hw_check_work);
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index dcac811..c73452d 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -2106,6 +2106,28 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
}
}
+static void ath_hw_pll_work(struct work_struct *work)
+{
+ struct ath_softc *sc = container_of(work, struct ath_softc,
+ hw_pll_work.work);
+ static int count;
+
+ if (AR_SREV_9485(sc->sc_ah)) {
+ if (ar9003_get_pll_sqsum_dvc(sc->sc_ah) >= 0x40000) {
+ count++;
+
+ if (count == 3) {
+ /* Rx is hung for more than 500ms. Reset it */
+ ath_reset(sc, true);
+ count = 0;
+ }
+ } else
+ count = 0;
+
+ ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
+ }
+}
+
static void ath_tx_complete_poll_work(struct work_struct *work)
{
struct ath_softc *sc = container_of(work, struct ath_softc,
@@ -2330,6 +2352,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
}
INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work);
+ INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
error = ath_tx_edma_init(sc);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/5] ath9k_hw: DDR_PLL and BB_PLL need correct setting.
2011-01-27 9:15 ` [PATCH 2/5] ath9k: Fix a PLL hang issue observed with AR9485 Vivek Natarajan
@ 2011-01-27 9:15 ` Vivek Natarajan
2011-01-27 9:15 ` [PATCH 4/5] ath9k: Fix a locking related issue Vivek Natarajan
0 siblings, 1 reply; 7+ messages in thread
From: Vivek Natarajan @ 2011-01-27 9:15 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Vivek Natarajan
Updates from the analog team for AR9485 chipsets to set
DDR_PLL2 and DDR_PLL3. Also program the BB_PLL ki
and kd value.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
---
drivers/net/wireless/ath/ath9k/hw.c | 26 +++++++++++++++++++++++++-
drivers/net/wireless/ath/ath9k/reg.h | 11 +++++++++++
2 files changed, 36 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index baa2977..63edbc1 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -684,13 +684,37 @@ unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
}
EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
+#define DPLL2_KD_VAL 0x3D
+#define DPLL2_KI_VAL 0x06
+#define DPLL3_PHASE_SHIFT_VAL 0x1
+
static void ath9k_hw_init_pll(struct ath_hw *ah,
struct ath9k_channel *chan)
{
u32 pll;
- if (AR_SREV_9485(ah))
+ if (AR_SREV_9485(ah)) {
REG_WRITE(ah, AR_RTC_PLL_CONTROL2, 0x886666);
+ REG_WRITE(ah, AR_CH0_DDR_DPLL2, 0x19e82f01);
+
+ REG_RMW_FIELD(ah, AR_CH0_DDR_DPLL3,
+ AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL);
+
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
+ udelay(100);
+
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL2, 0x886666);
+
+ REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
+ AR_CH0_DPLL2_KD, DPLL2_KD_VAL);
+ REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
+ AR_CH0_DPLL2_KI, DPLL2_KI_VAL);
+
+ REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3,
+ AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL);
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x142c);
+ udelay(110);
+ }
pll = ath9k_hw_compute_pll_control(ah, chan);
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 264aea7..b262e98 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1083,6 +1083,17 @@ enum {
#define AR_ENT_OTP 0x40d8
#define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000
#define AR_ENT_OTP_MPSD 0x00800000
+#define AR_CH0_BB_DPLL2 0x16184
+#define AR_CH0_BB_DPLL3 0x16188
+#define AR_CH0_DDR_DPLL2 0x16244
+#define AR_CH0_DDR_DPLL3 0x16248
+#define AR_CH0_DPLL2_KD 0x03F80000
+#define AR_CH0_DPLL2_KD_S 19
+#define AR_CH0_DPLL2_KI 0x3C000000
+#define AR_CH0_DPLL2_KI_S 26
+#define AR_CH0_DPLL3_PHASE_SHIFT 0x3F800000
+#define AR_CH0_DPLL3_PHASE_SHIFT_S 23
+#define AR_PHY_CCA_NOM_VAL_2GHZ -118
#define AR_RTC_9300_PLL_DIV 0x000003ff
#define AR_RTC_9300_PLL_DIV_S 0
--
1.6.3.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/5] ath9k: Fix a locking related issue.
2011-01-27 9:15 ` [PATCH 3/5] ath9k_hw: DDR_PLL and BB_PLL need correct setting Vivek Natarajan
@ 2011-01-27 9:15 ` Vivek Natarajan
2011-01-27 9:15 ` [PATCH 5/5] ath9k_hw: Update PMU setting to improve ripple issue for AR9485 Vivek Natarajan
2011-03-18 0:19 ` [PATCH 4/5] ath9k: Fix a locking related issue Luis R. Rodriguez
0 siblings, 2 replies; 7+ messages in thread
From: Vivek Natarajan @ 2011-01-27 9:15 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Vivek Natarajan
Spin_lock has been tried to be acquired twice from ath9k_tasklet
to ath_reset which resulted in a machine freeze.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
---
drivers/net/wireless/ath/ath9k/xmit.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index c73452d..84673fb 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -564,8 +564,11 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
rcu_read_unlock();
- if (needreset)
+ if (needreset) {
+ spin_unlock_bh(&sc->sc_pcu_lock);
ath_reset(sc, false);
+ spin_lock_bh(&sc->sc_pcu_lock);
+ }
}
static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
--
1.6.3.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/5] ath9k_hw: Update PMU setting to improve ripple issue for AR9485.
2011-01-27 9:15 ` [PATCH 4/5] ath9k: Fix a locking related issue Vivek Natarajan
@ 2011-01-27 9:15 ` Vivek Natarajan
2011-03-18 0:19 ` [PATCH 4/5] ath9k: Fix a locking related issue Luis R. Rodriguez
1 sibling, 0 replies; 7+ messages in thread
From: Vivek Natarajan @ 2011-01-27 9:15 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Vivek Natarajan
Change from the systems team to update PMU setting for AR9485
version of chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index a256556..4a92718 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3673,7 +3673,7 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
return;
reg_pmu_set = (5 << 1) | (7 << 4) | (1 << 8) |
- (7 << 14) | (6 << 17) | (1 << 20) |
+ (2 << 14) | (6 << 17) | (1 << 20) |
(3 << 24) | (1 << 28);
REG_WRITE(ah, AR_PHY_PMU1, reg_pmu_set);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 4/5] ath9k: Fix a locking related issue.
2011-01-27 9:15 ` [PATCH 4/5] ath9k: Fix a locking related issue Vivek Natarajan
2011-01-27 9:15 ` [PATCH 5/5] ath9k_hw: Update PMU setting to improve ripple issue for AR9485 Vivek Natarajan
@ 2011-03-18 0:19 ` Luis R. Rodriguez
2011-03-18 0:50 ` Vivek Natarajan
1 sibling, 1 reply; 7+ messages in thread
From: Luis R. Rodriguez @ 2011-03-18 0:19 UTC (permalink / raw)
To: Vivek Natarajan; +Cc: linville, linux-wireless
On Thu, Jan 27, 2011 at 1:15 AM, Vivek Natarajan <vnatarajan@atheros.com> wrote:
> Spin_lock has been tried to be acquired twice from ath9k_tasklet
> to ath_reset which resulted in a machine freeze.
>
> Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
> ---
Was this a stable fix? :(
> drivers/net/wireless/ath/ath9k/xmit.c | 5 ++++-
> 1 files changed, 4 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
> index c73452d..84673fb 100644
> --- a/drivers/net/wireless/ath/ath9k/xmit.c
> +++ b/drivers/net/wireless/ath/ath9k/xmit.c
> @@ -564,8 +564,11 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
>
> rcu_read_unlock();
>
> - if (needreset)
> + if (needreset) {
> + spin_unlock_bh(&sc->sc_pcu_lock);
> ath_reset(sc, false);
> + spin_lock_bh(&sc->sc_pcu_lock);
> + }
> }
>
> static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
> --
> 1.6.3.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 4/5] ath9k: Fix a locking related issue.
2011-03-18 0:19 ` [PATCH 4/5] ath9k: Fix a locking related issue Luis R. Rodriguez
@ 2011-03-18 0:50 ` Vivek Natarajan
0 siblings, 0 replies; 7+ messages in thread
From: Vivek Natarajan @ 2011-03-18 0:50 UTC (permalink / raw)
To: Luis R. Rodriguez; +Cc: Vivek Natarajan, linville, linux-wireless
On Fri, Mar 18, 2011 at 5:49 AM, Luis R. Rodriguez <mcgrof@gmail.com> wrote:
> On Thu, Jan 27, 2011 at 1:15 AM, Vivek Natarajan <vnatarajan@atheros.com> wrote:
>> Spin_lock has been tried to be acquired twice from ath9k_tasklet
>> to ath_reset which resulted in a machine freeze.
>>
>> Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
>> ---
>
> Was this a stable fix? :(
>
Actually this was meant to be a quickfix for the panic we had noticed.
A proper fix would be to review all the spinlocks in ath9k and do a
revamp. Anyhow, such a revamp might take some time and before that we
will have this patch for stable. Thanks a lot, I will resend this to
stable.
Vivek.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2011-03-18 0:51 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-01-27 9:15 [PATCH 1/5] ath9k_hw: Add a function to read sqsum_dvc Vivek Natarajan
2011-01-27 9:15 ` [PATCH 2/5] ath9k: Fix a PLL hang issue observed with AR9485 Vivek Natarajan
2011-01-27 9:15 ` [PATCH 3/5] ath9k_hw: DDR_PLL and BB_PLL need correct setting Vivek Natarajan
2011-01-27 9:15 ` [PATCH 4/5] ath9k: Fix a locking related issue Vivek Natarajan
2011-01-27 9:15 ` [PATCH 5/5] ath9k_hw: Update PMU setting to improve ripple issue for AR9485 Vivek Natarajan
2011-03-18 0:19 ` [PATCH 4/5] ath9k: Fix a locking related issue Luis R. Rodriguez
2011-03-18 0:50 ` Vivek Natarajan
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