[U-Boot] [PATCH 1/3] powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCs

[U-Boot] [PATCH 1/3] powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCs

[Kumar Gala]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/include/asm/config_mpc85xx.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 5792f2f..4e515ff 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -130,11 +130,13 @@
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		12
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 
 #elif defined(CONFIG_P2020)
 #define CONFIG_MAX_CPUS			2
 #define CONFIG_SYS_FSL_NUM_LAWS		12
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 
 #elif defined(CONFIG_PPC_P2040)
 #define CONFIG_MAX_CPUS			4
-- 
1.7.2.3

[U-Boot] [PATCH 2/3] fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)

[Kumar Gala]

Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/cpu/mpc85xx/cmd_errata.c     |    3 +++
 arch/powerpc/include/asm/config_mpc85xx.h |    2 ++
 drivers/mmc/fsl_esdhc.c                   |    5 +++++
 3 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 0cc8b1e..4f8134b 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -59,6 +59,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC136)
 	puts("Work-around for Erratum ESDHC136 enabled\n");
 #endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC_A001)
+	puts("Work-around for Erratum ESDHC-A001 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
 	puts("Work-around for Erratum CPC-A002 enabled\n");
 #endif
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 4e515ff..a403208 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -131,12 +131,14 @@
 #define CONFIG_SYS_FSL_NUM_LAWS		12
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
 
 #elif defined(CONFIG_P2020)
 #define CONFIG_MAX_CPUS			2
 #define CONFIG_SYS_FSL_NUM_LAWS		12
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
 
 #elif defined(CONFIG_PPC_P2040)
 #define CONFIG_MAX_CPUS			4
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index d01c926..f3cccbe 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -219,6 +219,11 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 	if (timeout < 0)
 		timeout = 0;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
+	if ((timeout == 4) || (timeout == 8) || (timeout == 12))
+		timeout++;
+#endif
+
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16);
 
 	return 0;
-- 
1.7.2.3

[U-Boot] [PATCH 3/3] powerpc/85xx: Add eSDHC support on P2020DS

[Kumar Gala]

From: Jerry Huang <Chang-Ming.Huang@freescale.com>

We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
respectively).

We enable EXT2, FAT, and parition support for both MMC & USB configs.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 board/freescale/p2020ds/p2020ds.c |   15 ++++++++++++++-
 include/configs/P2020DS.h         |   25 ++++++++++++++++++++++++-
 2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 8546aa9..7d72491 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -44,6 +44,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f(void)
+{
+#ifdef CONFIG_MMC
+	ccsr_gur_t *gur = (ccsr_gur_t *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+	setbits_be32(&gur->pmuxcr,
+			 (MPC85xx_PMUXCR_SDHC_CD |
+			 MPC85xx_PMUXCR_SDHC_WP));
+#endif
+
+	return 0;
+}
+
 int checkboard(void)
 {
 	u8 sw;
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index b32a997..d4770f2 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -78,6 +78,8 @@
 #define CONFIG_L2_CACHE			/* toggle L2 cache */
 #define CONFIG_BTB			/* toggle branch predition */
 
+#define CONFIG_BOARD_EARLY_INIT_F	/* Call board_pre_init */
+
 #define CONFIG_ENABLE_36BIT_PHYS	1
 
 #ifdef CONFIG_PHYS_64BIT
@@ -605,15 +607,36 @@
 /*
  * USB
  */
+#define CONFIG_USB_EHCI
+
+#ifdef CONFIG_USB_EHCI
 #define CONFIG_CMD_USB
 #define CONFIG_USB_STORAGE
-#define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#endif
 
 #undef CONFIG_WATCHDOG			/* watchdog disabled */
 
 /*
+ * SDHC/MMC
+ */
+#define CONFIG_MMC
+
+#ifdef CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#endif
+
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/*
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
-- 
1.7.2.3

[U-Boot] [PATCH 1/3] powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCs

[Kumar Gala]

On Jan 29, 2011, at 5:20 PM, Kumar Gala wrote:

> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/include/asm/config_mpc85xx.h |    2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)

applied to 85xx

- k

[U-Boot] [PATCH 2/3] fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)

[Kumar Gala]

On Jan 29, 2011, at 5:20 PM, Kumar Gala wrote:

> Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
> and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/cmd_errata.c     |    3 +++
> arch/powerpc/include/asm/config_mpc85xx.h |    2 ++
> drivers/mmc/fsl_esdhc.c                   |    5 +++++
> 3 files changed, 10 insertions(+), 0 deletions(-)

applied to 85xx

- k

[U-Boot] [PATCH 3/3] powerpc/85xx: Add eSDHC support on P2020DS

[Kumar Gala]

On Jan 29, 2011, at 5:20 PM, Kumar Gala wrote:

> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
> 
> We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
> respectively).
> 
> We enable EXT2, FAT, and parition support for both MMC & USB configs.
> 
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> Signed-off-by: Jin Qing <b24347@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> board/freescale/p2020ds/p2020ds.c |   15 ++++++++++++++-
> include/configs/P2020DS.h         |   25 ++++++++++++++++++++++++-
> 2 files changed, 38 insertions(+), 2 deletions(-)

applied to 85xx next

- k