* [PATCH v2 1/5] OMAP2420: hwmod data: Add HSMMC
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
@ 2011-02-08 20:53 ` Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 2/5] OMAP2430: " Kishore Kadiyala
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Kishore Kadiyala @ 2011-02-08 20:53 UTC (permalink / raw)
To: linux-mmc, linux-omap
Cc: tony, cjb, madhu.cr, khilman, paul, Kishore Kadiyala
Update the omap2420 hwmod data with the HSMMC info.
Add a device attribute structure which will be used
by the host driver to find whether the HSMMC controller
supports DUAL VOLT cards.
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 80 ++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/mmc.h | 7 +++
2 files changed, 87 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index b85c630..19fec6a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -18,6 +18,7 @@
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/gpio.h>
+#include <plat/mmc.h>
#include "omap_hwmod_common_data.h"
@@ -44,6 +45,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod;
static struct omap_hwmod omap2420_gpio3_hwmod;
static struct omap_hwmod omap2420_gpio4_hwmod;
static struct omap_hwmod omap2420_dma_system_hwmod;
+static struct omap_hwmod omap2420_mmc_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -95,6 +97,24 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* L4 CORE -> MMC interface */
+static struct omap_hwmod_addr_space omap2420_mmc_addr_space[] = {
+ {
+ .pa_start = 0x4809c000,
+ .pa_end = 0x4809c07f,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__mmc = {
+ .master = &omap2420_l4_core_hwmod,
+ .slave = &omap2420_mmc_hwmod,
+ .clk = "mmc_ick",
+ .addr = omap2420_mmc_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap2420_mmc_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* L4 CORE -> UART1 interface */
static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
{
@@ -196,6 +216,7 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
&omap2420_l4_core__l4_wkup,
+ &omap2420_l4_core__mmc,
&omap2_l4_core__uart1,
&omap2_l4_core__uart2,
&omap2_l4_core__uart3,
@@ -864,6 +885,64 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
.flags = HWMOD_NO_IDLEST,
};
+/* MMC/SD/SDIO common */
+
+static struct omap_hwmod_class_sysconfig mmc_sysc = {
+ .rev_offs = 0x3c,
+ .sysc_offs = 0x64,
+ .syss_offs = 0x68,
+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class mmc_class = {
+ .name = "mmc",
+ .sysc = &mmc_sysc,
+};
+
+/* MMC/SD/SDIO1 */
+
+static struct mmc_dev_attr mmc_dev_attr = {
+ .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
+};
+
+static struct omap_hwmod_irq_info mmc_mpu_irqs[] = {
+ { .irq = 83 },
+};
+
+static struct omap_hwmod_dma_info mmc_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 61 }, /* DMA_MMC_TX */
+ { .name = "rx", .dma_req = 62 }, /* DMA_MMC_RX */
+};
+
+static struct omap_hwmod_ocp_if *omap2420_mmc_slaves[] = {
+ &omap2420_l4_core__mmc,
+};
+
+static struct omap_hwmod omap2420_mmc_hwmod = {
+ .name = "mmc_hwmod",
+ .mpu_irqs = mmc_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc_mpu_irqs),
+ .sdma_reqs = mmc_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc_sdma_reqs),
+ .main_clk = "mmc_fck",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2420_EN_MMC_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP2420_ST_MMC_SHIFT,
+ },
+ },
+ .slaves = omap2420_mmc_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_mmc_slaves),
+ .class = &mmc_class,
+ .dev_attr = &mmc_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
&omap2420_l3_main_hwmod,
&omap2420_l4_core_hwmod,
@@ -871,6 +950,7 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
&omap2420_mpu_hwmod,
&omap2420_iva_hwmod,
&omap2420_wd_timer2_hwmod,
+ &omap2420_mmc_hwmod,
&omap2420_uart1_hwmod,
&omap2420_uart2_hwmod,
&omap2420_uart3_hwmod,
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index f57f36a..7821344 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -43,6 +43,13 @@
#define OMAP_MMC_MAX_SLOTS 2
+/* omap_hwmod integration data */
+#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(1)
+
+struct mmc_dev_attr {
+ u8 flags;
+};
+
struct omap_mmc_platform_data {
/* back-link to device */
struct device *dev;
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 2/5] OMAP2430: hwmod data: Add HSMMC
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 1/5] OMAP2420: hwmod data: Add HSMMC Kishore Kadiyala
@ 2011-02-08 20:53 ` Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 3/5] OMAP3: " Kishore Kadiyala
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Kishore Kadiyala @ 2011-02-08 20:53 UTC (permalink / raw)
To: linux-mmc, linux-omap
Cc: tony, cjb, madhu.cr, khilman, paul, Kishore Kadiyala
From: Paul Walmsley <paul@pwsan.com>
Update the omap2430 hwmod data with the HSMMC info.
Also update the device attribute structure.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 155 ++++++++++++++++++++++++++++
1 files changed, 155 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 8ecfbcd..166391d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -18,6 +18,7 @@
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/gpio.h>
+#include <plat/mmc.h>
#include "omap_hwmod_common_data.h"
@@ -45,6 +46,8 @@ static struct omap_hwmod omap2430_gpio3_hwmod;
static struct omap_hwmod omap2430_gpio4_hwmod;
static struct omap_hwmod omap2430_gpio5_hwmod;
static struct omap_hwmod omap2430_dma_system_hwmod;
+static struct omap_hwmod omap2430_mmc1_hwmod;
+static struct omap_hwmod omap2430_mmc2_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -189,6 +192,42 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* L4 CORE -> MMC1 interface */
+static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
+ {
+ .pa_start = 0x4809c000,
+ .pa_end = 0x4809c1ff,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mmc1_hwmod,
+ .clk = "mmchs1_ick",
+ .addr = omap2430_mmc1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE -> MMC2 interface */
+static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
+ {
+ .pa_start = 0x480b4000,
+ .pa_end = 0x480b41ff,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
+ .master = &omap2430_l4_core_hwmod,
+ .slave = &omap2430_mmc2_hwmod,
+ .addr = omap2430_mmc2_addr_space,
+ .clk = "mmchs2_ick",
+ .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
&omap2430_l3_main__l4_core,
@@ -197,6 +236,8 @@ static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
&omap2430_l4_core__l4_wkup,
+ &omap2430_l4_core__mmc1,
+ &omap2430_l4_core__mmc2,
};
/* L4 CORE */
@@ -919,6 +960,118 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
.flags = HWMOD_NO_IDLEST,
};
+/* MMC/SD/SDIO common */
+
+static struct omap_hwmod_class_sysconfig mmc_sysc = {
+ .rev_offs = 0x1fc,
+ .sysc_offs = 0x10,
+ .syss_offs = 0x14,
+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class mmc_class = {
+ .name = "mmc",
+ .sysc = &mmc_sysc,
+};
+
+/* MMC/SD/SDIO1 */
+
+static struct mmc_dev_attr mmc1_dev_attr = {
+ .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
+};
+
+static struct omap_hwmod_irq_info mmc1_mpu_irqs[] = {
+ { .irq = 83 },
+};
+
+static struct omap_hwmod_dma_info mmc1_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
+ { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
+};
+
+static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
+ { .role = "dbck", .clk = "mmchsdb_fck" },
+};
+
+static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
+ &omap2430_l4_core__mmc1,
+};
+
+static struct omap_hwmod omap2430_mmc1_hwmod = {
+ .name = "mmc1_hwmod",
+ .mpu_irqs = mmc1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc1_mpu_irqs),
+ .sdma_reqs = mmc1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc1_sdma_reqs),
+ .opt_clks = mmc1_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(mmc1_opt_clks),
+ .main_clk = "mmchs1_fck",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 2,
+ .module_bit = OMAP2430_EN_MMCHS1_SHIFT,
+ .idlest_reg_id = 2,
+ .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
+ },
+ },
+ .slaves = omap2430_mmc1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
+ .class = &mmc_class,
+ .dev_attr = &mmc1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+/* MMC/SD/SDIO2 */
+
+static struct mmc_dev_attr mmc2_dev_attr;
+
+static struct omap_hwmod_irq_info mmc2_mpu_irqs[] = {
+ { .irq = 86 },
+};
+
+static struct omap_hwmod_dma_info mmc2_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
+ { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
+};
+
+static struct omap_hwmod_opt_clk mmc2_opt_clks[] = {
+ { .role = "dbck", .clk = "mmchsdb_fck" },
+};
+
+static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
+ &omap2430_l4_core__mmc2,
+};
+
+static struct omap_hwmod omap2430_mmc2_hwmod = {
+ .name = "mmc2_hwmod",
+ .mpu_irqs = mmc2_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc2_mpu_irqs),
+ .sdma_reqs = mmc2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc2_sdma_reqs),
+ .opt_clks = mmc2_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(mmc2_opt_clks),
+ .main_clk = "mmchs2_fck",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 2,
+ .module_bit = OMAP2430_EN_MMCHS2_SHIFT,
+ .idlest_reg_id = 2,
+ .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
+ },
+ },
+ .slaves = omap2430_mmc2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
+ .class = &mmc_class,
+ .dev_attr = &mmc2_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
&omap2430_l3_main_hwmod,
&omap2430_l4_core_hwmod,
@@ -931,6 +1084,8 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
&omap2430_uart3_hwmod,
&omap2430_i2c1_hwmod,
&omap2430_i2c2_hwmod,
+ &omap2430_mmc1_hwmod,
+ &omap2430_mmc2_hwmod,
/* gpio class */
&omap2430_gpio1_hwmod,
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 3/5] OMAP3: hwmod data: Add HSMMC
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 1/5] OMAP2420: hwmod data: Add HSMMC Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 2/5] OMAP2430: " Kishore Kadiyala
@ 2011-02-08 20:53 ` Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 4/5] OMAP4: " Kishore Kadiyala
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Kishore Kadiyala @ 2011-02-08 20:53 UTC (permalink / raw)
To: linux-mmc, linux-omap
Cc: tony, cjb, madhu.cr, khilman, paul, Rajendra Nayak, Kishore Kadiyala
From: Paul Walmsley <paul@pwsan.com>
Update the omap3 hwmod data with the HSMMC info.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 221 ++++++++++++++++++++++++++++
arch/arm/mach-omap2/prcm-common.h | 2 +
arch/arm/mach-omap2/prm-regbits-34xx.h | 4 +
3 files changed, 227 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 8d81813..47ca2ee 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -21,6 +21,7 @@
#include <plat/l4_3xxx.h>
#include <plat/i2c.h>
#include <plat/gpio.h>
+#include <plat/mmc.h>
#include <plat/smartreflex.h>
#include "omap_hwmod_common_data.h"
@@ -107,6 +108,9 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
static struct omap_hwmod omap3xxx_uart2_hwmod;
static struct omap_hwmod omap3xxx_uart3_hwmod;
static struct omap_hwmod omap3xxx_uart4_hwmod;
+static struct omap_hwmod omap3xxx_mmc1_hwmod;
+static struct omap_hwmod omap3xxx_mmc2_hwmod;
+static struct omap_hwmod omap3xxx_mmc3_hwmod;
/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
@@ -301,6 +305,63 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
.user = OCP_USER_MPU,
};
+/* L4 CORE -> MMC1 interface */
+static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = {
+ {
+ .pa_start = 0x4809c000,
+ .pa_end = 0x4809c1ff,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mmc1_hwmod,
+ .clk = "mmchs1_ick",
+ .addr = omap3xxx_mmc1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .flags = OMAP_FIREWALL_L4
+};
+
+/* L4 CORE -> MMC2 interface */
+static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = {
+ {
+ .pa_start = 0x480b4000,
+ .pa_end = 0x480b41ff,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mmc2_hwmod,
+ .clk = "mmchs2_ick",
+ .addr = omap3xxx_mmc2_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .flags = OMAP_FIREWALL_L4
+};
+
+/* L4 CORE -> MMC3 interface */
+static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = {
+ {
+ .pa_start = 0x480ad000,
+ .pa_end = 0x480ad1ff,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap3xxx_mmc3_hwmod,
+ .clk = "mmchs3_ick",
+ .addr = omap3xxx_mmc3_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .flags = OMAP_FIREWALL_L4
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
&omap3xxx_l3_main__l4_core,
@@ -1356,11 +1417,171 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
};
+/* MMC/SD/SDIO common */
+
+static struct omap_hwmod_class_sysconfig mmc_sysc = {
+ .rev_offs = 0x1fc,
+ .sysc_offs = 0x10,
+ .syss_offs = 0x14,
+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class mmc_class = {
+ .name = "mmc",
+ .sysc = &mmc_sysc,
+};
+
+/* MMC/SD/SDIO1 */
+
+static struct mmc_dev_attr omap_mmc1_dev_attr = {
+ .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
+};
+
+static struct omap_hwmod_irq_info mmc1_mpu_irqs[] = {
+ { .irq = 83, },
+};
+
+static struct omap_hwmod_dma_info mmc1_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 61, },
+ { .name = "rx", .dma_req = 62, },
+};
+
+static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
+ { .role = "dbck", .clk = "omap_32k_fck", },
+};
+
+static struct omap_hwmod_ocp_if *omap3xxx_mmc1_slaves[] = {
+ &omap3xxx_l4_core__mmc1,
+};
+
+static struct omap_hwmod omap3xxx_mmc1_hwmod = {
+ .name = "mmc1_hwmod",
+ .mpu_irqs = mmc1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc1_mpu_irqs),
+ .sdma_reqs = mmc1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc1_sdma_reqs),
+ .opt_clks = mmc1_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(mmc1_opt_clks),
+ .main_clk = "mmchs1_fck",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_GRPSEL_MMC1_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mmc1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
+ .class = &mmc_class,
+ .dev_attr = &omap_mmc1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* MMC/SD/SDIO2 */
+
+static struct mmc_dev_attr omap_mmc2_dev_attr;
+
+static struct omap_hwmod_irq_info mmc2_mpu_irqs[] = {
+ { .irq = INT_24XX_MMC2_IRQ, },
+};
+
+static struct omap_hwmod_dma_info mmc2_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 47, },
+ { .name = "rx", .dma_req = 48, },
+};
+
+static struct omap_hwmod_opt_clk mmc2_opt_clks[] = {
+ { .role = "dbck", .clk = "omap_32k_fck", },
+};
+
+static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
+ &omap3xxx_l4_core__mmc2,
+};
+
+static struct omap_hwmod omap3xxx_mmc2_hwmod = {
+ .name = "mmc2_hwmod",
+ .mpu_irqs = mmc2_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc2_mpu_irqs),
+ .sdma_reqs = mmc2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc2_sdma_reqs),
+ .opt_clks = mmc2_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(mmc2_opt_clks),
+ .main_clk = "mmchs2_fck",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_GRPSEL_MMC2_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mmc2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
+ .class = &mmc_class,
+ .dev_attr = &omap_mmc2_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* MMC/SD/SDIO3 */
+
+static struct mmc_dev_attr omap_mmc3_dev_attr;
+
+static struct omap_hwmod_irq_info mmc3_mpu_irqs[] = {
+ { .irq = 94, },
+};
+
+static struct omap_hwmod_dma_info mmc3_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 77, },
+ { .name = "rx", .dma_req = 78, },
+};
+
+static struct omap_hwmod_opt_clk mmc3_opt_clks[] = {
+ { .role = "dbck", .clk = "omap_32k_fck", },
+};
+
+static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {
+ &omap3xxx_l4_core__mmc3,
+};
+
+static struct omap_hwmod omap3xxx_mmc3_hwmod = {
+ .name = "mmc3_hwmod",
+ .mpu_irqs = mmc3_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(mmc3_mpu_irqs),
+ .sdma_reqs = mmc3_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(mmc3_sdma_reqs),
+ .opt_clks = mmc3_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(mmc3_opt_clks),
+ .main_clk = "mmchs3_fck",
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430ES2_GRPSEL_MMC3_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_mmc3_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves),
+ .class = &mmc_class,
+ .dev_attr = &omap_mmc3_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_l3_main_hwmod,
&omap3xxx_l4_core_hwmod,
&omap3xxx_l4_per_hwmod,
&omap3xxx_l4_wkup_hwmod,
+ &omap3xxx_mmc1_hwmod,
+ &omap3xxx_mmc2_hwmod,
+ &omap3xxx_mmc3_hwmod,
&omap3xxx_mpu_hwmod,
&omap3xxx_iva_hwmod,
&omap3xxx_wd_timer2_hwmod,
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 87486f5..944916d 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -231,6 +231,8 @@
#define OMAP3430_EN_HSOTGUSB_SHIFT 4
/* PM_WKST1_CORE, CM_IDLEST1_CORE shared bits */
+#define OMAP3430_ST_MMC3_SHIFT 30
+#define OMAP3430_ST_MMC3_MASK (1 << 30)
#define OMAP3430_ST_MMC2_SHIFT 25
#define OMAP3430_ST_MMC2_MASK (1 << 25)
#define OMAP3430_ST_MMC1_SHIFT 24
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 64c087a..71be429 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -95,7 +95,11 @@
#define OMAP3430_WKUP_EN_MASK (1 << 0)
/* PM_MPUGRPSEL1_CORE, PM_IVA2GRPSEL1_CORE shared bits */
+#define OMAP3430ES2_GRPSEL_MMC3_SHIFT 30
+#define OMAP3430ES2_GRPSEL_MMC3_MASK (1 << 30)
+#define OMAP3430_GRPSEL_MMC2_SHIFT 25
#define OMAP3430_GRPSEL_MMC2_MASK (1 << 25)
+#define OMAP3430_GRPSEL_MMC1_SHIFT 24
#define OMAP3430_GRPSEL_MMC1_MASK (1 << 24)
#define OMAP3430_GRPSEL_MCSPI4_MASK (1 << 21)
#define OMAP3430_GRPSEL_MCSPI3_MASK (1 << 20)
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 4/5] OMAP4: hwmod data: Add HSMMC
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
` (2 preceding siblings ...)
2011-02-08 20:53 ` [PATCH v2 3/5] OMAP3: " Kishore Kadiyala
@ 2011-02-08 20:53 ` Kishore Kadiyala
2011-02-08 20:53 ` [PATCH v2 5/5] OMAP: devices: Modify HSMMC device to adapt to hwmod framework Kishore Kadiyala
2011-02-08 23:44 ` [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Tony Lindgren
5 siblings, 0 replies; 9+ messages in thread
From: Kishore Kadiyala @ 2011-02-08 20:53 UTC (permalink / raw)
To: linux-mmc, linux-omap
Cc: tony, cjb, madhu.cr, khilman, paul, Benoit Cousson, Kishore Kadiyala
From: Benoit Cousson <b-cousson@ti.com>
Update the omap4 hwmod data with the HSMMC info.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 339 ++++++++++++++++++++++++++++
1 files changed, 339 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c2806bd..ec46835 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -24,6 +24,7 @@
#include <plat/cpu.h>
#include <plat/gpio.h>
#include <plat/dma.h>
+#include <plat/mmc.h>
#include "omap_hwmod_common_data.h"
@@ -53,6 +54,8 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod;
static struct omap_hwmod omap44xx_l4_cfg_hwmod;
static struct omap_hwmod omap44xx_l4_per_hwmod;
static struct omap_hwmod omap44xx_l4_wkup_hwmod;
+static struct omap_hwmod omap44xx_mmc1_hwmod;
+static struct omap_hwmod omap44xx_mmc2_hwmod;
static struct omap_hwmod omap44xx_mpu_hwmod;
static struct omap_hwmod omap44xx_mpu_private_hwmod;
@@ -229,6 +232,22 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* mmc1 -> l3_main_1 */
+static struct omap_hwmod_ocp_if omap44xx_mmc1__l3_main_1 = {
+ .master = &omap44xx_mmc1_hwmod,
+ .slave = &omap44xx_l3_main_1_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc2 -> l3_main_1 */
+static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
+ .master = &omap44xx_mmc2_hwmod,
+ .slave = &omap44xx_l3_main_1_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* mpu -> l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
.master = &omap44xx_mpu_hwmod,
@@ -242,6 +261,8 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
&omap44xx_dsp__l3_main_1,
&omap44xx_l3_main_2__l3_main_1,
&omap44xx_l4_cfg__l3_main_1,
+ &omap44xx_mmc1__l3_main_1,
+ &omap44xx_mmc2__l3_main_1,
&omap44xx_mpu__l3_main_1,
};
@@ -1435,6 +1456,317 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
};
/*
+ * 'mmc' class
+ * multimedia card high-speed/sd/sdio (mmc/sd/sdio) host controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
+ SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+ MSTANDBY_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
+ .name = "mmc",
+ .sysc = &omap44xx_mmc_sysc,
+};
+
+/* mmc1 */
+static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
+ { .irq = 83 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START },
+};
+
+/* mmc1 master ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc1_masters[] = {
+ &omap44xx_mmc1__l3_main_1,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {
+ {
+ .pa_start = 0x4809c000,
+ .pa_end = 0x4809c3ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mmc1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mmc1_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mmc1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc1_slaves[] = {
+ &omap44xx_l4_per__mmc1,
+};
+
+static struct mmc_dev_attr omap_mmc1_dev_attr = {
+ .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
+};
+
+static struct omap_hwmod omap44xx_mmc1_hwmod = {
+ .name = "mmc1",
+ .class = &omap44xx_mmc_hwmod_class,
+ .mpu_irqs = omap44xx_mmc1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs),
+ .sdma_reqs = omap44xx_mmc1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs),
+ .main_clk = "mmc1_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mmc1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves),
+ .masters = omap44xx_mmc1_masters,
+ .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters),
+ .dev_attr = &omap_mmc1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mmc2 */
+static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
+ { .irq = 86 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START },
+};
+
+/* mmc2 master ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc2_masters[] = {
+ &omap44xx_mmc2__l3_main_1,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {
+ {
+ .pa_start = 0x480b4000,
+ .pa_end = 0x480b43ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mmc2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mmc2_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mmc2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {
+ &omap44xx_l4_per__mmc2,
+};
+
+static struct mmc_dev_attr omap_mmc2_dev_attr;
+
+static struct omap_hwmod omap44xx_mmc2_hwmod = {
+ .name = "mmc2",
+ .class = &omap44xx_mmc_hwmod_class,
+ .mpu_irqs = omap44xx_mmc2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs),
+ .sdma_reqs = omap44xx_mmc2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs),
+ .main_clk = "mmc2_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mmc2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves),
+ .masters = omap44xx_mmc2_masters,
+ .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters),
+ .dev_attr = &omap_mmc2_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mmc3 */
+static struct omap_hwmod omap44xx_mmc3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
+ { .irq = 94 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {
+ {
+ .pa_start = 0x480ad000,
+ .pa_end = 0x480ad3ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mmc3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mmc3_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mmc3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {
+ &omap44xx_l4_per__mmc3,
+};
+
+static struct mmc_dev_attr omap_mmc3_dev_attr;
+
+static struct omap_hwmod omap44xx_mmc3_hwmod = {
+ .name = "mmc3",
+ .class = &omap44xx_mmc_hwmod_class,
+ .mpu_irqs = omap44xx_mmc3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs),
+ .sdma_reqs = omap44xx_mmc3_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs),
+ .main_clk = "mmc3_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mmc3_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves),
+ .dev_attr = &omap_mmc3_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mmc4 */
+static struct omap_hwmod omap44xx_mmc4_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
+ { .irq = 96 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {
+ {
+ .pa_start = 0x480d1000,
+ .pa_end = 0x480d13ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mmc4 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mmc4_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mmc4_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc4 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {
+ &omap44xx_l4_per__mmc4,
+};
+
+static struct mmc_dev_attr omap_mmc4_dev_attr;
+
+static struct omap_hwmod omap44xx_mmc4_hwmod = {
+ .name = "mmc4",
+ .class = &omap44xx_mmc_hwmod_class,
+ .mpu_irqs = omap44xx_mmc4_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs),
+ .sdma_reqs = omap44xx_mmc4_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs),
+ .main_clk = "mmc4_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mmc4_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves),
+ .dev_attr = &omap_mmc4_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mmc5 */
+static struct omap_hwmod omap44xx_mmc5_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
+ { .irq = 59 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
+ { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START },
+ { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {
+ {
+ .pa_start = 0x480d5000,
+ .pa_end = 0x480d53ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> mmc5 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_mmc5_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_mmc5_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mmc5 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {
+ &omap44xx_l4_per__mmc5,
+};
+
+static struct mmc_dev_attr omap_mmc5_dev_attr;
+
+static struct omap_hwmod omap44xx_mmc5_hwmod = {
+ .name = "mmc5",
+ .class = &omap44xx_mmc_hwmod_class,
+ .mpu_irqs = omap44xx_mmc5_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs),
+ .sdma_reqs = omap44xx_mmc5_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs),
+ .main_clk = "mmc5_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_mmc5_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves),
+ .dev_attr = &omap_mmc5_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
* 'mpu' class
* mpu sub-system
*/
@@ -2050,6 +2382,13 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_iva_seq0_hwmod,
&omap44xx_iva_seq1_hwmod,
+ /* mmc class */
+ &omap44xx_mmc1_hwmod,
+ &omap44xx_mmc2_hwmod,
+ &omap44xx_mmc3_hwmod,
+ &omap44xx_mmc4_hwmod,
+ &omap44xx_mmc5_hwmod,
+
/* mpu class */
&omap44xx_mpu_hwmod,
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 5/5] OMAP: devices: Modify HSMMC device to adapt to hwmod framework
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
` (3 preceding siblings ...)
2011-02-08 20:53 ` [PATCH v2 4/5] OMAP4: " Kishore Kadiyala
@ 2011-02-08 20:53 ` Kishore Kadiyala
2011-02-08 23:34 ` Varadarajan, Charulatha
2011-02-08 23:44 ` [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Tony Lindgren
5 siblings, 1 reply; 9+ messages in thread
From: Kishore Kadiyala @ 2011-02-08 20:53 UTC (permalink / raw)
To: linux-mmc, linux-omap
Cc: tony, cjb, madhu.cr, khilman, paul, Kishore Kadiyala
Changes involves:
1) Remove controller reset in devices.c which is taken care
by hwmod framework.
2) Removing all base address macro defines.
3) Using omap-device layer to register device and utilizing data from
hwmod data file for base address, dma channel number, Irq_number,
device attribute.
4) Update the driver to use dev_attr to find whether controller
supports dual volt cards.
5) Moving "omap_mmc_add" api from plat-omap/devices.c to mach-omap1/devices.c
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
arch/arm/mach-omap1/devices.c | 41 +++++++
arch/arm/mach-omap2/board-n8x0.c | 6 +-
arch/arm/mach-omap2/devices.c | 207 +++++++--------------------------
arch/arm/mach-omap2/hsmmc.c | 6 +-
arch/arm/plat-omap/devices.c | 50 --------
arch/arm/plat-omap/include/plat/mmc.h | 36 ++-----
drivers/mmc/host/omap_hsmmc.c | 4 +-
7 files changed, 100 insertions(+), 250 deletions(-)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index b0f4c23..eae41b6 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -72,6 +72,47 @@ static inline void omap_init_mbox(void) { }
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+#define OMAP_MMC_NR_RES 2
+
+int __init omap_mmc_add(const char *name, int id, unsigned long base,
+ unsigned long size, unsigned int irq,
+ struct omap_mmc_platform_data *data)
+{
+ struct platform_device *pdev;
+ struct resource res[OMAP_MMC_NR_RES];
+ int ret;
+
+ pdev = platform_device_alloc(name, id);
+ if (!pdev)
+ return -ENOMEM;
+
+ memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
+ res[0].start = base;
+ res[0].end = base + size - 1;
+ res[0].flags = IORESOURCE_MEM;
+ res[1].start = irq;
+ res[1].end = irq;
+ res[1].flags = IORESOURCE_IRQ;
+
+ ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
+ if (ret == 0)
+ ret = platform_device_add_data(pdev, data, sizeof(*data));
+ if (ret)
+ goto fail;
+
+ ret = platform_device_add(pdev);
+ if (ret)
+ goto fail;
+
+ /* return device handle to board setup code */
+ data->dev = &pdev->dev;
+ return 0;
+
+fail:
+ platform_device_put(pdev);
+ return ret;
+}
+
static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 1cb53bc..5c9cd31 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -594,8 +594,6 @@ static struct omap_mmc_platform_data mmc1_data = {
},
};
-static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
-
static void __init n8x0_mmc_init(void)
{
@@ -637,8 +635,8 @@ static void __init n8x0_mmc_init(void)
gpio_direction_output(N810_EMMC_VIO_GPIO, 0);
}
- mmc_data[0] = &mmc1_data;
- omap2_init_mmc(mmc_data, OMAP24XX_NR_MMC);
+ hsmmc_data[0] = &mmc1_data;
+ omap_hwmod_for_each_by_class("mmc", omap2_init_mmc, NULL);
}
#else
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index e0f0ef9..80e46b3 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -610,112 +610,6 @@ static inline void omap_init_aes(void) { }
/*-------------------------------------------------------------------------*/
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
-
-#define MMCHS_SYSCONFIG 0x0010
-#define MMCHS_SYSCONFIG_SWRESET (1 << 1)
-#define MMCHS_SYSSTATUS 0x0014
-#define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
-
-static struct platform_device dummy_pdev = {
- .dev = {
- .bus = &platform_bus_type,
- },
-};
-
-/**
- * omap_hsmmc_reset() - Full reset of each HS-MMC controller
- *
- * Ensure that each MMC controller is fully reset. Controllers
- * left in an unknown state (by bootloader) may prevent retention
- * or OFF-mode. This is especially important in cases where the
- * MMC driver is not enabled, _or_ built as a module.
- *
- * In order for reset to work, interface, functional and debounce
- * clocks must be enabled. The debounce clock comes from func_32k_clk
- * and is not under SW control, so we only enable i- and f-clocks.
- **/
-static void __init omap_hsmmc_reset(void)
-{
- u32 i, nr_controllers;
- struct clk *iclk, *fclk;
-
- if (cpu_is_omap242x())
- return;
-
- nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
- (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
-
- for (i = 0; i < nr_controllers; i++) {
- u32 v, base = 0;
- struct device *dev = &dummy_pdev.dev;
-
- switch (i) {
- case 0:
- base = OMAP2_MMC1_BASE;
- break;
- case 1:
- base = OMAP2_MMC2_BASE;
- break;
- case 2:
- base = OMAP3_MMC3_BASE;
- break;
- case 3:
- if (!cpu_is_omap44xx())
- return;
- base = OMAP4_MMC4_BASE;
- break;
- case 4:
- if (!cpu_is_omap44xx())
- return;
- base = OMAP4_MMC5_BASE;
- break;
- }
-
- if (cpu_is_omap44xx())
- base += OMAP4_MMC_REG_OFFSET;
-
- dummy_pdev.id = i;
- dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
- iclk = clk_get(dev, "ick");
- if (IS_ERR(iclk))
- goto err1;
- if (clk_enable(iclk))
- goto err2;
-
- fclk = clk_get(dev, "fck");
- if (IS_ERR(fclk))
- goto err3;
- if (clk_enable(fclk))
- goto err4;
-
- omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
- v = omap_readl(base + MMCHS_SYSSTATUS);
- while (!(omap_readl(base + MMCHS_SYSSTATUS) &
- MMCHS_SYSSTATUS_RESETDONE))
- cpu_relax();
-
- clk_disable(fclk);
- clk_put(fclk);
- clk_disable(iclk);
- clk_put(iclk);
- }
- return;
-
-err4:
- clk_put(fclk);
-err3:
- clk_disable(iclk);
-err2:
- clk_put(iclk);
-err1:
- printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, "
- "cannot reset.\n", __func__, i);
-}
-#else
-static inline void omap_hsmmc_reset(void) {}
-#endif
-
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
@@ -828,66 +722,54 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
}
}
-void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
- int nr_controllers)
+struct omap_mmc_platform_data *hsmmc_data[OMAP44XX_NR_MMC];
+EXPORT_SYMBOL(hsmmc_data);
+
+static struct omap_device_pm_latency omap_hsmmc_latency[] = {
+ [0] = {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+ /*
+ * XXX There should also be an entry here to power off/on the
+ * MMC regulators/PBIAS cells, etc.
+ */
+};
+
+int omap2_init_mmc(struct omap_hwmod *oh, void *nop)
{
- int i;
+ struct omap_device *od;
+ struct omap_device_pm_latency *ohl;
char *name;
+ int ohl_cnt = 0;
+ static int mmc_num;
- for (i = 0; i < nr_controllers; i++) {
- unsigned long base, size;
- unsigned int irq = 0;
-
- if (!mmc_data[i])
- continue;
-
- omap2_mmc_mux(mmc_data[i], i);
-
- switch (i) {
- case 0:
- base = OMAP2_MMC1_BASE;
- irq = INT_24XX_MMC_IRQ;
- break;
- case 1:
- base = OMAP2_MMC2_BASE;
- irq = INT_24XX_MMC2_IRQ;
- break;
- case 2:
- if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
- return;
- base = OMAP3_MMC3_BASE;
- irq = INT_34XX_MMC3_IRQ;
- break;
- case 3:
- if (!cpu_is_omap44xx())
- return;
- base = OMAP4_MMC4_BASE;
- irq = OMAP44XX_IRQ_MMC4;
- break;
- case 4:
- if (!cpu_is_omap44xx())
- return;
- base = OMAP4_MMC5_BASE;
- irq = OMAP44XX_IRQ_MMC5;
- break;
- default:
- continue;
- }
+ if (!hsmmc_data[mmc_num]) {
+ mmc_num++;
+ return 0;
+ }
+ if (cpu_is_omap2420()) {
+ name = "mmci-omap";
+ } else {
+ name = "mmci-omap-hs";
+ ohl = omap_hsmmc_latency;
+ ohl_cnt = ARRAY_SIZE(omap_hsmmc_latency);
+ }
- if (cpu_is_omap2420()) {
- size = OMAP2420_MMC_SIZE;
- name = "mmci-omap";
- } else if (cpu_is_omap44xx()) {
- if (i < 3)
- irq += OMAP44XX_IRQ_GIC_START;
- size = OMAP4_HSMMC_SIZE;
- name = "mmci-omap-hs";
- } else {
- size = OMAP3_HSMMC_SIZE;
- name = "mmci-omap-hs";
- }
- omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
- };
+ hsmmc_data[mmc_num]->dev_attr = oh->dev_attr;
+ omap2_mmc_mux(hsmmc_data[mmc_num], mmc_num);
+ od = omap_device_build(name, mmc_num, oh, hsmmc_data[mmc_num],
+ sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
+ WARN(IS_ERR(od), "Could not build omap_device for %s %s\n",
+ name, oh->name);
+ /*
+ * return device handle to board setup code
+ * required to populate for regulator framework structure
+ */
+ hsmmc_data[mmc_num]->dev = &od->pdev.dev;
+ mmc_num++;
+ return 0;
}
#endif
@@ -961,7 +843,6 @@ static int __init omap2_init_devices(void)
* please keep these calls, and their implementations above,
* in alphabetical order so they're easier to sort through.
*/
- omap_hsmmc_reset();
omap_init_audio();
omap_init_camera();
omap_init_mbox();
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 34272e4..8f1a484 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -30,7 +30,7 @@ static u16 control_mmc1;
static struct hsmmc_controller {
char name[HSMMC_NAME_LEN + 1];
-} hsmmc[OMAP34XX_NR_MMC];
+} hsmmc[OMAP44XX_NR_MMC];
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
@@ -204,8 +204,6 @@ static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
return 0;
}
-static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
-
void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
struct omap2_hsmmc_info *c;
@@ -358,7 +356,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
hsmmc_data[c->mmc - 1] = mmc;
}
- omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
+ omap_hwmod_for_each_by_class("mmc", omap2_init_mmc, NULL);
/* pass the device nodes back to board setup code */
for (c = controllers; c->mmc; c++) {
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 10245b8..a126e37 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -107,56 +107,6 @@ static inline void omap_init_mcpdm(void) {}
/*-------------------------------------------------------------------------*/
-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
- defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
-
-#define OMAP_MMC_NR_RES 2
-
-/*
- * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
- */
-int __init omap_mmc_add(const char *name, int id, unsigned long base,
- unsigned long size, unsigned int irq,
- struct omap_mmc_platform_data *data)
-{
- struct platform_device *pdev;
- struct resource res[OMAP_MMC_NR_RES];
- int ret;
-
- pdev = platform_device_alloc(name, id);
- if (!pdev)
- return -ENOMEM;
-
- memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
- res[0].start = base;
- res[0].end = base + size - 1;
- res[0].flags = IORESOURCE_MEM;
- res[1].start = res[1].end = irq;
- res[1].flags = IORESOURCE_IRQ;
-
- ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
- if (ret == 0)
- ret = platform_device_add_data(pdev, data, sizeof(*data));
- if (ret)
- goto fail;
-
- ret = platform_device_add(pdev);
- if (ret)
- goto fail;
-
- /* return device handle to board setup code */
- data->dev = &pdev->dev;
- return 0;
-
-fail:
- platform_device_put(pdev);
- return ret;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-
#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
#ifdef CONFIG_ARCH_OMAP2
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 7821344..08b7503 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -16,6 +16,7 @@
#include <linux/mmc/host.h>
#include <plat/board.h>
+#include <plat/omap_hwmod.h>
#define OMAP15XX_NR_MMC 1
#define OMAP16XX_NR_MMC 2
@@ -23,23 +24,8 @@
#define OMAP1_MMC1_BASE 0xfffb7800
#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
-#define OMAP24XX_NR_MMC 2
-#define OMAP34XX_NR_MMC 3
#define OMAP44XX_NR_MMC 5
-#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
-#define OMAP3_HSMMC_SIZE 0x200
-#define OMAP4_HSMMC_SIZE 0x1000
-#define OMAP2_MMC1_BASE 0x4809c000
-#define OMAP2_MMC2_BASE 0x480b4000
-#define OMAP3_MMC3_BASE 0x480ad000
-#define OMAP4_MMC4_BASE 0x480d1000
-#define OMAP4_MMC5_BASE 0x480d5000
#define OMAP4_MMC_REG_OFFSET 0x100
-#define HSMMC5 (1 << 4)
-#define HSMMC4 (1 << 3)
-#define HSMMC3 (1 << 2)
-#define HSMMC2 (1 << 1)
-#define HSMMC1 (1 << 0)
#define OMAP_MMC_MAX_SLOTS 2
@@ -78,6 +64,9 @@ struct omap_mmc_platform_data {
u64 dma_mask;
+ /* Integrating attributes from the omap_hwmod layer */
+ struct mmc_dev_attr *dev_attr;
+
/* Register offset deviation */
u16 reg_offset;
@@ -164,25 +153,18 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+
+extern struct omap_mmc_platform_data *hsmmc_data[OMAP44XX_NR_MMC];
+
void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers);
-void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
- int nr_controllers);
-int omap_mmc_add(const char *name, int id, unsigned long base,
- unsigned long size, unsigned int irq,
- struct omap_mmc_platform_data *data);
+extern int omap2_init_mmc(struct omap_hwmod *oh, void *nop);
#else
static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers)
{
}
-static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
- int nr_controllers)
-{
-}
-static inline int omap_mmc_add(const char *name, int id, unsigned long base,
- unsigned long size, unsigned int irq,
- struct omap_mmc_platform_data *data)
+int omap2_init_mmc(struct omap_hwmod *oh, void *mmc_pdata)
{
return 0;
}
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 078fdf1..f59f8da 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1555,7 +1555,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
break;
}
- if (host->id == OMAP_MMC1_DEVID) {
+ if (host->pdata->dev_attr->flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
/* Only MMC1 can interface at 3V without some flavor
* of external transceiver; but they all handle 1.8V.
*/
@@ -1647,7 +1647,7 @@ static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
u32 hctl, capa, value;
/* Only MMC1 supports 3.0V */
- if (host->id == OMAP_MMC1_DEVID) {
+ if (host->pdata->dev_attr->flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
hctl = SDVS30;
capa = VS30 | VS18;
} else {
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 5/5] OMAP: devices: Modify HSMMC device to adapt to hwmod framework
2011-02-08 20:53 ` [PATCH v2 5/5] OMAP: devices: Modify HSMMC device to adapt to hwmod framework Kishore Kadiyala
@ 2011-02-08 23:34 ` Varadarajan, Charulatha
0 siblings, 0 replies; 9+ messages in thread
From: Varadarajan, Charulatha @ 2011-02-08 23:34 UTC (permalink / raw)
To: Kishore Kadiyala
Cc: linux-mmc, linux-omap, tony, cjb, madhu.cr, khilman, paul
Kishore,
On Wed, Feb 9, 2011 at 01:23, Kishore Kadiyala <kishore.kadiyala@ti.com> wrote:
> Changes involves:
> 1) Remove controller reset in devices.c which is taken care
> by hwmod framework.
> 2) Removing all base address macro defines.
> 3) Using omap-device layer to register device and utilizing data from
> hwmod data file for base address, dma channel number, Irq_number,
> device attribute.
> 4) Update the driver to use dev_attr to find whether controller
> supports dual volt cards.
> 5) Moving "omap_mmc_add" api from plat-omap/devices.c to mach-omap1/devices.c
>
> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
> ---
> arch/arm/mach-omap1/devices.c | 41 +++++++
> arch/arm/mach-omap2/board-n8x0.c | 6 +-
> arch/arm/mach-omap2/devices.c | 207 +++++++--------------------------
> arch/arm/mach-omap2/hsmmc.c | 6 +-
> arch/arm/plat-omap/devices.c | 50 --------
> arch/arm/plat-omap/include/plat/mmc.h | 36 ++-----
> drivers/mmc/host/omap_hsmmc.c | 4 +-
> 7 files changed, 100 insertions(+), 250 deletions(-)
>
<<snip>>
> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
> index e0f0ef9..80e46b3 100644
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -610,112 +610,6 @@ static inline void omap_init_aes(void) { }
>
> /*-------------------------------------------------------------------------*/
>
<<snip>>
>
> @@ -828,66 +722,54 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
> }
> }
>
> -void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
> - int nr_controllers)
> +struct omap_mmc_platform_data *hsmmc_data[OMAP44XX_NR_MMC];
> +EXPORT_SYMBOL(hsmmc_data);
> +
> +static struct omap_device_pm_latency omap_hsmmc_latency[] = {
> + [0] = {
> + .deactivate_func = omap_device_idle_hwmods,
> + .activate_func = omap_device_enable_hwmods,
> + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
> + },
> + /*
> + * XXX There should also be an entry here to power off/on the
> + * MMC regulators/PBIAS cells, etc.
> + */
> +};
> +
> +int omap2_init_mmc(struct omap_hwmod *oh, void *nop)
> {
> - int i;
> + struct omap_device *od;
> + struct omap_device_pm_latency *ohl;
> char *name;
> + int ohl_cnt = 0;
> + static int mmc_num;
>
> - for (i = 0; i < nr_controllers; i++) {
> - unsigned long base, size;
> - unsigned int irq = 0;
> -
> - if (!mmc_data[i])
> - continue;
> -
> - omap2_mmc_mux(mmc_data[i], i);
> -
> - switch (i) {
> - case 0:
> - base = OMAP2_MMC1_BASE;
> - irq = INT_24XX_MMC_IRQ;
> - break;
> - case 1:
> - base = OMAP2_MMC2_BASE;
> - irq = INT_24XX_MMC2_IRQ;
> - break;
> - case 2:
> - if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
> - return;
> - base = OMAP3_MMC3_BASE;
> - irq = INT_34XX_MMC3_IRQ;
> - break;
> - case 3:
> - if (!cpu_is_omap44xx())
> - return;
> - base = OMAP4_MMC4_BASE;
> - irq = OMAP44XX_IRQ_MMC4;
> - break;
> - case 4:
> - if (!cpu_is_omap44xx())
> - return;
> - base = OMAP4_MMC5_BASE;
> - irq = OMAP44XX_IRQ_MMC5;
> - break;
> - default:
> - continue;
> - }
> + if (!hsmmc_data[mmc_num]) {
> + mmc_num++;
> + return 0;
> + }
> + if (cpu_is_omap2420()) {
> + name = "mmci-omap";
> + } else {
> + name = "mmci-omap-hs";
> + ohl = omap_hsmmc_latency;
> + ohl_cnt = ARRAY_SIZE(omap_hsmmc_latency);
> + }
>
> - if (cpu_is_omap2420()) {
> - size = OMAP2420_MMC_SIZE;
> - name = "mmci-omap";
> - } else if (cpu_is_omap44xx()) {
> - if (i < 3)
> - irq += OMAP44XX_IRQ_GIC_START;
> - size = OMAP4_HSMMC_SIZE;
> - name = "mmci-omap-hs";
> - } else {
> - size = OMAP3_HSMMC_SIZE;
> - name = "mmci-omap-hs";
> - }
> - omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
> - };
> + hsmmc_data[mmc_num]->dev_attr = oh->dev_attr;
Copy the data from oh->dev_attr instead of relying on oh pointer
(don't rely on internals of hwmod data structures in the driver).
> + omap2_mmc_mux(hsmmc_data[mmc_num], mmc_num);
> + od = omap_device_build(name, mmc_num, oh, hsmmc_data[mmc_num],
> + sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
> + WARN(IS_ERR(od), "Could not build omap_device for %s %s\n",
> + name, oh->name);
> + /*
> + * return device handle to board setup code
> + * required to populate for regulator framework structure
> + */
> + hsmmc_data[mmc_num]->dev = &od->pdev.dev;
If od is incorrect, do a WARN() and return error. Don't access od
in case of a failure.
> + mmc_num++;
> + return 0;
> }
>
<<snip>>
> diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
> index 7821344..08b7503 100644
> --- a/arch/arm/plat-omap/include/plat/mmc.h
> +++ b/arch/arm/plat-omap/include/plat/mmc.h
> @@ -16,6 +16,7 @@
> #include <linux/mmc/host.h>
>
> #include <plat/board.h>
> +#include <plat/omap_hwmod.h>
>
> #define OMAP15XX_NR_MMC 1
> #define OMAP16XX_NR_MMC 2
> @@ -23,23 +24,8 @@
> #define OMAP1_MMC1_BASE 0xfffb7800
> #define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
These need not be part of plat/mmc.h and
can be moved to mach-omap1/*
>
> -#define OMAP24XX_NR_MMC 2
> -#define OMAP34XX_NR_MMC 3
> #define OMAP44XX_NR_MMC 5
Shouldn't OMAP44XX_NR_MMC should also be
removed? I think this info should be populated
dynamically during omap_hwmod_for_each_by_class().
> -#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
> -#define OMAP3_HSMMC_SIZE 0x200
> -#define OMAP4_HSMMC_SIZE 0x1000
> -#define OMAP2_MMC1_BASE 0x4809c000
> -#define OMAP2_MMC2_BASE 0x480b4000
> -#define OMAP3_MMC3_BASE 0x480ad000
> -#define OMAP4_MMC4_BASE 0x480d1000
> -#define OMAP4_MMC5_BASE 0x480d5000
> #define OMAP4_MMC_REG_OFFSET 0x100
> -#define HSMMC5 (1 << 4)
> -#define HSMMC4 (1 << 3)
> -#define HSMMC3 (1 << 2)
> -#define HSMMC2 (1 << 1)
> -#define HSMMC1 (1 << 0)
>
> #define OMAP_MMC_MAX_SLOTS 2
>
> @@ -78,6 +64,9 @@ struct omap_mmc_platform_data {
>
> u64 dma_mask;
>
> + /* Integrating attributes from the omap_hwmod layer */
> + struct mmc_dev_attr *dev_attr;
> +
> /* Register offset deviation */
> u16 reg_offset;
>
> @@ -164,25 +153,18 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
>
> #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
> defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
> +
> +extern struct omap_mmc_platform_data *hsmmc_data[OMAP44XX_NR_MMC];
Same again. OMAP44XX_NR_MMC shall be removed and
instead be populated dynamically.
> +
> void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
> int nr_controllers);
<<snip>>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation
2011-02-08 20:53 [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Kishore Kadiyala
` (4 preceding siblings ...)
2011-02-08 20:53 ` [PATCH v2 5/5] OMAP: devices: Modify HSMMC device to adapt to hwmod framework Kishore Kadiyala
@ 2011-02-08 23:44 ` Tony Lindgren
2011-02-10 14:29 ` Krishnamoorthy, Balaji T
5 siblings, 1 reply; 9+ messages in thread
From: Tony Lindgren @ 2011-02-08 23:44 UTC (permalink / raw)
To: Kishore Kadiyala; +Cc: linux-mmc, linux-omap, cjb, madhu.cr, khilman, paul
* Kishore Kadiyala <kishore.kadiyala@ti.com> [110208 12:45]:
> Adding hwmod data for hsmmc device on OMAP2420/OMAP2430/OMAP3/OMAP4.
> Adapting the omap_hsmmc driver to hwmod framework
>
> V2:
> ---
> Updated hwmod data for OMAP2420 & OMAP2430.
>
> The patch series is rebased on v2.6.38-rc4 and tested on OMAP4430SDP,
> OMAP3430SDP & OMAP2430SDP.
>
> For OMAP2430SDP validation, the patch series has dependency on
> https://patchwork.kernel.org/patch/538301/
No luck on 2430sdp with these and the above patch applied:
# dmesg | grep -i mmc
omap_hwmod: mmc1_hwmod: cannot clk_get opt_clk mmchsdb_fck
omap_hwmod: mmchs2_fck: missing clockdomain for mmchs2_fck.
omap_hwmod: mmc2_hwmod: cannot clk_get opt_clk mmchsdb_fck
omap_hwmod: mmc1_hwmod: softreset failed (waited 10000 usec)
omap_hwmod: mmc2_hwmod: softreset failed (waited 10000 usec)
print_constraints: VMMC1: 1850 <--> 3150 mV at 3150 mV normal standby
> Testing on N8x0 is pending due to unavailability of working ones.
> Will be thankful if some body test this series on N8x0.
And on n800 this series produces imprecise external abort (0xc06) at 0x0
early during the boot. Maybe take a look on H4 SDP? Note that all
2420 based boards are using drivers/mmc/host/omap.c, not hsmm.
Regards,
Tony
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation
2011-02-08 23:44 ` [PATCH v2 0/5] OMAP: HSMMC: hwmod adaptation Tony Lindgren
@ 2011-02-10 14:29 ` Krishnamoorthy, Balaji T
0 siblings, 0 replies; 9+ messages in thread
From: Krishnamoorthy, Balaji T @ 2011-02-10 14:29 UTC (permalink / raw)
To: Tony Lindgren
Cc: Kishore Kadiyala, linux-mmc, linux-omap, cjb, madhu.cr, khilman, paul
On Wed, Feb 9, 2011 at 5:14 AM, Tony Lindgren <tony@atomide.com> wrote:
> * Kishore Kadiyala <kishore.kadiyala@ti.com> [110208 12:45]:
>> Adding hwmod data for hsmmc device on OMAP2420/OMAP2430/OMAP3/OMAP4.
>> Adapting the omap_hsmmc driver to hwmod framework
>>
>> V2:
>> ---
>> Updated hwmod data for OMAP2420 & OMAP2430.
>>
>> The patch series is rebased on v2.6.38-rc4 and tested on OMAP4430SDP,
>> OMAP3430SDP & OMAP2430SDP.
>>
>> For OMAP2430SDP validation, the patch series has dependency on
>> https://patchwork.kernel.org/patch/538301/
>
> No luck on 2430sdp with these and the above patch applied:
Hi Tony,
Can you let us know your SDP board version.
2430sdp VG5.1.0 + SD card on MMC1 slot worked for me with 2.6.38-rc3
>
> # dmesg | grep -i mmc
> omap_hwmod: mmc1_hwmod: cannot clk_get opt_clk mmchsdb_fck
> omap_hwmod: mmchs2_fck: missing clockdomain for mmchs2_fck.
> omap_hwmod: mmc2_hwmod: cannot clk_get opt_clk mmchsdb_fck
> omap_hwmod: mmc1_hwmod: softreset failed (waited 10000 usec)
> omap_hwmod: mmc2_hwmod: softreset failed (waited 10000 usec)
> print_constraints: VMMC1: 1850 <--> 3150 mV at 3150 mV normal standby
>
^ permalink raw reply [flat|nested] 9+ messages in thread