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From: Atish Patra <atish.patra@wdc.com>
To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ingo Molnar <mingo@kernel.org>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Johan Hovold <johan@kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	Otto Sabart <ottosabart@seberm.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Will Deacon <will.deacon@arm.com>
Subject: Re: [RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V
Date: Wed, 10 Apr 2019 15:49:54 -0700	[thread overview]
Message-ID: <12c9f8b0-cdeb-2b9c-5662-6c5a08cd0a95@wdc.com> (raw)
In-Reply-To: <20190320234806.19748-1-atish.patra@wdc.com>

On 3/20/19 4:48 PM, Atish Patra wrote:
> The cpu-map DT entry in ARM can describe the CPU topology in much better
> way compared to other existing approaches. RISC-V can easily adopt this
> binding to represent its own CPU topology. Thus, both cpu-map DT
> binding and topology parsing code can be moved to a common location so
> that RISC-V or any other architecture can leverage that.
> 
> The relevant discussion regarding unifying cpu topology can be found in
> [1].
> 
> arch_topology seems to be a perfect place to move the common code. I
> have not introduced any significant functional changes in the moved code.
> The only downside in this approach is that the capacity code will be
> executed for RISC-V as well. But, it will exit immediately after not
> able to find the appropriate DT node. If the overhead is considered too
> much, we can always compile out capacity related functions under a
> different config for the architectures that do not support them.
> 
> There was an opportunity to unify topology data structure for ARM32 done
> by patch 3/4. But, I refrained from making any other changes as I am not
> very well versed with original intention for some functions that
> are present in arch_topology.c. I hope this patch series can be served
> as a baseline for such changes in the future.
> 
> The patches have been tested for RISC-V and compile tested for ARM64,
> ARM32 & x86.
> 
> The socket change[2] is also now part of this series.
> 
> [1] https://lkml.org/lkml/2018/11/6/19
> [2] https://lkml.org/lkml/2018/11/7/918
> 
> QEMU changes for RISC-V topology are available at
> 
> https://github.com/atishp04/qemu/tree/riscv_topology_dt
> 
> HiFive Unleashed DT with topology node is available here.
> https://github.com/atishp04/opensbi/tree/HiFive_unleashed_topology
> 
> It can be verified with OpenSBI with following additional compile time
> option.
> 
> FW_PAYLOAD_FDT="unleashed_topology.dtb"
> 
> Changes from v2->v3
> 1. Cover letter update with experiment DT for topology changes.
> 2. Added the patch for [2].
> 
> Changes from v1->v2
> 1. ARM32 can now use the common code as well.
> 
> Atish Patra (4):
> dt-binding: cpu-topology: Move cpu-map to a common binding.
> cpu-topology: Move cpu topology code to common code.
> arm: Use common cpu_topology
> RISC-V: Parse cpu topology during boot.
> 
> Sudeep Holla (1):
> Documentation: DT: arm: add support for sockets defining package
> boundaries
> 
> .../topology.txt => cpu/cpu-topology.txt}     | 134 ++++++--
> arch/arm/include/asm/topology.h               |  22 +-
> arch/arm/kernel/topology.c                    |  10 +-
> arch/arm64/include/asm/topology.h             |  23 --
> arch/arm64/kernel/topology.c                  | 303 +-----------------
> arch/riscv/Kconfig                            |   1 +
> arch/riscv/kernel/smpboot.c                   |   3 +
> drivers/base/arch_topology.c                  | 298 ++++++++++++++++-
> drivers/base/topology.c                       |   1 +
> include/linux/arch_topology.h                 |  36 +++
> 10 files changed, 453 insertions(+), 378 deletions(-)
> rename Documentation/devicetree/bindings/{arm/topology.txt => cpu/cpu-topology.txt} (66%)
> 
> --
> 2.21.0
> 
> 

Ping?

Specifically, patch 3 & 4 affects ARM & ARM64. Any tests on real 
hardware would be great.

Regards,
Atish

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com>
To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ingo Molnar <mingo@kernel.org>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Johan Hovold <johan@kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	Otto Sabart <ottosabart@seberm.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	"Rafael J. Wysocki" <rafael@kernel.>
Subject: Re: [RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V
Date: Wed, 10 Apr 2019 15:49:54 -0700	[thread overview]
Message-ID: <12c9f8b0-cdeb-2b9c-5662-6c5a08cd0a95@wdc.com> (raw)
In-Reply-To: <20190320234806.19748-1-atish.patra@wdc.com>

On 3/20/19 4:48 PM, Atish Patra wrote:
> The cpu-map DT entry in ARM can describe the CPU topology in much better
> way compared to other existing approaches. RISC-V can easily adopt this
> binding to represent its own CPU topology. Thus, both cpu-map DT
> binding and topology parsing code can be moved to a common location so
> that RISC-V or any other architecture can leverage that.
> 
> The relevant discussion regarding unifying cpu topology can be found in
> [1].
> 
> arch_topology seems to be a perfect place to move the common code. I
> have not introduced any significant functional changes in the moved code.
> The only downside in this approach is that the capacity code will be
> executed for RISC-V as well. But, it will exit immediately after not
> able to find the appropriate DT node. If the overhead is considered too
> much, we can always compile out capacity related functions under a
> different config for the architectures that do not support them.
> 
> There was an opportunity to unify topology data structure for ARM32 done
> by patch 3/4. But, I refrained from making any other changes as I am not
> very well versed with original intention for some functions that
> are present in arch_topology.c. I hope this patch series can be served
> as a baseline for such changes in the future.
> 
> The patches have been tested for RISC-V and compile tested for ARM64,
> ARM32 & x86.
> 
> The socket change[2] is also now part of this series.
> 
> [1] https://lkml.org/lkml/2018/11/6/19
> [2] https://lkml.org/lkml/2018/11/7/918
> 
> QEMU changes for RISC-V topology are available at
> 
> https://github.com/atishp04/qemu/tree/riscv_topology_dt
> 
> HiFive Unleashed DT with topology node is available here.
> https://github.com/atishp04/opensbi/tree/HiFive_unleashed_topology
> 
> It can be verified with OpenSBI with following additional compile time
> option.
> 
> FW_PAYLOAD_FDT="unleashed_topology.dtb"
> 
> Changes from v2->v3
> 1. Cover letter update with experiment DT for topology changes.
> 2. Added the patch for [2].
> 
> Changes from v1->v2
> 1. ARM32 can now use the common code as well.
> 
> Atish Patra (4):
> dt-binding: cpu-topology: Move cpu-map to a common binding.
> cpu-topology: Move cpu topology code to common code.
> arm: Use common cpu_topology
> RISC-V: Parse cpu topology during boot.
> 
> Sudeep Holla (1):
> Documentation: DT: arm: add support for sockets defining package
> boundaries
> 
> .../topology.txt => cpu/cpu-topology.txt}     | 134 ++++++--
> arch/arm/include/asm/topology.h               |  22 +-
> arch/arm/kernel/topology.c                    |  10 +-
> arch/arm64/include/asm/topology.h             |  23 --
> arch/arm64/kernel/topology.c                  | 303 +-----------------
> arch/riscv/Kconfig                            |   1 +
> arch/riscv/kernel/smpboot.c                   |   3 +
> drivers/base/arch_topology.c                  | 298 ++++++++++++++++-
> drivers/base/topology.c                       |   1 +
> include/linux/arch_topology.h                 |  36 +++
> 10 files changed, 453 insertions(+), 378 deletions(-)
> rename Documentation/devicetree/bindings/{arm/topology.txt => cpu/cpu-topology.txt} (66%)
> 
> --
> 2.21.0
> 
> 

Ping?

Specifically, patch 3 & 4 affects ARM & ARM64. Any tests on real 
hardware would be great.

Regards,
Atish

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com>
To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>,
	Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Johan Hovold <johan@kernel.org>,
	"Peter Zijlstra \(Intel\)" <peterz@infradead.org>,
	Rob Herring <robh+dt@kernel.org>,
	Otto Sabart <ottosabart@seberm.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	Will Deacon <will.deacon@arm.com>, Ingo Molnar <mingo@kernel.org>,
	Morten Rasmussen <morten.rasmussen@arm.com>
Subject: Re: [RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V
Date: Wed, 10 Apr 2019 15:49:54 -0700	[thread overview]
Message-ID: <12c9f8b0-cdeb-2b9c-5662-6c5a08cd0a95@wdc.com> (raw)
In-Reply-To: <20190320234806.19748-1-atish.patra@wdc.com>

On 3/20/19 4:48 PM, Atish Patra wrote:
> The cpu-map DT entry in ARM can describe the CPU topology in much better
> way compared to other existing approaches. RISC-V can easily adopt this
> binding to represent its own CPU topology. Thus, both cpu-map DT
> binding and topology parsing code can be moved to a common location so
> that RISC-V or any other architecture can leverage that.
> 
> The relevant discussion regarding unifying cpu topology can be found in
> [1].
> 
> arch_topology seems to be a perfect place to move the common code. I
> have not introduced any significant functional changes in the moved code.
> The only downside in this approach is that the capacity code will be
> executed for RISC-V as well. But, it will exit immediately after not
> able to find the appropriate DT node. If the overhead is considered too
> much, we can always compile out capacity related functions under a
> different config for the architectures that do not support them.
> 
> There was an opportunity to unify topology data structure for ARM32 done
> by patch 3/4. But, I refrained from making any other changes as I am not
> very well versed with original intention for some functions that
> are present in arch_topology.c. I hope this patch series can be served
> as a baseline for such changes in the future.
> 
> The patches have been tested for RISC-V and compile tested for ARM64,
> ARM32 & x86.
> 
> The socket change[2] is also now part of this series.
> 
> [1] https://lkml.org/lkml/2018/11/6/19
> [2] https://lkml.org/lkml/2018/11/7/918
> 
> QEMU changes for RISC-V topology are available at
> 
> https://github.com/atishp04/qemu/tree/riscv_topology_dt
> 
> HiFive Unleashed DT with topology node is available here.
> https://github.com/atishp04/opensbi/tree/HiFive_unleashed_topology
> 
> It can be verified with OpenSBI with following additional compile time
> option.
> 
> FW_PAYLOAD_FDT="unleashed_topology.dtb"
> 
> Changes from v2->v3
> 1. Cover letter update with experiment DT for topology changes.
> 2. Added the patch for [2].
> 
> Changes from v1->v2
> 1. ARM32 can now use the common code as well.
> 
> Atish Patra (4):
> dt-binding: cpu-topology: Move cpu-map to a common binding.
> cpu-topology: Move cpu topology code to common code.
> arm: Use common cpu_topology
> RISC-V: Parse cpu topology during boot.
> 
> Sudeep Holla (1):
> Documentation: DT: arm: add support for sockets defining package
> boundaries
> 
> .../topology.txt => cpu/cpu-topology.txt}     | 134 ++++++--
> arch/arm/include/asm/topology.h               |  22 +-
> arch/arm/kernel/topology.c                    |  10 +-
> arch/arm64/include/asm/topology.h             |  23 --
> arch/arm64/kernel/topology.c                  | 303 +-----------------
> arch/riscv/Kconfig                            |   1 +
> arch/riscv/kernel/smpboot.c                   |   3 +
> drivers/base/arch_topology.c                  | 298 ++++++++++++++++-
> drivers/base/topology.c                       |   1 +
> include/linux/arch_topology.h                 |  36 +++
> 10 files changed, 453 insertions(+), 378 deletions(-)
> rename Documentation/devicetree/bindings/{arm/topology.txt => cpu/cpu-topology.txt} (66%)
> 
> --
> 2.21.0
> 
> 

Ping?

Specifically, patch 3 & 4 affects ARM & ARM64. Any tests on real 
hardware would be great.

Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2019-04-10 22:50 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-20 23:48 [RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V Atish Patra
2019-03-20 23:48 ` Atish Patra
2019-03-20 23:48 ` Atish Patra
2019-03-20 23:48 ` [RFT/RFC PATCH v3 1/5] Documentation: DT: arm: add support for sockets defining package boundaries Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48 ` [RFT/RFC PATCH v3 2/5] dt-binding: cpu-topology: Move cpu-map to a common binding Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-24 21:16   ` Rob Herring
2019-03-24 21:16     ` Rob Herring
2019-03-24 21:16     ` Rob Herring
2019-03-20 23:48 ` [RFT/RFC PATCH v3 3/5] cpu-topology: Move cpu topology code to common code Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-04-15 15:27   ` Sudeep Holla
2019-04-15 15:27     ` Sudeep Holla
2019-04-15 15:27     ` Sudeep Holla
2019-04-15 22:08     ` Atish Patra
2019-04-15 22:08       ` Atish Patra
2019-04-15 22:08       ` Atish Patra
2019-04-16 13:23       ` Sudeep Holla
2019-04-16 13:23         ` Sudeep Holla
2019-04-16 13:23         ` Sudeep Holla
2019-04-16 18:54         ` Atish Patra
2019-04-16 18:54           ` Atish Patra
2019-04-16 18:54           ` Atish Patra
2019-03-20 23:48 ` [RFT/RFC PATCH v3 4/5] arm: Use common cpu_topology Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-04-15 15:31   ` Sudeep Holla
2019-04-15 15:31     ` Sudeep Holla
2019-04-15 15:31     ` Sudeep Holla
2019-04-15 21:16     ` Atish Patra
2019-04-15 21:16       ` Atish Patra
2019-04-15 21:16       ` Atish Patra
2019-04-16 13:09       ` Sudeep Holla
2019-04-16 13:09         ` Sudeep Holla
2019-04-16 13:09         ` Sudeep Holla
2019-04-16 19:04         ` Atish Patra
2019-04-16 19:04           ` Atish Patra
2019-04-16 19:04           ` Atish Patra
2019-03-20 23:48 ` [RFT/RFC PATCH v3 5/5] RISC-V: Parse cpu topology during boot Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-03-20 23:48   ` Atish Patra
2019-04-10 22:49 ` Atish Patra [this message]
2019-04-10 22:49   ` [RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V Atish Patra
2019-04-10 22:49   ` Atish Patra
2019-04-12 17:27   ` Sudeep Holla
2019-04-12 17:27     ` Sudeep Holla
2019-04-12 17:27     ` Sudeep Holla

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