[PATCH 0/3] ARM: SAMSUNG: add entry and exit functions for interrupt chained handler

[PATCH 0/3] ARM: SAMSUNG: add entry and exit functions for interrupt chained handler

[Changhwan Youn]

Hello,

This is for interrupt chained handlers to properly handle the primary controller
using chained_irq_enter and chained_irq_exit functions.
Without this, chained interrupts connected to GIC would not work properly.

This patch series contains:

[PATCH 1/3] ARM: SAMSUNG: add entry and exit functions for uart interrupt chained handler
[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler
[PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

Best regards,
Changhwan Youn

Patch summary:

Changhwan Youn (3):
	ARM: SAMSUGN: add entry and exit functions for uart interrupt chained handler
	ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler
	ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

	arch/arm/mach-exynos4/irq-eint.c      |   14 +++++++-------
	arch/arm/plat-samsung/irq-uart.c      |    6 ++++++
	arch/arm/plat-samsung/irq-vic-timer.c |    5 +++++
	3 files changed, 18 insertions(+), 7 deletions(-)

[PATCH 0/3] ARM: SAMSUNG: add entry and exit functions for interrupt chained handler

[Changhwan Youn]

Hello,

This is for interrupt chained handlers to properly handle the primary controller
using chained_irq_enter and chained_irq_exit functions.
Without this, chained interrupts connected to GIC would not work properly.

This patch series contains:

[PATCH 1/3] ARM: SAMSUNG: add entry and exit functions for uart interrupt chained handler
[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler
[PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

Best regards,
Changhwan Youn

Patch summary:

Changhwan Youn (3):
	ARM: SAMSUGN: add entry and exit functions for uart interrupt chained handler
	ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler
	ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

	arch/arm/mach-exynos4/irq-eint.c      |   14 +++++++-------
	arch/arm/plat-samsung/irq-uart.c      |    6 ++++++
	arch/arm/plat-samsung/irq-vic-timer.c |    5 +++++
	3 files changed, 18 insertions(+), 7 deletions(-)

[PATCH 1/3] ARM: SAMSUNG: add entry and exit functions for uart interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in uart interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/plat-samsung/irq-uart.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 4e77035..24da4d4 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -23,6 +23,7 @@
 #include <plat/irq-uart.h>
 #include <plat/regs-serial.h>
 #include <plat/cpu.h>
+#include <asm/mach/irq.h>
 
 /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
  * are consecutive when looking up the interrupt in the demux routines.
@@ -86,6 +87,9 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 	struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
 	u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
 	int base = uirq->base_irq;
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 
 	if (pend & (1 << 0))
 		generic_handle_irq(base);
@@ -95,6 +99,8 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 		generic_handle_irq(base + 2);
 	if (pend & (1 << 3))
 		generic_handle_irq(base + 3);
+
+	chained_irq_exit(chip, desc);
 }
 
 static struct irq_chip s3c_irq_uart = {
-- 
1.7.1

[PATCH 1/3] ARM: SAMSUNG: add entry and exit functions for uart interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in uart interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/plat-samsung/irq-uart.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 4e77035..24da4d4 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -23,6 +23,7 @@
 #include <plat/irq-uart.h>
 #include <plat/regs-serial.h>
 #include <plat/cpu.h>
+#include <asm/mach/irq.h>
 
 /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
  * are consecutive when looking up the interrupt in the demux routines.
@@ -86,6 +87,9 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 	struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
 	u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
 	int base = uirq->base_irq;
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 
 	if (pend & (1 << 0))
 		generic_handle_irq(base);
@@ -95,6 +99,8 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
 		generic_handle_irq(base + 2);
 	if (pend & (1 << 3))
 		generic_handle_irq(base + 3);
+
+	chained_irq_exit(chip, desc);
 }
 
 static struct irq_chip s3c_irq_uart = {
-- 
1.7.1

[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in pwm interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/plat-samsung/irq-vic-timer.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index dd8692a..7db0a58 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -21,10 +21,15 @@
 #include <mach/map.h>
 #include <plat/irq-vic-timer.h>
 #include <plat/regs-timer.h>
+#include <asm/mach/irq.h>
 
 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
 {
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 	generic_handle_irq((int)desc->irq_data.handler_data);
+	chained_irq_exit(chip, desc);
 }
 
 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-- 
1.7.1

[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in pwm interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/plat-samsung/irq-vic-timer.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index dd8692a..7db0a58 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -21,10 +21,15 @@
 #include <mach/map.h>
 #include <plat/irq-vic-timer.h>
 #include <plat/regs-timer.h>
+#include <asm/mach/irq.h>
 
 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
 {
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 	generic_handle_irq((int)desc->irq_data.handler_data);
+	chained_irq_exit(chip, desc);
 }
 
 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-- 
1.7.1

[PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in exnternal interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/mach-exynos4/irq-eint.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 4f7ad4a..f9d9b48 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -22,6 +22,7 @@
 #include <plat/gpio-cfg.h>
 
 #include <mach/regs-gpio.h>
+#include <asm/mach/irq.h>
 
 static DEFINE_SPINLOCK(eint_lock);
 
@@ -184,8 +185,12 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
 
 static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 {
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 	exynos4_irq_demux_eint(IRQ_EINT(16));
 	exynos4_irq_demux_eint(IRQ_EINT(24));
+	chained_irq_exit(chip, desc);
 }
 
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@@ -193,14 +198,9 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 	u32 *irq_data = get_irq_data(irq);
 	struct irq_chip *chip = get_irq_chip(irq);
 
-	chip->irq_mask(&desc->irq_data);
-
-	if (chip->irq_ack)
-		chip->irq_ack(&desc->irq_data);
-
+	chained_irq_enter(chip, desc);
 	generic_handle_irq(*irq_data);
-
-	chip->irq_unmask(&desc->irq_data);
+	chained_irq_exit(chip, desc);
 }
 
 int __init exynos4_init_irq_eint(void)
-- 
1.7.1

[PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler

[Changhwan Youn]

This functions are added for properly controlling primary controller
in exnternal interrupt chained handler.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
---
 arch/arm/mach-exynos4/irq-eint.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 4f7ad4a..f9d9b48 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -22,6 +22,7 @@
 #include <plat/gpio-cfg.h>
 
 #include <mach/regs-gpio.h>
+#include <asm/mach/irq.h>
 
 static DEFINE_SPINLOCK(eint_lock);
 
@@ -184,8 +185,12 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
 
 static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 {
+	struct irq_chip *chip = get_irq_chip(irq);
+
+	chained_irq_enter(chip, desc);
 	exynos4_irq_demux_eint(IRQ_EINT(16));
 	exynos4_irq_demux_eint(IRQ_EINT(24));
+	chained_irq_exit(chip, desc);
 }
 
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@@ -193,14 +198,9 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 	u32 *irq_data = get_irq_data(irq);
 	struct irq_chip *chip = get_irq_chip(irq);
 
-	chip->irq_mask(&desc->irq_data);
-
-	if (chip->irq_ack)
-		chip->irq_ack(&desc->irq_data);
-
+	chained_irq_enter(chip, desc);
 	generic_handle_irq(*irq_data);
-
-	chip->irq_unmask(&desc->irq_data);
+	chained_irq_exit(chip, desc);
 }
 
 int __init exynos4_init_irq_eint(void)
-- 
1.7.1