From: Lin Ming <ming.m.lin@intel.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: "Peter Zijlstra" <a.p.zijlstra@chello.nl>,
linux-kernel <linux-kernel@vger.kernel.org>,
"Mike Galbraith" <efault@gmx.de>,
"Arnaldo Carvalho de Melo" <acme@redhat.com>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Steven Rostedt" <rostedt@goodmis.org>
Subject: Re: [PATCH] perf events, x86: Implement Sandybridge last-level cache events
Date: Mon, 09 May 2011 16:45:11 +0800 [thread overview]
Message-ID: <1304930711.3924.306.camel@minggr.sh.intel.com> (raw)
In-Reply-To: <1304689667.2200.3.camel@localhost>
On Fri, 2011-05-06 at 21:47 +0800, Lin Ming wrote:
> On Fri, 2011-05-06 at 17:19 +0800, Ingo Molnar wrote:
> > Btw., there's another missing Intel SandyBridge related perf events feature as
> > well which was not implemented with the Intel offcore bits.
> >
> > Peter did a raw first cut - entirely untested, see it below. Would you be
> > interested in testing it on Intel SandyBridge hw and sending (the working
> > version) to lkml with your Signed-off-by if the events looks good to you in
> > some real tests (i.e. are counting real LL cache events)?
>
> OK, but I can't access SandyBridge machine at home now.
> Will try it next Monday.
The updated and tested patch at:
http://lkml.org/lkml/2011/5/9/80
Please help to review the definitions for SNB_L3_HIT/_MISS_/ACCESS.
I'm really unsure for that.
Thanks,
Lin Ming
>
> >
> > Thanks,
> >
> > Ingo
>
next prev parent reply other threads:[~2011-05-09 8:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-06 7:14 [PATCH] perf events, x86: Add SandyBridge stalled-cycles-frontend/backend events Lin Ming
2011-05-06 7:38 ` Ingo Molnar
2011-05-06 7:43 ` Lin Ming
2011-05-06 13:44 ` Lin Ming
2011-05-06 9:19 ` [PATCH] perf events, x86: Implement Sandybridge last-level cache events Ingo Molnar
2011-05-06 13:47 ` Lin Ming
2011-05-09 8:45 ` Lin Ming [this message]
2011-05-06 7:40 ` [tip:perf/core] perf events, x86: Add SandyBridge stalled-cycles-frontend/backend events tip-bot for Lin Ming
2011-05-06 15:51 ` Steven Rostedt
2011-05-06 19:08 ` Ingo Molnar
2011-05-09 8:39 [PATCH] perf events, x86: Implement Sandybridge last-level cache events Lin Ming
2011-05-10 10:08 ` Peter Zijlstra
2011-05-10 14:17 ` Lin Ming
2011-05-10 14:29 ` Peter Zijlstra
2011-05-10 15:29 ` Ingo Molnar
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