[PATCH 0/8] OMAP3+: Voltage: introduce Adaptive Body-Bias ldo suppport

[PATCH 0/8] OMAP3+: Voltage: introduce Adaptive Body-Bias ldo suppport

[Mike Turquette]

This patchset adds Adaptive Body-Bias ldo handling to the OMAP voltage
code with support for 36xx and 44xx chips.  ABB handling is a mandatory
part of the voltage scaling process when operating at high OPPs.

A longer explanation is that due to voltage domain trimming and silicon
characterstics some silicon may experience instability when operating at
a high voltage.  To compensate for this an Adaptive Body-Bias ldo
exists.  First featured in OMAP3630, the purpose of this ldo is to
provide a voltage boost to PMOS backgates when a voltage domain is
operating at a high OPP.  In this mode the ldo is said to be in Forward
Body-Bias.  At OPPs within a nominal voltage range the ABB ldo is
bypassed.

The TRM defines voltages that require Forward Body-Bias as FAST OPP's,
and all other voltages as NOMINAL OPP's.

Find more info in the 36xx TRM in section 3.5.6.6.1 "ABB LDOs Control"
and in the 4430 TRM in section 3.8.4.3 "ABB LDOs Control" and 3.10.4.2
"Changing OPP".

Tested on OMAP 4430 SDP.  Built against Kevin's pm-wip/voltdm branch and
compiled with omap2plus_defconfig.

Mike Turquette (6):
  OMAP3630: PRM: add ABB PRM register definitions
  OMAP3+: ABB: Adaptive Body-Bias structures & data
  OMAP3+: OPP: add ABB data to voltage tables
  OMAP3+: Voltage: add ABB data to voltage domains
  OMAP3+: ABB: initialization & transition functions
  OMAP3+: Voltage: add ABB to voltage scaling

Nishanth Menon (2):
  OMAP3+: PM: VP: generalize PRM interrupt helpers
  OMAP3+: PRM: add tranxdone IRQ handlers for ABB

 arch/arm/mach-omap2/Makefile                  |    7 +-
 arch/arm/mach-omap2/abb.c                     |  218 +++++++++++++++++++++++++
 arch/arm/mach-omap2/abb.h                     |   90 ++++++++++
 arch/arm/mach-omap2/abb36xx_data.c            |   38 +++++
 arch/arm/mach-omap2/abb44xx_data.c            |   44 +++++
 arch/arm/mach-omap2/omap_opp_data.h           |    5 +-
 arch/arm/mach-omap2/opp3xxx_data.c            |   37 ++--
 arch/arm/mach-omap2/opp4xxx_data.c            |   25 ++--
 arch/arm/mach-omap2/prm-regbits-34xx.h        |   34 ++++
 arch/arm/mach-omap2/prm2xxx_3xxx.c            |   53 +++++--
 arch/arm/mach-omap2/prm2xxx_3xxx.h            |   14 ++-
 arch/arm/mach-omap2/prm44xx.c                 |   64 +++++--
 arch/arm/mach-omap2/prm44xx.h                 |   10 +-
 arch/arm/mach-omap2/vc.c                      |   10 +-
 arch/arm/mach-omap2/voltage.c                 |    4 +
 arch/arm/mach-omap2/voltage.h                 |    2 +
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |    3 +
 arch/arm/mach-omap2/voltagedomains44xx_data.c |    3 +
 arch/arm/mach-omap2/vp.c                      |    9 +-
 arch/arm/mach-omap2/vp.h                      |    9 -
 arch/arm/mach-omap2/vp3xxx_data.c             |    4 +-
 arch/arm/mach-omap2/vp44xx_data.c             |    6 +-
 22 files changed, 598 insertions(+), 91 deletions(-)
 create mode 100644 arch/arm/mach-omap2/abb.c
 create mode 100644 arch/arm/mach-omap2/abb.h
 create mode 100644 arch/arm/mach-omap2/abb36xx_data.c
 create mode 100644 arch/arm/mach-omap2/abb44xx_data.c

-- 
1.7.4.1

[PATCH 1/8] OMAP3630: PRM: add ABB PRM register definitions

[Mike Turquette]

OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts
related to voltage control that are not present on OMAP34XX.  This patch
adds the offsets, register addresses, bitfield shifts and masks to support
this feature.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/prm-regbits-34xx.h |   34 ++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h     |    4 +++
 2 files changed, 38 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 64c087a..0309ff6 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -216,6 +216,12 @@
 /* PRM_SYSCONFIG specific bits */
 
 /* PRM_IRQSTATUS_MPU specific bits */
+#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT			28
+#define OMAP3630_VC_BYPASS_ACK_ST_MASK			(1 << 28)
+#define OMAP3630_VC_VP1_ACK_ST_SHIFT			27
+#define OMAP3630_VC_VP1_ACK_ST_MASK			(1 << 27)
+#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT		26
+#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK		(1 << 26)
 #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT		25
 #define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK		(1 << 25)
 #define OMAP3430_VC_TIMEOUTERR_ST_MASK			(1 << 24)
@@ -248,6 +254,12 @@
 #define OMAP3430_FS_USB_WKUP_ST_MASK			(1 << 1)
 
 /* PRM_IRQENABLE_MPU specific bits */
+#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT				28
+#define OMAP3630_VC_BYPASS_ACK_EN_MASK				(1 << 28)
+#define OMAP3630_VC_VP1_ACK_EN_SHIFT				27
+#define OMAP3630_VC_VP1_ACK_EN_MASK				(1 << 27)
+#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT			26
+#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK			(1 << 26)
 #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT		25
 #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK		(1 << 25)
 #define OMAP3430_VC_TIMEOUTERR_EN_MASK				(1 << 24)
@@ -587,6 +599,28 @@
 
 /* PRM_VP2_STATUS specific bits */
 
+/* PRM_LDO_ABB_SETUP specific bits */
+#define OMAP3630_SR2_IN_TRANSITION_SHIFT		6
+#define OMAP3630_SR2_IN_TRANSITION_MASK			(1 << 6)
+#define OMAP3630_SR2_STATUS_SHIFT			3
+#define OMAP3630_SR2_STATUS_MASK			(3 << 3)
+#define OMAP3630_OPP_CHANGE_SHIFT			2
+#define OMAP3630_OPP_CHANGE_MASK			(1 << 2)
+#define OMAP3630_OPP_SEL_SHIFT				0
+#define OMAP3630_OPP_SEL_MASK				(3 << 0)
+
+/* PRM_LDO_ABB_CTRL specific bits */
+#define OMAP3630_SR2_WTCNT_VALUE_SHIFT			8
+#define OMAP3630_SR2_WTCNT_VALUE_MASK			(0xff << 8)
+#define OMAP3630_SLEEP_RBB_SEL_SHIFT			3
+#define OMAP3630_SLEEP_RBB_SEL_MASK			(1 << 3)
+#define OMAP3630_ACTIVE_FBB_SEL_SHIFT			2
+#define OMAP3630_ACTIVE_FBB_SEL_MASK			(1 << 2)
+#define OMAP3630_ACTIVE_RBB_SEL_SHIFT			1
+#define OMAP3630_ACTIVE_RBB_SEL_MASK			(1 << 1)
+#define OMAP3630_SR2EN_SHIFT				0
+#define OMAP3630_SR2EN_MASK				(1 << 0)
+
 /* RM_RSTST_NEON specific bits */
 
 /* PM_WKDEP_NEON specific bits */
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index cef533d..408d1c7 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -167,6 +167,10 @@
 #define OMAP3430_PRM_VP2_VOLTAGE	OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0)
 #define OMAP3_PRM_VP2_STATUS_OFFSET	0x00e4
 #define OMAP3430_PRM_VP2_STATUS		OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4)
+#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET	0x00f0
+#define OMAP3630_PRM_LDO_ABB_SETUP	OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0)
+#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET	0x00f4
+#define OMAP3630_PRM_LDO_ABB_CTRL	OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4)
 
 #define OMAP3_PRM_CLKSEL_OFFSET	0x0040
 #define OMAP3430_PRM_CLKSEL		OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040)
-- 
1.7.4.1

[PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers

[Mike Turquette]

From: Nishanth Menon <nm@ti.com>

We have multiple interrupt status hidden in the PRM interrupt status
reg. Make this handling generic to allow us to pull out LDO status such
as those for ABB from it using the same data structure and indexing. We
hence rename accordingly.

We also fix a trivial warning as the variable does not need exporting:
arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol
'omap3_prm_irqs' was not declared. Should it be static?

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   22 +++++++++++-----------
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    7 +++++--
 arch/arm/mach-omap2/prm44xx.c      |   28 ++++++++++++++--------------
 arch/arm/mach-omap2/prm44xx.h      |    7 +++++--
 arch/arm/mach-omap2/vp.h           |    9 ---------
 arch/arm/mach-omap2/vp3xxx_data.c  |    4 ++--
 arch/arm/mach-omap2/vp44xx_data.c  |    6 +++---
 7 files changed, 40 insertions(+), 43 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 3b83763..8a20242 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
 /* PRM VP */
 
 /*
- * struct omap3_vp - OMAP3 VP register access description.
+ * struct omap3_prm_irq - OMAP3 PRM IRQ register access description.
  * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
  */
-struct omap3_vp {
+struct omap3_prm_irq {
 	u32 tranxdone_status;
 };
 
-struct omap3_vp omap3_vp[] = {
-	[OMAP3_VP_VDD_MPU_ID] = {
+static struct omap3_prm_irq omap3_prm_irqs[] = {
+	[OMAP3_PRM_IRQ_VDD_MPU_ID] = {
 		.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
 	},
-	[OMAP3_VP_VDD_CORE_ID] = {
+	[OMAP3_PRM_IRQ_VDD_CORE_ID] = {
 		.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
 	},
 };
 
 #define MAX_VP_ID ARRAY_SIZE(omap3_vp);
 
-u32 omap3_prm_vp_check_txdone(u8 vp_id)
+u32 omap3_prm_vp_check_txdone(u8 irq_id)
 {
-	struct omap3_vp *vp = &omap3_vp[vp_id];
+	struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
 	u32 irqstatus;
 
 	irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
 					   OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-	return irqstatus & vp->tranxdone_status;
+	return irqstatus & irq->tranxdone_status;
 }
 
-void omap3_prm_vp_clear_txdone(u8 vp_id)
+void omap3_prm_vp_clear_txdone(u8 irq_id)
 {
-	struct omap3_vp *vp = &omap3_vp[vp_id];
+	struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
 
-	omap2_prm_write_mod_reg(vp->tranxdone_status,
+	omap2_prm_write_mod_reg(irq->tranxdone_status,
 				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
 }
 
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 408d1c7..d90b23f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
 extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
 extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 
+#define OMAP3_PRM_IRQ_VDD_MPU_ID	0
+#define OMAP3_PRM_IRQ_VDD_CORE_ID	1
 /* OMAP3-specific VP functions */
-u32 omap3_prm_vp_check_txdone(u8 vp_id);
-void omap3_prm_vp_clear_txdone(u8 vp_id);
+u32 omap3_prm_vp_check_txdone(u8 irq_id);
+void omap3_prm_vp_clear_txdone(u8 irq_id);
+
 
 /*
  * OMAP3 access functions for voltage controller (VC) and
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 8a3bba3..9d0b641 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -200,49 +200,49 @@ void omap4_prm_global_warm_sw_reset(void)
 /* PRM VP */
 
 /*
- * struct omap4_vp - OMAP4 VP register access description.
+ * struct omap4_prm_irq - OMAP4 VP register access description.
  * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
  * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
  */
-struct omap4_vp {
+struct omap4_prm_irq {
 	u32 irqstatus_mpu;
 	u32 tranxdone_status;
 };
 
-static struct omap4_vp omap4_vp[] = {
-	[OMAP4_VP_VDD_MPU_ID] = {
+static struct omap4_prm_irq omap4_prm_irqs[] = {
+	[OMAP4_PRM_IRQ_VDD_MPU_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
 		.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
 	},
-	[OMAP4_VP_VDD_IVA_ID] = {
+	[OMAP4_PRM_IRQ_VDD_IVA_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 		.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
 	},
-	[OMAP4_VP_VDD_CORE_ID] = {
+	[OMAP4_PRM_IRQ_VDD_CORE_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 		.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
 	},
 };
 
-u32 omap4_prm_vp_check_txdone(u8 vp_id)
+u32 omap4_prm_vp_check_txdone(u8 irq_id)
 {
-	struct omap4_vp *vp = &omap4_vp[vp_id];
+	struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
 	u32 irqstatus;
 
 	irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
 						OMAP4430_PRM_OCP_SOCKET_INST,
-						vp->irqstatus_mpu);
-	return irqstatus & vp->tranxdone_status;
+						irq->irqstatus_mpu);
+	return irqstatus & irq->tranxdone_status;
 }
 
-void omap4_prm_vp_clear_txdone(u8 vp_id)
+void omap4_prm_vp_clear_txdone(u8 irq_id)
 {
-	struct omap4_vp *vp = &omap4_vp[vp_id];
+	struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
 
-	omap4_prminst_write_inst_reg(vp->tranxdone_status,
+	omap4_prminst_write_inst_reg(irq->tranxdone_status,
 				     OMAP4430_PRM_PARTITION,
 				     OMAP4430_PRM_OCP_SOCKET_INST,
-				     vp->irqstatus_mpu);
+				     irq->irqstatus_mpu);
 };
 
 u32 omap4_prm_vcvp_read(u8 offset)
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 026529f..bd0fc85 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -773,9 +773,12 @@ extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
 
 extern void omap4_prm_global_warm_sw_reset(void);
 
+#define OMAP4_PRM_IRQ_VDD_CORE_ID	0
+#define OMAP4_PRM_IRQ_VDD_IVA_ID	1
+#define OMAP4_PRM_IRQ_VDD_MPU_ID	2
 /* OMAP4-specific VP functions */
-u32 omap4_prm_vp_check_txdone(u8 vp_id);
-void omap4_prm_vp_clear_txdone(u8 vp_id);
+u32 omap4_prm_vp_check_txdone(u8 irq_id);
+void omap4_prm_vp_clear_txdone(u8 irq_id);
 
 /*
  * OMAP4 access functions for voltage controller (VC) and
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index f78752b..57a4d44 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -21,15 +21,6 @@
 
 struct voltagedomain;
 
-/*
- * Voltage Processor (VP) identifiers
- */
-#define OMAP3_VP_VDD_MPU_ID 0
-#define OMAP3_VP_VDD_CORE_ID 1
-#define OMAP4_VP_VDD_CORE_ID 0
-#define OMAP4_VP_VDD_IVA_ID 1
-#define OMAP4_VP_VDD_MPU_ID 2
-
 /* XXX document */
 #define VP_IDLE_TIMEOUT		200
 #define VP_TRANXDONE_TIMEOUT	300
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 260c554..7bd8181 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -57,7 +57,7 @@ static const struct omap_vp_common omap3_vp_common = {
 };
 
 struct omap_vp_instance omap3_vp_mpu = {
-	.id = OMAP3_VP_VDD_MPU_ID,
+	.id = OMAP3_PRM_IRQ_VDD_MPU_ID,
 	.common = &omap3_vp_common,
 	.vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
 	.vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
@@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = {
 };
 
 struct omap_vp_instance omap3_vp_core = {
-	.id = OMAP3_VP_VDD_CORE_ID,
+	.id = OMAP3_PRM_IRQ_VDD_CORE_ID,
 	.common = &omap3_vp_common,
 	.vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
 	.vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index b4e7704..6de8ed6 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -56,7 +56,7 @@ static const struct omap_vp_common omap4_vp_common = {
 };
 
 struct omap_vp_instance omap4_vp_mpu = {
-	.id = OMAP4_VP_VDD_MPU_ID,
+	.id = OMAP4_PRM_IRQ_VDD_MPU_ID,
 	.common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
@@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = {
 };
 
 struct omap_vp_instance omap4_vp_iva = {
-	.id = OMAP4_VP_VDD_IVA_ID,
+	.id = OMAP4_PRM_IRQ_VDD_IVA_ID,
 	.common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
@@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = {
 };
 
 struct omap_vp_instance omap4_vp_core = {
-	.id = OMAP4_VP_VDD_CORE_ID,
+	.id = OMAP4_PRM_IRQ_VDD_CORE_ID,
 	.common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
-- 
1.7.4.1

[PATCH 3/8] OMAP3+: PRM: add tranxdone IRQ handlers for ABB

[Mike Turquette]

From: Nishanth Menon <nm@ti.com>

OMAP3 and more recent platforms support a PRM interrupt to the MPU for
Adapative Body-Bias ldo transitions.

Add helpers to the OMAP3 & OMAP4 PRM code to check the status of the
interrupt and also to clear it.  These will be called from the ABB code
as part of the greater voltage scaling sequence.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   35 ++++++++++++++++++++++++++-----
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    3 ++
 arch/arm/mach-omap2/prm44xx.c      |   40 +++++++++++++++++++++++++++++------
 arch/arm/mach-omap2/prm44xx.h      |    3 ++
 4 files changed, 68 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 8a20242..49e9719 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -163,18 +163,23 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
 
 /*
  * struct omap3_prm_irq - OMAP3 PRM IRQ register access description.
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ *			  (ONLY for OMAP3630)
  */
 struct omap3_prm_irq {
-	u32 tranxdone_status;
+	u32 vp_tranxdone_status;
+	u32 abb_tranxdone_status;
 };
 
 static struct omap3_prm_irq omap3_prm_irqs[] = {
 	[OMAP3_PRM_IRQ_VDD_MPU_ID] = {
-		.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+		.vp_tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+		.abb_tranxdone_status = OMAP3630_ABB_LDO_TRANXDONE_ST_MASK,
 	},
 	[OMAP3_PRM_IRQ_VDD_CORE_ID] = {
-		.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
+		.vp_tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
+		/* no abb for core */
 	},
 };
 
@@ -187,14 +192,32 @@ u32 omap3_prm_vp_check_txdone(u8 irq_id)
 
 	irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
 					   OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-	return irqstatus & irq->tranxdone_status;
+	return irqstatus & irq->vp_tranxdone_status;
 }
 
 void omap3_prm_vp_clear_txdone(u8 irq_id)
 {
 	struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
 
-	omap2_prm_write_mod_reg(irq->tranxdone_status,
+	omap2_prm_write_mod_reg(irq->vp_tranxdone_status,
+				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+}
+
+u32 omap36xx_prm_abb_check_txdone(u8 irq_id)
+{
+	struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
+	u32 irqstatus;
+
+	irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
+					   OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+	return irqstatus & irq->abb_tranxdone_status;
+}
+
+void omap36xx_prm_abb_clear_txdone(u8 irq_id)
+{
+	struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
+
+	omap2_prm_write_mod_reg(irq->abb_tranxdone_status,
 				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
 }
 
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index d90b23f..08d5f1e 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -313,6 +313,9 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 u32 omap3_prm_vp_check_txdone(u8 irq_id);
 void omap3_prm_vp_clear_txdone(u8 irq_id);
 
+/* OMAP36xx-specific ABB functions */
+u32 omap36xx_prm_abb_check_txdone(u8 irq_id);
+void omap36xx_prm_abb_clear_txdone(u8 irq_id);
 
 /*
  * OMAP3 access functions for voltage controller (VC) and
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 9d0b641..a062b63 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -202,25 +202,30 @@ void omap4_prm_global_warm_sw_reset(void)
 /*
  * struct omap4_prm_irq - OMAP4 VP register access description.
  * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
  */
 struct omap4_prm_irq {
 	u32 irqstatus_mpu;
-	u32 tranxdone_status;
+	u32 vp_tranxdone_status;
+	u32 abb_tranxdone_status;
 };
 
 static struct omap4_prm_irq omap4_prm_irqs[] = {
 	[OMAP4_PRM_IRQ_VDD_MPU_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
-		.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
+		.vp_tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
+		.abb_tranxdone_status = OMAP4430_ABB_MPU_DONE_ST_MASK
 	},
 	[OMAP4_PRM_IRQ_VDD_IVA_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
-		.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
+		.vp_tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
+		.abb_tranxdone_status = OMAP4430_ABB_IVA_DONE_ST_MASK,
 	},
 	[OMAP4_PRM_IRQ_VDD_CORE_ID] = {
 		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
-		.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
+		.vp_tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
+		/* Core has no ABB */
 	},
 };
 
@@ -232,19 +237,40 @@ u32 omap4_prm_vp_check_txdone(u8 irq_id)
 	irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
 						OMAP4430_PRM_OCP_SOCKET_INST,
 						irq->irqstatus_mpu);
-	return irqstatus & irq->tranxdone_status;
+	return irqstatus & irq->vp_tranxdone_status;
 }
 
 void omap4_prm_vp_clear_txdone(u8 irq_id)
 {
 	struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
 
-	omap4_prminst_write_inst_reg(irq->tranxdone_status,
+	omap4_prminst_write_inst_reg(irq->vp_tranxdone_status,
 				     OMAP4430_PRM_PARTITION,
 				     OMAP4430_PRM_OCP_SOCKET_INST,
 				     irq->irqstatus_mpu);
 };
 
+u32 omap4_prm_abb_check_txdone(u8 irq_id)
+{
+	struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
+	u32 irqstatus;
+
+	irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+						OMAP4430_PRM_OCP_SOCKET_INST,
+						irq->irqstatus_mpu);
+	return irqstatus & irq->abb_tranxdone_status;
+}
+
+void omap4_prm_abb_clear_txdone(u8 irq_id)
+{
+	struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
+
+	omap4_prminst_write_inst_reg(irq->abb_tranxdone_status,
+				     OMAP4430_PRM_PARTITION,
+				     OMAP4430_PRM_OCP_SOCKET_INST,
+				     irq->irqstatus_mpu);
+}
+
 u32 omap4_prm_vcvp_read(u8 offset)
 {
 	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index bd0fc85..3993ed4 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -779,6 +779,9 @@ extern void omap4_prm_global_warm_sw_reset(void);
 /* OMAP4-specific VP functions */
 u32 omap4_prm_vp_check_txdone(u8 irq_id);
 void omap4_prm_vp_clear_txdone(u8 irq_id);
+/* OMAP4-specific ABB functions */
+u32 omap4_prm_abb_check_txdone(u8 irq_id);
+void omap4_prm_abb_clear_txdone(u8 irq_id);
 
 /*
  * OMAP4 access functions for voltage controller (VC) and
-- 
1.7.4.1

[PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data

[Mike Turquette]

Due to voltage domain trimming and silicon characterstics some silicon
may experience instability when operating at a high voltage.  To
compensate for this an Adaptive Body-Bias ldo exists.  First featured in
OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS
backgates when a voltage domain is operating at a high OPP.  In this
mode the ldo is said to be in Forward Body-Bias.  At OPPs within a
nominal voltage range the ABB ldo is bypassed.

This patch introduces the data structures needed to represent the ABB
ldo's in the voltage layer, and populates the appropriate data for 3630
and OMAP4.  Not all voltage domains have an ABB ldo, and OMAP34xx does
not have it at all; in such cases the voltage data will be marked with
OMAP_ABB_NO_LDO.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/Makefile       |    5 +-
 arch/arm/mach-omap2/abb.h          |   85 ++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/abb36xx_data.c |   38 ++++++++++++++++
 arch/arm/mach-omap2/abb44xx_data.c |   44 ++++++++++++++++++
 4 files changed, 170 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-omap2/abb.h
 create mode 100644 arch/arm/mach-omap2/abb36xx_data.c
 create mode 100644 arch/arm/mach-omap2/abb44xx_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2cbef35..7dbb4d5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -79,14 +79,15 @@ endif
 # PRCM
 obj-$(CONFIG_ARCH_OMAP2)		+= prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
-					   vc3xxx_data.o vp3xxx_data.o
+					   vc3xxx_data.o vp3xxx_data.o \
+					   abb36xx_data.o
 # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
 # will be removed once the OMAP4 part of the codebase is converted to
 # use OMAP4-specific PRCM functions.
 obj-$(CONFIG_ARCH_OMAP4)		+= prcm.o cm2xxx_3xxx.o cminst44xx.o \
 					   cm44xx.o prcm_mpu44xx.o \
 					   prminst44xx.o vc44xx_data.o \
-					   vp44xx_data.o
+					   vp44xx_data.o abb44xx_data.o
 
 # OMAP voltage domains
 ifeq ($(CONFIG_PM),y)
diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
new file mode 100644
index 0000000..74f2044
--- /dev/null
+++ b/arch/arm/mach-omap2/abb.h
@@ -0,0 +1,85 @@
+/*
+ * OMAP Adaptive Body-Bias structure and macro definitions
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette <mturquette@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H
+#define __ARCH_ARM_MACH_OMAP2_ABB_H
+
+#include <linux/kernel.h>
+
+#include "voltage.h"
+
+/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */
+#define OMAP_ABB_NOMINAL_OPP	0
+#define OMAP_ABB_FAST_OPP	1
+#define OMAP_ABB_NO_LDO		~0
+
+/* Time for the ABB ldo to settle after transition (in micro-seconds) */
+#define ABB_TRANXDONE_TIMEOUT	50
+
+/*
+ * struct omap_abb_ops - per-OMAP operations needed for ABB transition
+ *
+ * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS
+ * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS
+ */
+struct omap_abb_ops {
+	u32 (*check_tranxdone)(u8 irq_id);
+	void (*clear_tranxdone)(u8 irq_id);
+};
+
+/*
+ * struct omap_abb_common - ABB data common to an OMAP family
+ *
+ * @opp_sel_mask: CTRL reg uses this to program next state of ldo
+ * @opp_change_mask: CTRL reg uses this to initiate ldo state change
+ * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time
+ * @sr2en_mask: SETUP reg uses this to enable/disable ldo
+ * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB operation
+ * @settling_time: number of micro-seconds it takes for ldo to transition
+ * @clock_cycles: settling_time is counted in multiples of clock cycles
+ * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits
+ */
+struct omap_abb_common {
+	u32 opp_sel_mask;
+	u32 opp_change_mask;
+	u32 sr2_wtcnt_value_mask;
+	u32 sr2en_mask;
+	u32 active_fbb_sel_mask;
+	unsigned long settling_time;
+	unsigned long clock_cycles;
+	const struct omap_abb_ops *ops;
+};
+
+/*
+ * struct omap_abb_instance - data for each instance of ABB ldo
+ *
+ * @setup_offs: PRM register offset for initial configuration of ABB ldo
+ * @ctrl_offs: PRM register offset for active programming of ABB ldo
+ * @prm_irq_id: IRQ handle used to resolve IRQSTATUS offset & masks
+ * @enabled: track whether ABB ldo is enabled or disabled
+ * @common: pointer to common data for all ABB ldo's
+ * @_opp_sel: internally track last programmed state of ABB ldo.  DO NOT USE
+ */
+struct omap_abb_instance {
+	u8 setup_offs;
+	u8 ctrl_offs;
+	u8 prm_irq_id;
+	bool enabled;
+	const struct omap_abb_common *common;
+	u8 _opp_sel;
+};
+
+extern struct omap_abb_instance omap36xx_abb_mpu;
+
+extern struct omap_abb_instance omap4_abb_mpu;
+extern struct omap_abb_instance omap4_abb_iva;
+
+#endif
diff --git a/arch/arm/mach-omap2/abb36xx_data.c b/arch/arm/mach-omap2/abb36xx_data.c
new file mode 100644
index 0000000..0bcfd66
--- /dev/null
+++ b/arch/arm/mach-omap2/abb36xx_data.c
@@ -0,0 +1,38 @@
+/*
+ * OMAP36xx Adaptive Body-Bias (ABB) data
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette <mturquette@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "abb.h"
+#include "prm2xxx_3xxx.h"
+#include "prm-regbits-34xx.h"
+
+static const struct omap_abb_ops omap36xx_abb_ops = {
+	.check_tranxdone   = &omap36xx_prm_abb_check_txdone,
+	.clear_tranxdone   = &omap36xx_prm_abb_clear_txdone,
+};
+
+static const struct omap_abb_common omap36xx_abb_common = {
+	.opp_sel_mask		= OMAP3630_OPP_SEL_MASK,
+	.opp_change_mask	= OMAP3630_OPP_CHANGE_MASK,
+	.sr2en_mask		= OMAP3630_SR2EN_MASK,
+	.active_fbb_sel_mask	= OMAP3630_ACTIVE_FBB_SEL_MASK,
+	.sr2_wtcnt_value_mask	= OMAP3630_SR2_WTCNT_VALUE_MASK,
+	.settling_time		= 30,
+	.clock_cycles		= 8,
+	.ops			= &omap36xx_abb_ops,
+};
+
+/* SETUP & CTRL registers swapped names in OMAP4; thus 36xx looks strange */
+struct omap_abb_instance omap36xx_abb_mpu = {
+	.setup_offs		= OMAP3_PRM_LDO_ABB_CTRL_OFFSET,
+	.ctrl_offs		= OMAP3_PRM_LDO_ABB_SETUP_OFFSET,
+	.prm_irq_id		= OMAP3_PRM_IRQ_VDD_MPU_ID,
+	.common			= &omap36xx_abb_common,
+};
diff --git a/arch/arm/mach-omap2/abb44xx_data.c b/arch/arm/mach-omap2/abb44xx_data.c
new file mode 100644
index 0000000..a7cf855
--- /dev/null
+++ b/arch/arm/mach-omap2/abb44xx_data.c
@@ -0,0 +1,44 @@
+/*
+ * OMAP44xx Adaptive Body-Bias (ABB) data
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette <mturquette@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "abb.h"
+#include "prm44xx.h"
+#include "prm-regbits-44xx.h"
+
+static const struct omap_abb_ops omap4_abb_ops = {
+	.check_tranxdone   = &omap4_prm_abb_check_txdone,
+	.clear_tranxdone   = &omap4_prm_abb_clear_txdone,
+};
+
+static const struct omap_abb_common omap4_abb_common = {
+	.opp_sel_mask		= OMAP4430_OPP_SEL_MASK,
+	.opp_change_mask	= OMAP4430_OPP_CHANGE_MASK,
+	.sr2en_mask		= OMAP4430_SR2EN_MASK,
+	.active_fbb_sel_mask	= OMAP4430_ACTIVE_FBB_SEL_MASK,
+	.sr2_wtcnt_value_mask	= OMAP4430_SR2_WTCNT_VALUE_MASK,
+	.settling_time		= 50,
+	.clock_cycles		= 16,
+	.ops			= &omap4_abb_ops,
+};
+
+struct omap_abb_instance omap4_abb_mpu = {
+	.setup_offs		= OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET,
+	.ctrl_offs		= OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET,
+	.prm_irq_id		= OMAP4_PRM_IRQ_VDD_MPU_ID,
+	.common			= &omap4_abb_common,
+};
+
+struct omap_abb_instance omap4_abb_iva = {
+	.setup_offs		= OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET,
+	.ctrl_offs		= OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET,
+	.prm_irq_id		= OMAP4_PRM_IRQ_VDD_IVA_ID,
+	.common			= &omap4_abb_common,
+};
-- 
1.7.4.1

[PATCH 5/8] OMAP3+: OPP: add ABB data to voltage tables

[Mike Turquette]

The operating mode of the Adaptive Body-Bias ldo maps directly to the
voltage of its voltage domain.  The two modes supported are bypass and
Forward Body-Bias (FBB).

This patch models this relationship by adding an opp_sel paramter to
struct omap_volt_data and populates this type in the 3630 and 4430
voltage tables.

NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage.
FAST_OPP causes the ldo to operate in Forward Body-Bias mode.

Not all voltage domains have an ABB ldo and 3430 doesn't have one at
all.  In such cases voltages are marked with OMAP_ABB_NO_LDO.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/omap_opp_data.h |    5 ++-
 arch/arm/mach-omap2/opp3xxx_data.c  |   37 ++++++++++++++++++-----------------
 arch/arm/mach-omap2/opp4xxx_data.c  |   25 ++++++++++++-----------
 arch/arm/mach-omap2/voltage.h       |    1 +
 4 files changed, 36 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12..5dd4dea 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -71,12 +71,13 @@ struct omap_opp_def {
  * Initialization wrapper used to define SmartReflex process data
  * XXX Is this needed?  Just use C99 initializers in data files?
  */
-#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain)  \
+#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain, _opp_sel) \
 {								       \
 	.volt_nominal	= _v_nom,				       \
 	.sr_efuse_offs	= _efuse_offs,				       \
 	.sr_errminlimit = _errminlimit,				       \
-	.vp_errgain	= _errgain				       \
+	.vp_errgain	= _errgain,				       \
+	.opp_sel	= _opp_sel				       \
 }
 
 /* Use this to initialize the default table */
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..12fc2da 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -24,6 +24,7 @@
 #include "control.h"
 #include "omap_opp_data.h"
 #include "pm.h"
+#include "abb.h"
 
 /* 34xx */
 
@@ -36,12 +37,12 @@
 #define OMAP3430_VDD_MPU_OPP5_UV		1350000
 
 struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 /* VDD2 */
@@ -51,10 +52,10 @@ struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
 #define OMAP3430_VDD_CORE_OPP3_UV		1150000
 
 struct omap_volt_data omap34xx_vddcore_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 /* 36xx */
@@ -67,11 +68,11 @@ struct omap_volt_data omap34xx_vddcore_volt_data[] = {
 #define OMAP3630_VDD_MPU_OPP1G_UV		1375000
 
 struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
-	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
-	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27, OMAP_ABB_FAST_OPP),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 /* VDD2 */
@@ -80,9 +81,9 @@ struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
 #define OMAP3630_VDD_CORE_OPP100_UV		1200000
 
 struct omap_volt_data omap36xx_vddcore_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 /* OPP data */
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba2..efdbf91 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -25,6 +25,7 @@
 #include "control.h"
 #include "omap_opp_data.h"
 #include "pm.h"
+#include "abb.h"
 
 /*
  * Structures containing OMAP4430 voltage supported and various
@@ -37,11 +38,11 @@
 #define OMAP4430_VDD_MPU_OPPNITRO_UV		1375000
 
 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27, OMAP_ABB_FAST_OPP),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 #define OMAP4430_VDD_IVA_OPP50_UV		1013000
@@ -49,19 +50,19 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
 #define OMAP4430_VDD_IVA_OPPTURBO_UV		1300000
 
 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 #define OMAP4430_VDD_CORE_OPP50_UV		1025000
 #define OMAP4430_VDD_CORE_OPP100_UV		1200000
 
 struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
-	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
-	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
-	VOLT_DATA_DEFINE(0, 0, 0, 0),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16, OMAP_ABB_NO_LDO),
+	VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
 };
 
 
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 4f65411..51c0b31 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -107,6 +107,7 @@ struct omap_volt_data {
 	u32	sr_efuse_offs;
 	u8	sr_errminlimit;
 	u8	vp_errgain;
+	u32	opp_sel;
 };
 
 /**
-- 
1.7.4.1

[PATCH 6/8] OMAP3+: Voltage: add ABB data to voltage domains

[Mike Turquette]

Starting with OMAP36xx, some voltage domains have an ABB ldo meant to
insure stability when that voltage domain is operating at a high OPP.

This patch adds struct omap_abb_instance to struct voltagedomain and
populates the data for those voltage domains that have an ABB ldo on
both 36xx and 44xx silicon.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/voltage.h                 |    1 +
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |    3 +++
 arch/arm/mach-omap2/voltagedomains44xx_data.c |    3 +++
 3 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 51c0b31..5d567a2 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -71,6 +71,7 @@ struct voltagedomain {
 	struct omap_vc_channel *vc;
 	const struct omap_vfsm_instance *vfsm;
 	struct omap_vp_instance *vp;
+	struct omap_abb_instance *abb;
 	struct omap_voltdm_pmic *pmic;
 
 	/* VC/VP register access functions: SoC specific */
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index e7a0be1..a7473e1 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -26,6 +26,7 @@
 #include "voltage.h"
 #include "vc.h"
 #include "vp.h"
+#include "abb.h"
 
 /*
  * VDD data
@@ -96,6 +97,8 @@ void __init omap3xxx_voltagedomains_init(void)
 	if (cpu_is_omap3630()) {
 		omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data;
 		omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data;
+
+		omap3_voltdm_mpu.abb = &omap36xx_abb_mpu;
 	} else {
 		omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data;
 		omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index d5f06c5e..31124c4 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -32,6 +32,7 @@
 #include "omap_opp_data.h"
 #include "vc.h"
 #include "vp.h"
+#include "abb.h"
 
 static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = {
 	.voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET,
@@ -60,6 +61,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
 	.vc = &omap4_vc_mpu,
 	.vfsm = &omap4_vdd_mpu_vfsm,
 	.vp = &omap4_vp_mpu,
+	.abb = &omap4_abb_mpu,
 	.vdd = &omap4_vdd_mpu_info,
 };
 
@@ -72,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = {
 	.vc = &omap4_vc_iva,
 	.vfsm = &omap4_vdd_iva_vfsm,
 	.vp = &omap4_vp_iva,
+	.abb = &omap4_abb_iva,
 	.vdd = &omap4_vdd_iva_info,
 };
 
-- 
1.7.4.1

[PATCH 7/8] OMAP3+: ABB: initialization & transition functions

[Mike Turquette]

The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias
after voltage scaling is performed.

This patch implements the Adaptive Body-Bias ldo initialization routine
and the transition sequence which is needed after a vc_bypass or
vp_forceupdate sequence completes.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/Makefile |    2 +-
 arch/arm/mach-omap2/abb.c    |  218 ++++++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/abb.h    |    5 +
 3 files changed, 224 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-omap2/abb.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7dbb4d5..f87e1b2 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -91,7 +91,7 @@ obj-$(CONFIG_ARCH_OMAP4)		+= prcm.o cm2xxx_3xxx.o cminst44xx.o \
 
 # OMAP voltage domains
 ifeq ($(CONFIG_PM),y)
-voltagedomain-common			:= voltage.o vc.o vp.o
+voltagedomain-common			:= voltage.o vc.o vp.o abb.o
 obj-$(CONFIG_ARCH_OMAP2)		+= $(voltagedomain-common) \
 					   voltagedomains2xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(voltagedomain-common) \
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
new file mode 100644
index 0000000..b8b6b4b
--- /dev/null
+++ b/arch/arm/mach-omap2/abb.c
@@ -0,0 +1,218 @@
+/*
+ * OMAP Adaptive Body-Bias core
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette <mturquette@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/delay.h>
+
+#include "abb.h"
+#include "voltage.h"
+
+/*
+ * omap_abb_set_opp - program ABB ldo based on new voltage
+ *
+ * @voltdm - pointer to voltage domain that just finished scaling voltage
+ *
+ * Look up the ABB ldo state for the new voltage that voltdm just finished
+ * transitioning to and compare it to current ldo state.  If a change is needed
+ * then clear appropriate PRM_IRQSTATUS bit, transition ldo and then clear
+ * PRM_IRQSTATUS bit again.  Returns 0 on success, -EERROR otherwise.
+ */
+int omap_abb_set_opp(struct voltagedomain *voltdm)
+{
+	struct omap_abb_instance *abb = voltdm->abb;
+	struct omap_volt_data *volt_data;
+	int ret, timeout;
+	u8 opp_sel;
+
+	/* fetch the ABB ldo OPP_SEL value for the new voltage */
+	volt_data = omap_voltage_get_voltdata(voltdm, voltdm->curr_volt);
+
+	if (IS_ERR_OR_NULL(volt_data))
+		return -EINVAL;
+
+	opp_sel = volt_data->opp_sel;
+
+	/* bail early if no transition is necessary */
+	if (opp_sel == abb->_opp_sel)
+		return 0;
+
+	/* clear interrupt status */
+	timeout = 0;
+	while (timeout++ < ABB_TRANXDONE_TIMEOUT) {
+		abb->common->ops->clear_tranxdone(abb->prm_irq_id);
+
+		ret = abb->common->ops->check_tranxdone(abb->prm_irq_id);
+		if (!ret)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout>= ABB_TRANXDONE_TIMEOUT) {
+		pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n",
+				__func__, voltdm->name);
+		return -ETIMEDOUT;
+	}
+
+	/* program next state of ABB ldo */
+	voltdm->rmw(abb->common->opp_sel_mask,
+			opp_sel << __ffs(abb->common->opp_sel_mask),
+			abb->ctrl_offs);
+
+	/* initiate ABB ldo change */
+	voltdm->rmw(abb->common->opp_change_mask,
+			abb->common->opp_change_mask,
+			abb->ctrl_offs);
+
+	/* clear interrupt status */
+	timeout = 0;
+	while (timeout++ < ABB_TRANXDONE_TIMEOUT) {
+		abb->common->ops->clear_tranxdone(abb->prm_irq_id);
+
+		ret = abb->common->ops->check_tranxdone(abb->prm_irq_id);
+		if (!ret)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout>= ABB_TRANXDONE_TIMEOUT) {
+		pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n",
+				__func__, voltdm->name);
+		return -ETIMEDOUT;
+	}
+
+	/* track internal state */
+	abb->_opp_sel = opp_sel;
+
+	return 0;
+}
+
+/*
+ * omap_abb_enable - enable ABB ldo on a particular voltage domain
+ *
+ * @voltdm - pointer to particular voltage domain
+ */
+void omap_abb_enable(struct voltagedomain *voltdm)
+{
+	struct omap_abb_instance *abb = voltdm->abb;
+
+	if (abb->enabled)
+		return;
+
+	abb->enabled = true;
+
+	voltdm->rmw(abb->common->sr2en_mask, abb->common->sr2en_mask,
+			abb->setup_offs);
+}
+
+/*
+ * omap_abb_disable - disable ABB ldo on a particular voltage domain
+ *
+ * @voltdm - pointer to particular voltage domain
+ *
+ * Included for completeness.  Not currently used but will be needed in the
+ * future if ABB is converted to a loadable module.
+ */
+void omap_abb_disable(struct voltagedomain *voltdm)
+{
+	struct omap_abb_instance *abb = voltdm->abb;
+
+	if (!abb->enabled)
+		return;
+
+	abb->enabled = false;
+
+	voltdm->rmw(abb->common->sr2en_mask,
+			(0 << __ffs(abb->common->sr2en_mask)),
+			abb->setup_offs);
+}
+
+/*
+ * omap_abb_init - Initialize an ABB ldo instance
+ *
+ * @voltdm: voltage domain upon which ABB ldo resides
+ *
+ * Initializes an individual ABB ldo for Forward Body-Bias.  FBB is used to
+ * insure stability at higher voltages.  Note that some older OMAP chips have a
+ * Reverse Body-Bias mode meant to save power at low voltage, but that mode is
+ * unsupported and phased out on newer chips.
+ */
+void __init omap_abb_init(struct voltagedomain *voltdm)
+{
+	struct omap_abb_instance *abb = voltdm->abb;
+	u32 sys_clk_rate;
+	u32 sr2_wt_cnt_val;
+	u32 clock_cycles;
+	u32 settling_time;
+	u32 val;
+
+	if(IS_ERR_OR_NULL(abb))
+		return;
+
+	/*
+	 * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a
+	 * transition and must be programmed with the correct time at boot.
+	 * The value programmed into the register is the number of SYS_CLK
+	 * clock cycles that match a given wall time profiled for the ldo.
+	 * This value depends on:
+	 * 	settling time of ldo in micro-seconds (varies per OMAP family)
+	 * 	# of clock cycles per SYS_CLK period (varies per OMAP family)
+	 * 	the SYS_CLK frequency in MHz (varies per board)
+	 * The formula is:
+	 *
+	 *                      ldo settling time (in micro-seconds)
+	 * SR2_WTCNT_VALUE = ------------------------------------------
+	 *                   (# system clock cycles) * (sys_clk period)
+	 *
+	 * Put another way:
+	 *
+	 * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate))
+	 *
+	 * To avoid dividing by zero multiply both "# clock cycles" and
+	 * "settling time" by 10 such that the final result is the one we want.
+	 */
+
+	/* convert SYS_CLK rate to MHz & prevent divide by zero */
+	sys_clk_rate = DIV_ROUND_CLOSEST(voltdm->sys_clk.rate, 1000000);
+	clock_cycles = abb->common->clock_cycles * 10;
+	settling_time = abb->common->settling_time * 10;
+
+	/* calculate cycle rate */
+	clock_cycles = DIV_ROUND_CLOSEST(clock_cycles, sys_clk_rate);
+
+	/* calulate SR2_WTCNT_VALUE */
+	sr2_wt_cnt_val = DIV_ROUND_CLOSEST(settling_time, clock_cycles);
+
+	voltdm->rmw(abb->common->sr2_wtcnt_value_mask,
+			(sr2_wt_cnt_val << __ffs(abb->common->sr2_wtcnt_value_mask)),
+			abb->setup_offs);
+
+	/* allow Forward Body-Bias */
+	voltdm->rmw(abb->common->active_fbb_sel_mask,
+			abb->common->active_fbb_sel_mask,
+			abb->setup_offs);
+
+	/* did bootloader set OPP_SEL? */
+	val = voltdm->read(abb->ctrl_offs);
+	val &= abb->common->opp_sel_mask;
+	abb->_opp_sel = val >> __ffs(abb->common->opp_sel_mask);
+
+	/* enable the ldo if not done by bootloader */
+	val = voltdm->read(abb->setup_offs);
+	val &= abb->common->sr2en_mask;
+	if (val)
+		abb->enabled = true;
+	else
+		omap_abb_enable(voltdm);
+
+	return;
+}
diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
index 74f2044..c06c7d6 100644
--- a/arch/arm/mach-omap2/abb.h
+++ b/arch/arm/mach-omap2/abb.h
@@ -82,4 +82,9 @@ extern struct omap_abb_instance omap36xx_abb_mpu;
 extern struct omap_abb_instance omap4_abb_mpu;
 extern struct omap_abb_instance omap4_abb_iva;
 
+void omap_abb_init(struct voltagedomain *voltdm);
+void omap_abb_enable(struct voltagedomain *voltdm);
+void omap_abb_disble(struct voltagedomain *voltdm);
+int omap_abb_set_opp(struct voltagedomain *voltdm);
+
 #endif
-- 
1.7.4.1

[PATCH 8/8] OMAP3+: Voltage: add ABB to voltage scaling

[Mike Turquette]

Adaptive Body-Bias ldo state should be transitioned (if necessary) after
a voltage scaling sequence completes via vc_bypass or vp_forceupdate
methods.

This patch initializes the ABB ldo's as a part of the greater voltage
initialization function and adds the ABB transition routine to both the
vc_bypass and vp_forceupdate sequences.

Signed-off-by: Mike Turquette <mturquette@ti.com>
---
 arch/arm/mach-omap2/vc.c      |   10 ++++++++--
 arch/arm/mach-omap2/voltage.c |    4 ++++
 arch/arm/mach-omap2/vp.c      |    9 +++++++--
 3 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index aa9f0bc..6c51cc3 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -6,6 +6,7 @@
 
 #include "voltage.h"
 #include "vc.h"
+#include "abb.h"
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
 #include "prm44xx.h"
@@ -155,7 +156,7 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 	u32 loop_cnt = 0, retries_cnt = 0;
 	u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
 	u8 target_vsel, current_vsel;
-	int ret;
+	int ret = 0;
 
 	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
 	if (ret)
@@ -193,7 +194,12 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 	}
 
 	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
-	return 0;
+
+	/* transition Adaptive Body-Bias ldo */
+	if (voltdm->abb)
+		ret = omap_abb_set_opp(voltdm);
+
+	return ret;
 }
 
 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 97f96ae..df6eac6 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -40,6 +40,7 @@
 
 #include "vc.h"
 #include "vp.h"
+#include "abb.h"
 
 static LIST_HEAD(voltdm_list);
 
@@ -311,6 +312,9 @@ int __init omap_voltage_late_init(void)
 
 		if (voltdm->vc)
 			omap_vc_init_channel(voltdm);
+
+		if (voltdm->abb)
+			omap_abb_init(voltdm);
 	}
 
 	return 0;
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 3807620..76de8cd 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -5,6 +5,7 @@
 
 #include "voltage.h"
 #include "vp.h"
+#include "abb.h"
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
 #include "prm44xx.h"
@@ -124,7 +125,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	struct omap_vp_instance *vp = voltdm->vp;
 	u32 vpconfig;
 	u8 target_vsel, current_vsel;
-	int ret, timeout = 0;
+	int ret = 0, timeout = 0;
 
 	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
 	if (ret)
@@ -202,7 +203,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	vpconfig &= ~vp->common->vpconfig_forceupdate;
 	voltdm->write(vpconfig, vp->vpconfig);
 
-	return 0;
+	/* transition Adaptive Body-Bias LDO */
+	if (voltdm->abb)
+		ret = omap_abb_set_opp(voltdm);
+
+	return ret;
 }
 
 /**
-- 
1.7.4.1

Re: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers

[Jean Pihet]

Mike, Kevin,

On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette <mturquette@ti.com> wrote:
> From: Nishanth Menon <nm@ti.com>
>
> We have multiple interrupt status hidden in the PRM interrupt status
> reg. Make this handling generic to allow us to pull out LDO status such
> as those for ABB from it using the same data structure and indexing. We
> hence rename accordingly.
I am not sure that the rename is needed.

Kevin, Nishant, what is your opinion?

Regards,
Jean

>
> We also fix a trivial warning as the variable does not need exporting:
> arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol
> 'omap3_prm_irqs' was not declared. Should it be static?
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> Signed-off-by: Mike Turquette <mturquette@ti.com>
> ---
>  arch/arm/mach-omap2/prm2xxx_3xxx.c |   22 +++++++++++-----------
>  arch/arm/mach-omap2/prm2xxx_3xxx.h |    7 +++++--
>  arch/arm/mach-omap2/prm44xx.c      |   28 ++++++++++++++--------------
>  arch/arm/mach-omap2/prm44xx.h      |    7 +++++--
>  arch/arm/mach-omap2/vp.h           |    9 ---------
>  arch/arm/mach-omap2/vp3xxx_data.c  |    4 ++--
>  arch/arm/mach-omap2/vp44xx_data.c  |    6 +++---
>  7 files changed, 40 insertions(+), 43 deletions(-)
>
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Re: [PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data

[Jean Pihet]

Hi Mike,

On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette <mturquette@ti.com> wrote:
> Due to voltage domain trimming and silicon characterstics some silicon
> may experience instability when operating at a high voltage.  To
> compensate for this an Adaptive Body-Bias ldo exists.  First featured in
> OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS
> backgates when a voltage domain is operating at a high OPP.  In this
> mode the ldo is said to be in Forward Body-Bias.  At OPPs within a
> nominal voltage range the ABB ldo is bypassed.
>
> This patch introduces the data structures needed to represent the ABB
> ldo's in the voltage layer, and populates the appropriate data for 3630
> and OMAP4.  Not all voltage domains have an ABB ldo, and OMAP34xx does
> not have it at all; in such cases the voltage data will be marked with
> OMAP_ABB_NO_LDO.
The OMAP_ABB_ macros are defined but not used in this patch set. Is
this intentional?
Should the opp_sel field get tested against OMAP_ABB_NO_LDO and if
true should the ABB operations be no-ops?

>
> Signed-off-by: Mike Turquette <mturquette@ti.com>
> ---
>  arch/arm/mach-omap2/Makefile       |    5 +-
>  arch/arm/mach-omap2/abb.h          |   85 ++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/abb36xx_data.c |   38 ++++++++++++++++
>  arch/arm/mach-omap2/abb44xx_data.c |   44 ++++++++++++++++++
>  4 files changed, 170 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-omap2/abb.h
>  create mode 100644 arch/arm/mach-omap2/abb36xx_data.c
>  create mode 100644 arch/arm/mach-omap2/abb44xx_data.c
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 2cbef35..7dbb4d5 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -79,14 +79,15 @@ endif
>  # PRCM
>  obj-$(CONFIG_ARCH_OMAP2)               += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
>  obj-$(CONFIG_ARCH_OMAP3)               += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
> -                                          vc3xxx_data.o vp3xxx_data.o
> +                                          vc3xxx_data.o vp3xxx_data.o \
> +                                          abb36xx_data.o
>  # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
>  # will be removed once the OMAP4 part of the codebase is converted to
>  # use OMAP4-specific PRCM functions.
>  obj-$(CONFIG_ARCH_OMAP4)               += prcm.o cm2xxx_3xxx.o cminst44xx.o \
>                                           cm44xx.o prcm_mpu44xx.o \
>                                           prminst44xx.o vc44xx_data.o \
> -                                          vp44xx_data.o
> +                                          vp44xx_data.o abb44xx_data.o
>
>  # OMAP voltage domains
>  ifeq ($(CONFIG_PM),y)
> diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
> new file mode 100644
> index 0000000..74f2044
> --- /dev/null
> +++ b/arch/arm/mach-omap2/abb.h
> @@ -0,0 +1,85 @@
> +/*
> + * OMAP Adaptive Body-Bias structure and macro definitions
> + *
> + * Copyright (C) 2011 Texas Instruments, Inc.
> + * Mike Turquette <mturquette@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H
> +#define __ARCH_ARM_MACH_OMAP2_ABB_H
> +
> +#include <linux/kernel.h>
> +
> +#include "voltage.h"
> +
> +/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */
> +#define OMAP_ABB_NOMINAL_OPP   0
> +#define OMAP_ABB_FAST_OPP      1
> +#define OMAP_ABB_NO_LDO                ~0

Regards,
Jean
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Re: [PATCH 7/8] OMAP3+: ABB: initialization & transition functions

[Jean Pihet]

Mike,

I have a minor comment below.

On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette <mturquette@ti.com> wrote:
> The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias
> after voltage scaling is performed.
>
> This patch implements the Adaptive Body-Bias ldo initialization routine
> and the transition sequence which is needed after a vc_bypass or
> vp_forceupdate sequence completes.
>
> Signed-off-by: Mike Turquette <mturquette@ti.com>
> ---
...

> diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
> new file mode 100644
> index 0000000..b8b6b4b
...
> +/*
> + * omap_abb_disable - disable ABB ldo on a particular voltage domain
> + *
> + * @voltdm - pointer to particular voltage domain
> + *
> + * Included for completeness.  Not currently used but will be needed in the
> + * future if ABB is converted to a loadable module.
> + */
> +void omap_abb_disable(struct voltagedomain *voltdm)
> +{
> +       struct omap_abb_instance *abb = voltdm->abb;
> +
> +       if (!abb->enabled)
> +               return;
> +
> +       abb->enabled = false;
> +
> +       voltdm->rmw(abb->common->sr2en_mask,
> +                       (0 << __ffs(abb->common->sr2en_mask)),
(0 << x) can be replaced with 0.

> +                       abb->setup_offs);
> +}
> +
...

Regards,
Jean
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Re: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers

[Kevin Hilman]

Jean Pihet <jean.pihet@newoldbits.com> writes:

> Mike, Kevin,
>
> On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette <mturquette@ti.com> wrote:
>> From: Nishanth Menon <nm@ti.com>
>>
>> We have multiple interrupt status hidden in the PRM interrupt status
>> reg. Make this handling generic to allow us to pull out LDO status such
>> as those for ABB from it using the same data structure and indexing. We
>> hence rename accordingly.
> I am not sure that the rename is needed.
>
> Kevin, Nishant, what is your opinion?

Rename is mostly fine.

I think the patch is correct, since the interrupts are technically for
the the whole PRM, not just the VP.

However, I don't like  the s/vp_id/irq_id/ in the APIs, because the APIs
are intended to be VP specific.

I'll likely pull/fold the parts I agree with into the original patch in
my VP cleanup series

Kevin

Re: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers

[Kevin Hilman]

Jean Pihet <jean.pihet@newoldbits.com> writes:

> Mike, Kevin,
>
> On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette <mturquette@ti.com> wrote:
>> From: Nishanth Menon <nm@ti.com>
>>
>> We have multiple interrupt status hidden in the PRM interrupt status
>> reg. Make this handling generic to allow us to pull out LDO status such
>> as those for ABB from it using the same data structure and indexing. We
>> hence rename accordingly.
> I am not sure that the rename is needed.
>
> Kevin, Nishant, what is your opinion?

On second thought, I don't like the rename.

The goal of the VP stuff in prmXXXX.c is to provide high-level functions
for VP code where the register access stuff is contained in the PRM
layer (since all registers for VP are in the PRM.)

While it's currently only used for VP-related IRQs, this might be
extended for other VP register accesses, if there are register
differences between SoC revisions.

So, in the end, I agree w/Jean.  I don't think the rename is right.

I will however pick up the sparse warning fix, and fold it into the
original patch in my part A series where the problem was introduced:
OMAP2+: add PRM VP functions for checking/clearing VP TX done status

Thanks,

Kevin