From: Ido Yariv <ido@wizery.com> To: davinci-linux-open-source@linux.davincidsp.com, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org Cc: Ido Yariv <ido@wizery.com>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH v2 1/6] arm: davinci: Fix low level gpio irq handlers' argument Date: Sun, 10 Jul 2011 16:14:34 +0300 [thread overview] Message-ID: <1310303679-17936-2-git-send-email-ido@wizery.com> (raw) In-Reply-To: <1310303679-17936-1-git-send-email-ido@wizery.com> Commit 7416401 ("arm: davinci: Fix fallout from generic irq chip conversion") introduced a bug, causing low level interrupt handlers to get a bogus irq number as an argument. The gpio irq handler falsely assumes that the handler data is the irq base number and that is no longer true. Fix this by converting gpio_irq_handler's bank_irq argument to the corresponding irq base number. Signed-off-by: Ido Yariv <ido@wizery.com> CC: Thomas Gleixner <tglx@linutronix.de> --- arch/arm/mach-davinci/gpio.c | 32 ++++++++++++++++++++++++++++---- 1 files changed, 28 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index e722139..ff43e2a 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -249,16 +249,40 @@ static struct irq_chip gpio_irqchip = { .flags = IRQCHIP_SET_TYPE_MASKED, }; +static inline int bankirq_to_irqbase(unsigned int bank_irq) +{ + int gpio; + int index; + + /* Each irq bank consists of up to 16 irqs */ + gpio = 16 * (bank_irq - davinci_soc_info.gpio_irq); + + /* Each controller controls 32 GPIOs */ + index = gpio / 32; + + if (unlikely(!davinci_soc_info.gpio_ctlrs)) + return -EINVAL; + + if (unlikely(index >= davinci_soc_info.gpio_ctlrs_num)) + return -EINVAL; + + return davinci_soc_info.gpio_ctlrs[index].irq_base; +} + static void -gpio_irq_handler(unsigned irq, struct irq_desc *desc) +gpio_irq_handler(unsigned bank_irq, struct irq_desc *desc) { struct davinci_gpio_regs __iomem *g; u32 mask = 0xffff; + int irqbase = bankirq_to_irqbase(bank_irq); + + if (unlikely(irqbase < 0)) + return; g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc); /* we only care about one bank */ - if (irq & 1) + if (bank_irq & 1) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ @@ -274,11 +298,11 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) if (!status) break; __raw_writel(status, &g->intstat); - if (irq & 1) + if (bank_irq & 1) status >>= 16; /* now demux them to the right lowlevel handler */ - n = (int)irq_get_handler_data(irq); + n = irqbase; while (status) { res = ffs(status); n += res; -- 1.7.4.1
WARNING: multiple messages have this Message-ID (diff)
From: ido@wizery.com (Ido Yariv) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/6] arm: davinci: Fix low level gpio irq handlers' argument Date: Sun, 10 Jul 2011 16:14:34 +0300 [thread overview] Message-ID: <1310303679-17936-2-git-send-email-ido@wizery.com> (raw) In-Reply-To: <1310303679-17936-1-git-send-email-ido@wizery.com> Commit 7416401 ("arm: davinci: Fix fallout from generic irq chip conversion") introduced a bug, causing low level interrupt handlers to get a bogus irq number as an argument. The gpio irq handler falsely assumes that the handler data is the irq base number and that is no longer true. Fix this by converting gpio_irq_handler's bank_irq argument to the corresponding irq base number. Signed-off-by: Ido Yariv <ido@wizery.com> CC: Thomas Gleixner <tglx@linutronix.de> --- arch/arm/mach-davinci/gpio.c | 32 ++++++++++++++++++++++++++++---- 1 files changed, 28 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index e722139..ff43e2a 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -249,16 +249,40 @@ static struct irq_chip gpio_irqchip = { .flags = IRQCHIP_SET_TYPE_MASKED, }; +static inline int bankirq_to_irqbase(unsigned int bank_irq) +{ + int gpio; + int index; + + /* Each irq bank consists of up to 16 irqs */ + gpio = 16 * (bank_irq - davinci_soc_info.gpio_irq); + + /* Each controller controls 32 GPIOs */ + index = gpio / 32; + + if (unlikely(!davinci_soc_info.gpio_ctlrs)) + return -EINVAL; + + if (unlikely(index >= davinci_soc_info.gpio_ctlrs_num)) + return -EINVAL; + + return davinci_soc_info.gpio_ctlrs[index].irq_base; +} + static void -gpio_irq_handler(unsigned irq, struct irq_desc *desc) +gpio_irq_handler(unsigned bank_irq, struct irq_desc *desc) { struct davinci_gpio_regs __iomem *g; u32 mask = 0xffff; + int irqbase = bankirq_to_irqbase(bank_irq); + + if (unlikely(irqbase < 0)) + return; g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc); /* we only care about one bank */ - if (irq & 1) + if (bank_irq & 1) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ @@ -274,11 +298,11 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) if (!status) break; __raw_writel(status, &g->intstat); - if (irq & 1) + if (bank_irq & 1) status >>= 16; /* now demux them to the right lowlevel handler */ - n = (int)irq_get_handler_data(irq); + n = irqbase; while (status) { res = ffs(status); n += res; -- 1.7.4.1
next prev parent reply other threads:[~2011-07-10 13:14 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-07-10 13:14 [PATCH v2 0/6] arm: davinci: DA850: wl12xx expansion card Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-10 13:14 ` Ido Yariv [this message] 2011-07-10 13:14 ` [PATCH v2 1/6] arm: davinci: Fix low level gpio irq handlers' argument Ido Yariv 2011-07-11 11:58 ` Nori, Sekhar 2011-07-11 11:58 ` Nori, Sekhar 2011-07-11 20:33 ` Ido Yariv 2011-07-11 20:33 ` Ido Yariv 2011-07-11 21:03 ` [PATCH v3 " Ido Yariv 2011-07-11 21:03 ` Ido Yariv 2011-07-12 9:22 ` Nori, Sekhar 2011-07-12 9:22 ` Nori, Sekhar 2011-07-12 22:19 ` Ido Yariv 2011-07-12 22:19 ` Ido Yariv 2011-07-10 13:14 ` [PATCH v2 2/6] arm: davinci: Explicitly set channel controllers' default queues Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-25 13:15 ` Nori, Sekhar 2011-07-25 13:15 ` Nori, Sekhar 2011-07-25 13:33 ` Sergei Shtylyov 2011-07-25 13:33 ` Sergei Shtylyov 2011-07-25 16:31 ` Nori, Sekhar 2011-07-25 16:31 ` Nori, Sekhar 2011-07-29 14:42 ` Ben Gardiner 2011-07-29 14:42 ` Ben Gardiner 2011-07-10 13:14 ` [PATCH v2 3/6] arm: davinci: mmc: Add support for set_power callback Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-25 13:19 ` Nori, Sekhar 2011-07-25 13:19 ` Nori, Sekhar 2011-07-28 20:49 ` [PATCH REPOST v2] mmc: davinci: " Ido Yariv 2011-07-28 20:49 ` Ido Yariv 2011-07-28 22:02 ` Chris Ball 2011-07-28 22:02 ` Chris Ball 2011-07-10 13:14 ` [PATCH v2 4/6] arm: davinci: DA850: Add MMC/SD1 pinmux configuration Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-10 13:14 ` [PATCH v2 5/6] arm: davinci: DA850: Add GPIO pinmux configuration for wl1271 Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-25 13:23 ` Nori, Sekhar 2011-07-25 13:23 ` Nori, Sekhar 2011-07-10 13:14 ` [PATCH v2 6/6] arm: davinci: DA850: Add wl1271/wlan support Ido Yariv 2011-07-10 13:14 ` Ido Yariv 2011-07-25 17:40 ` Nori, Sekhar 2011-07-25 17:40 ` Nori, Sekhar 2011-07-28 18:34 ` Ido Yariv 2011-07-28 18:34 ` Ido Yariv 2011-08-22 7:37 ` Harishkumar V 2011-07-28 20:52 ` [PATCH v3] davinci: Add wl1271/wlan support for AM18x Ido Yariv 2011-07-28 20:52 ` Ido Yariv 2011-07-28 21:15 ` Troy Kisky 2011-07-28 21:15 ` Troy Kisky 2011-07-28 22:06 ` Ido Yariv 2011-07-28 22:06 ` Ido Yariv 2011-07-29 18:51 ` Troy Kisky 2011-07-29 18:51 ` Troy Kisky 2011-08-03 13:27 ` Nori, Sekhar 2011-08-04 7:51 ` [PATCH v4] ARM: davinci: AM18x: Add wl1271/wlan support Ido Yariv 2011-08-04 7:51 ` Ido Yariv 2011-08-04 8:40 ` Jaya Kumar 2011-08-04 8:40 ` Jaya Kumar 2011-08-04 9:22 ` Ido Yariv 2011-08-04 9:22 ` Ido Yariv 2011-09-01 11:59 ` Nori, Sekhar 2011-09-01 11:59 ` Nori, Sekhar
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