[[PATCH v2 0/6] imx soc revision clean up

[[PATCH v2 0/6] imx soc revision clean up

[Jason Liu]

The patchset make some clean up for the imx soc revision display by
- introudce the generic function for displaying silicon revision
- update the imx SoCs to adopt the same usage

The patchset is based on Fabio's initial commit and I did some update

V2: Address comments from Sascha
- Remove the EXPORT_SYMBOL from imx_print_silicon_rev
- Fix the mx31 print twice issue

Fabio Estevam (1):
  ARM: imx: Introduce generic function for displaying silicon revision

Jason Liu (5):
  ARM: mx25: Print silicon revision on boot
  ARM: mx27: Print silicon revision on boot
  ARM: mx31: use generic function for displaying silicon revision
  ARM: mx35: use generic function for displaying silicon revision
  ARM: mx5: use generic function for displaying silicon revision

 arch/arm/mach-imx/Makefile              |    2 +-
 arch/arm/mach-imx/clock-imx25.c         |    6 +++
 arch/arm/mach-imx/clock-imx27.c         |    2 +
 arch/arm/mach-imx/clock-imx31.c         |    4 +-
 arch/arm/mach-imx/clock-imx35.c         |    3 +-
 arch/arm/mach-imx/cpu-imx25.c           |   41 +++++++++++++++++
 arch/arm/mach-imx/cpu-imx27.c           |   28 +++++------
 arch/arm/mach-imx/cpu-imx31.c           |   48 +++++++++++---------
 arch/arm/mach-imx/cpu-imx35.c           |   30 ++++++-------
 arch/arm/mach-mx5/clock-mx51-mx53.c     |    6 +--
 arch/arm/mach-mx5/cpu.c                 |   74 +++++++------------------------
 arch/arm/plat-mxc/cpu.c                 |    9 ++++
 arch/arm/plat-mxc/include/mach/common.h |    1 +
 arch/arm/plat-mxc/include/mach/mx25.h   |    4 ++
 arch/arm/plat-mxc/include/mach/mx3x.h   |   18 +-------
 15 files changed, 142 insertions(+), 134 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu-imx25.c

-- 
1.7.4.1

[[PATCH v2 1/6] ARM: imx: Introduce generic function for displaying silicon revision

[Jason Liu]

From: Fabio Estevam <fabio.estevam@freescale.com>

Currently each i.MX processor has its own function for displaying the silicon
revision.

Introduce a generic function for this purpose, so that all i.MX processors can
reuse it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
V2: remove EXPORT_SYMBOL
---
 arch/arm/plat-mxc/cpu.c                 |    9 +++++++++
 arch/arm/plat-mxc/include/mach/common.h |    1 +
 2 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c
index 386e0d5..f5b7e0f 100644
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/plat-mxc/cpu.c
@@ -1,5 +1,6 @@
 
 #include <linux/module.h>
+#include <mach/hardware.h>
 
 unsigned int __mxc_cpu_type;
 EXPORT_SYMBOL(__mxc_cpu_type);
@@ -9,3 +10,11 @@ void mxc_set_cpu_type(unsigned int type)
 	__mxc_cpu_type = type;
 }
 
+void imx_print_silicon_rev(const char *cpu, int srev)
+{
+	if (srev == IMX_CHIP_REVISION_UNKNOWN)
+		pr_info("CPU identified as %s, unknown revision\n", cpu);
+	else
+		pr_info("CPU identified as %s, silicon rev %d.%d\n",
+				cpu, (srev >> 4) & 0xf, srev & 0xf);
+}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4e3d978..318e0da 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -72,4 +72,5 @@ extern void mxc_arch_reset_init(void __iomem *);
 extern void mx51_efikamx_reset(void);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
+extern void imx_print_silicon_rev(const char *cpu, int srev);
 #endif
-- 
1.7.4.1

[[PATCH v2 2/6] ARM: mx25: Print silicon revision on boot

[Jason Liu]

Silicon revision is useful information to have during kernel boot.
Print the MX25 silicon revision.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>

---
Resend: The patch first comes from Fabio, I did some change to use
the generic function for displaying silicon revision
---
 arch/arm/mach-imx/Makefile            |    2 +-
 arch/arm/mach-imx/clock-imx25.c       |    6 +++++
 arch/arm/mach-imx/cpu-imx25.c         |   41 +++++++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx25.h |    4 +++
 4 files changed, 52 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e9eb36d..0a5332c 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -3,7 +3,7 @@ obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
 obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
 obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
 
-obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o
+obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o
 
 obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
 obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
index e63e235..b0fec74c 100644
--- a/arch/arm/mach-imx/clock-imx25.c
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
 DEFINE_CLOCK(csi_clk,    0, CCM_CGCR1,  4, get_rate_csi, NULL,  &csi_per_clk);
 DEFINE_CLOCK(can1_clk,	 0, CCM_CGCR1,  2, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(can2_clk,	 1, CCM_CGCR1,  3, get_rate_ipg, NULL, NULL);
+DEFINE_CLOCK(iim_clk,    0, CCM_CGCR1, 26, NULL, NULL, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
 	/* i.mx25 has the i.mx35 type sdma */
 	_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
+	_REGISTER_CLOCK(NULL, "iim", iim_clk)
 };
 
 int __init mx25_clocks_init(void)
@@ -334,6 +336,10 @@ int __init mx25_clocks_init(void)
 	/* Clock source for gpt is ahb_div */
 	__raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64);
 
+	clk_enable(&iim_clk);
+	imx_print_silicon_rev("i.MX25", mx25_revision());
+	clk_disable(&iim_clk);
+
 	mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
 
 	return 0;
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c
new file mode 100644
index 0000000..6914bcb
--- /dev/null
+++ b/arch/arm/mach-imx/cpu-imx25.c
@@ -0,0 +1,41 @@
+/*
+ * MX25 CPU type detection
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+#include <mach/iim.h>
+
+static int mx25_cpu_rev = -1;
+
+static int mx25_read_cpu_rev(void)
+{
+	u32 rev;
+
+	rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV));
+	switch (rev) {
+	case 0x00:
+		return IMX_CHIP_REVISION_1_0;
+	case 0x01:
+		return IMX_CHIP_REVISION_1_1;
+	default:
+		return IMX_CHIP_REVISION_UNKNOWN;
+	}
+}
+
+int mx25_revision(void)
+{
+	if (mx25_cpu_rev == -1)
+		mx25_cpu_rev = mx25_read_cpu_rev();
+
+	return mx25_cpu_rev;
+}
+EXPORT_SYMBOL(mx25_revision);
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 087cd7a..8dcab80 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -104,4 +104,8 @@
 #define MX25_DMA_REQ_SSI1_RX0	28
 #define MX25_DMA_REQ_SSI1_TX0	29
 
+#ifndef __ASSEMBLY__
+extern int mx25_revision(void);
+#endif
+
 #endif /* ifndef __MACH_MX25_H__ */
-- 
1.7.4.1

[[PATCH v2 3/6] ARM: mx27: Print silicon revision on boot

[Jason Liu]

Silicon revision is useful information to have during kernel boot.

Print the MX27 silicon revision.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
Resend: The patch based on Fabio initial patch, I did some change to
use generic function for displaying silicon revision and also some
naming change to avoid using the generic name
---
 arch/arm/mach-imx/clock-imx27.c |    2 ++
 arch/arm/mach-imx/cpu-imx27.c   |   28 +++++++++++++---------------
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 6912b82..e6b1beb 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref)
 	clk_enable(&gpio_clk);
 	clk_enable(&emi_clk);
 	clk_enable(&iim_clk);
+	imx_print_silicon_rev("i.MX27", mx27_revision());
+	clk_disable(&iim_clk);
 
 #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
 	clk_enable(&uart1_clk);
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index 3b117be..ff38e15 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -26,12 +26,12 @@
 
 #include <mach/hardware.h>
 
-static int cpu_silicon_rev = -1;
-static int cpu_partnumber;
+static int mx27_cpu_rev = -1;
+static int mx27_cpu_partnumber;
 
 #define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
 
-static void query_silicon_parameter(void)
+static int mx27_read_cpu_rev(void)
 {
 	u32 val;
 	/*
@@ -42,20 +42,18 @@ static void query_silicon_parameter(void)
 	val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
 				+ SYS_CHIP_ID));
 
+	mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
+
 	switch (val >> 28) {
 	case 0:
-		cpu_silicon_rev = IMX_CHIP_REVISION_1_0;
-		break;
+		return IMX_CHIP_REVISION_1_0;
 	case 1:
-		cpu_silicon_rev = IMX_CHIP_REVISION_2_0;
-		break;
+		return IMX_CHIP_REVISION_2_0;
 	case 2:
-		cpu_silicon_rev = IMX_CHIP_REVISION_2_1;
-		break;
+		return IMX_CHIP_REVISION_2_1;
 	default:
-		cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN;
+		return IMX_CHIP_REVISION_UNKNOWN;
 	}
-	cpu_partnumber = (int)((val >> 12) & 0xFFFF);
 }
 
 /*
@@ -65,12 +63,12 @@ static void query_silicon_parameter(void)
  */
 int mx27_revision(void)
 {
-	if (cpu_silicon_rev == -1)
-		query_silicon_parameter();
+	if (mx27_cpu_rev == -1)
+		mx27_cpu_rev = mx27_read_cpu_rev();
 
-	if (cpu_partnumber != 0x8821)
+	if (mx27_cpu_partnumber != 0x8821)
 		return -EINVAL;
 
-	return cpu_silicon_rev;
+	return mx27_cpu_rev;
 }
 EXPORT_SYMBOL(mx27_revision);
-- 
1.7.4.1

[[PATCH v2 4/6] ARM: mx31: use generic function for displaying silicon revision

[Jason Liu]

Update to use generic function for displaying silicon revision

Tested on mx31pdk board as print the following information:
CPU identified as i.MX31, silicon rev 2.8

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>

---
V2: remove .v member and call imx_print_silicon_rev inside to avoid print twice
---
 arch/arm/mach-imx/clock-imx31.c       |    4 +-
 arch/arm/mach-imx/cpu-imx31.c         |   48 ++++++++++++++++++---------------
 arch/arm/plat-mxc/include/mach/mx3x.h |   11 +------
 3 files changed, 30 insertions(+), 33 deletions(-)

diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index d973770..85b8885 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref)
 	clk_enable(&gpt_clk);
 	clk_enable(&emi_clk);
 	clk_enable(&iim_clk);
+	mx31_revision();
+	clk_disable(&iim_clk);
 
 	clk_enable(&serial_pll_clk);
 
-	mx31_read_cpu_rev();
-
 	if (mx31_revision() >= IMX_CHIP_REVISION_2_0) {
 		reg = __raw_readl(MXC_CCM_PMCR1);
 		/* No PLL restart on DVFS switch; enable auto EMI handshake */
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index a378070..b0fecd9 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -13,45 +13,49 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/iim.h>
+#include <mach/common.h>
 
-unsigned int mx31_cpu_rev;
-EXPORT_SYMBOL(mx31_cpu_rev);
+static int mx31_cpu_rev = -1;
 
 static struct {
 	u8 srev;
 	const char *name;
-	const char *v;
 	unsigned int rev;
-} mx31_cpu_type[] __initdata = {
-	{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0",  .rev = IMX_CHIP_REVISION_1_0	},
-	{ .srev = 0x10, .name = "i.MX31",    .v = "1.1",  .rev = IMX_CHIP_REVISION_1_1	},
-	{ .srev = 0x11, .name = "i.MX31L",   .v = "1.1",  .rev = IMX_CHIP_REVISION_1_1	},
-	{ .srev = 0x12, .name = "i.MX31",    .v = "1.15", .rev = IMX_CHIP_REVISION_1_1	},
-	{ .srev = 0x13, .name = "i.MX31L",   .v = "1.15", .rev = IMX_CHIP_REVISION_1_1	},
-	{ .srev = 0x14, .name = "i.MX31",    .v = "1.2",  .rev = IMX_CHIP_REVISION_1_2	},
-	{ .srev = 0x15, .name = "i.MX31L",   .v = "1.2",  .rev = IMX_CHIP_REVISION_1_2	},
-	{ .srev = 0x28, .name = "i.MX31",    .v = "2.0",  .rev = IMX_CHIP_REVISION_2_0	},
-	{ .srev = 0x29, .name = "i.MX31L",   .v = "2.0",  .rev = IMX_CHIP_REVISION_2_0	},
+} mx31_cpu_type[] = {
+	{ .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
+	{ .srev = 0x10, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
+	{ .srev = 0x11, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
+	{ .srev = 0x12, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
+	{ .srev = 0x13, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
+	{ .srev = 0x14, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_2 },
+	{ .srev = 0x15, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_2 },
+	{ .srev = 0x28, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_2_0 },
+	{ .srev = 0x29, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_2_0 },
 };
 
-void __init mx31_read_cpu_rev(void)
+static int mx31_read_cpu_rev(void)
 {
 	u32 i, srev;
 
 	/* read SREV register from IIM module */
 	srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
+	srev &= 0xff;
 
 	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
 		if (srev == mx31_cpu_type[i].srev) {
-			printk(KERN_INFO
-				"CPU identified as %s, silicon rev %s\n",
-				mx31_cpu_type[i].name, mx31_cpu_type[i].v);
-
-			mx31_cpu_rev = mx31_cpu_type[i].rev;
-			return;
+			imx_print_silicon_rev(mx31_cpu_type[i].name, srev);
+			return mx31_cpu_type[i].rev;
 		}
 
-	mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
+	imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
+	return IMX_CHIP_REVISION_UNKNOWN;
+}
+
+int mx31_revision(void)
+{
+	if (mx31_cpu_rev == -1)
+		mx31_cpu_rev = mx31_read_cpu_rev();
 
-	printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
+	return mx31_cpu_rev;
 }
+EXPORT_SYMBOL(mx31_revision);
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 388a407..e1850f4 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -187,15 +187,6 @@
 /* Mandatory defines used globally */
 
 #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
-
-extern unsigned int mx31_cpu_rev;
-extern void mx31_read_cpu_rev(void);
-
-static inline int mx31_revision(void)
-{
-	return mx31_cpu_rev;
-}
-
 extern unsigned int mx35_cpu_rev;
 extern void mx35_read_cpu_rev(void);
 
@@ -203,6 +194,8 @@ static inline int mx35_revision(void)
 {
 	return mx35_cpu_rev;
 }
+
+extern int mx31_revision(void);
 #endif
 
 #endif /* ifndef __MACH_MX3x_H__ */
-- 
1.7.4.1

[[PATCH v2 5/6] ARM: mx35: use generic function for displaying silicon revision

[Jason Liu]

update to use generic function for displaying silicon revision

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/clock-imx35.c       |    3 ++-
 arch/arm/mach-imx/cpu-imx35.c         |   30 ++++++++++++++----------------
 arch/arm/plat-mxc/include/mach/mx3x.h |    9 +--------
 3 files changed, 17 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 88b62a0..abf30d4 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -537,7 +537,8 @@ int __init mx35_clocks_init()
 	__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
 
 	clk_enable(&iim_clk);
-	mx35_read_cpu_rev();
+	imx_print_silicon_rev("i.MX35", mx35_revision());
+	clk_disable(&iim_clk);
 
 #ifdef CONFIG_MXC_USE_EPIT
 	epit_timer_init(&epit1_clk,
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 6637cd8..846e46e 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -13,32 +13,30 @@
 #include <mach/hardware.h>
 #include <mach/iim.h>
 
-unsigned int mx35_cpu_rev;
-EXPORT_SYMBOL(mx35_cpu_rev);
+static int mx35_cpu_rev = -1;
 
-void __init mx35_read_cpu_rev(void)
+static int mx35_read_cpu_rev(void)
 {
 	u32 rev;
-	char *srev;
 
 	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
 	switch (rev) {
 	case 0x00:
-		mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
-		srev = "1.0";
-		break;
+		return IMX_CHIP_REVISION_1_0;
 	case 0x10:
-		mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
-		srev = "2.0";
-		break;
+		return IMX_CHIP_REVISION_2_0;
 	case 0x11:
-		mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
-		srev = "2.1";
-		break;
+		return IMX_CHIP_REVISION_2_1;
 	default:
-		mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
-		srev = "unknown";
+		return IMX_CHIP_REVISION_UNKNOWN;
 	}
+}
+
+int mx35_revision(void)
+{
+	if (mx35_cpu_rev == -1)
+		mx35_cpu_rev = mx35_read_cpu_rev();
 
-	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+	return mx35_cpu_rev;
 }
+EXPORT_SYMBOL(mx35_revision);
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index e1850f4..30dbf42 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -187,14 +187,7 @@
 /* Mandatory defines used globally */
 
 #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
-extern unsigned int mx35_cpu_rev;
-extern void mx35_read_cpu_rev(void);
-
-static inline int mx35_revision(void)
-{
-	return mx35_cpu_rev;
-}
-
+extern int mx35_revision(void);
 extern int mx31_revision(void);
 #endif
 
-- 
1.7.4.1

[[PATCH v2 6/6] ARM: mx5: use generic function for displaying silicon revision

[Jason Liu]

Update to use generic function for displaying silicon revision

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-mx5/clock-mx51-mx53.c |    6 +--
 arch/arm/mach-mx5/cpu.c             |   74 ++++++++---------------------------
 2 files changed, 19 insertions(+), 61 deletions(-)

diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index f7bf996..0e23e1d 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1548,9 +1548,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_enable(&main_bus_clk);
 
 	clk_enable(&iim_clk);
-	mx51_revision();
+	imx_print_silicon_rev("i.MX51", mx51_revision());
 	clk_disable(&iim_clk);
-	mx51_display_revision();
 
 	/* move usb_phy_clk to 24MHz */
 	clk_set_parent(&usb_phy1_clk, &osc_clk);
@@ -1592,9 +1591,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_enable(&main_bus_clk);
 
 	clk_enable(&iim_clk);
-	mx53_revision();
+	imx_print_silicon_rev("i.MX53", mx53_revision());
 	clk_disable(&iim_clk);
-	mx53_display_revision();
 
 	/* Set SDHC parents to be PLL2 */
 	clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 86f87da..df46967 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -18,7 +18,7 @@
 #include <mach/hardware.h>
 #include <asm/io.h>
 
-static int cpu_silicon_rev = -1;
+static int mx5_cpu_rev = -1;
 
 #define IIM_SREV 0x24
 #define MX50_HW_ADADIG_DIGPROG	0xB0
@@ -28,11 +28,14 @@ static int get_mx51_srev(void)
 	void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
 	u32 rev = readl(iim_base + IIM_SREV) & 0xff;
 
-	if (rev == 0x0)
+	switch (rev) {
+	case 0x0:
 		return IMX_CHIP_REVISION_2_0;
-	else if (rev == 0x10)
+	case 0x2:
 		return IMX_CHIP_REVISION_3_0;
-	return 0;
+	default:
+		return IMX_CHIP_REVISION_UNKNOWN;
+	}
 }
 
 /*
@@ -45,33 +48,13 @@ int mx51_revision(void)
 	if (!cpu_is_mx51())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx51_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx51_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx51_revision);
 
-void mx51_display_revision(void)
-{
-	int rev;
-	char *srev;
-	rev = mx51_revision();
-
-	switch (rev) {
-	case IMX_CHIP_REVISION_2_0:
-		srev = IMX_CHIP_REVISION_2_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_3_0:
-		srev = IMX_CHIP_REVISION_3_0_STRING;
-		break;
-	default:
-		srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
-	}
-	printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
-}
-EXPORT_SYMBOL(mx51_display_revision);
-
 #ifdef CONFIG_NEON
 
 /*
@@ -121,10 +104,10 @@ int mx53_revision(void)
 	if (!cpu_is_mx53())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx53_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx53_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx53_revision);
 
@@ -134,7 +117,7 @@ static int get_mx50_srev(void)
 	u32 rev;
 
 	if (!anatop) {
-		cpu_silicon_rev = -EINVAL;
+		mx5_cpu_rev = -EINVAL;
 		return 0;
 	}
 
@@ -159,36 +142,13 @@ int mx50_revision(void)
 	if (!cpu_is_mx50())
 		return -EINVAL;
 
-	if (cpu_silicon_rev == -1)
-		cpu_silicon_rev = get_mx50_srev();
+	if (mx5_cpu_rev == -1)
+		mx5_cpu_rev = get_mx50_srev();
 
-	return cpu_silicon_rev;
+	return mx5_cpu_rev;
 }
 EXPORT_SYMBOL(mx50_revision);
 
-void mx53_display_revision(void)
-{
-	int rev;
-	char *srev;
-	rev = mx53_revision();
-
-	switch (rev) {
-	case IMX_CHIP_REVISION_1_0:
-		srev = IMX_CHIP_REVISION_1_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_2_0:
-		srev = IMX_CHIP_REVISION_2_0_STRING;
-		break;
-	case IMX_CHIP_REVISION_2_1:
-		srev = IMX_CHIP_REVISION_2_1_STRING;
-		break;
-	default:
-		srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
-	}
-	printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
-}
-EXPORT_SYMBOL(mx53_display_revision);
-
 static int __init post_cpu_init(void)
 {
 	unsigned int reg;
-- 
1.7.4.1

[[PATCH v2 0/6] imx soc revision clean up

[Sascha Hauer]

On Wed, Aug 24, 2011 at 01:04:31PM +0800, Jason Liu wrote:
> The patchset make some clean up for the imx soc revision display by
> - introudce the generic function for displaying silicon revision
> - update the imx SoCs to adopt the same usage
> 
> The patchset is based on Fabio's initial commit and I did some update
> 
> V2: Address comments from Sascha
> - Remove the EXPORT_SYMBOL from imx_print_silicon_rev
> - Fix the mx31 print twice issue
> 
> Fabio Estevam (1):
>   ARM: imx: Introduce generic function for displaying silicon revision
> 
> Jason Liu (5):
>   ARM: mx25: Print silicon revision on boot
>   ARM: mx27: Print silicon revision on boot
>   ARM: mx31: use generic function for displaying silicon revision
>   ARM: mx35: use generic function for displaying silicon revision
>   ARM: mx5: use generic function for displaying silicon revision

Applied for next.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[[PATCH v2 4/6] ARM: mx31: use generic function for displaying silicon revision

[Fabio Estevam]

Jason,

On Wed, Aug 24, 2011 at 2:04 AM, Jason Liu <jason.hui@linaro.org> wrote:
> Update to use generic function for displaying silicon revision
>
> Tested on mx31pdk board as print the following information:
> CPU identified as i.MX31, silicon rev 2.8

2.8? There is no MX31 rev 2.8.

Regards,

Fabio Estevam

[[PATCH v2 6/6] ARM: mx5: use generic function for displaying silicon revision

[Sascha Hauer]

On Wed, Aug 24, 2011 at 01:04:37PM +0800, Jason Liu wrote:
> Update to use generic function for displaying silicon revision
> 
> Signed-off-by: Jason Liu <jason.hui@linaro.org>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  arch/arm/mach-mx5/clock-mx51-mx53.c |    6 +--
>  arch/arm/mach-mx5/cpu.c             |   74 ++++++++---------------------------
>  2 files changed, 19 insertions(+), 61 deletions(-)
> 
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index f7bf996..0e23e1d 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -1548,9 +1548,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
>  	clk_enable(&main_bus_clk);
>  
>  	clk_enable(&iim_clk);
> -	mx51_revision();
> +	imx_print_silicon_rev("i.MX51", mx51_revision());
>  	clk_disable(&iim_clk);
> -	mx51_display_revision();
>  
>  	/* move usb_phy_clk to 24MHz */
>  	clk_set_parent(&usb_phy1_clk, &osc_clk);
> @@ -1592,9 +1591,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
>  	clk_enable(&main_bus_clk);
>  
>  	clk_enable(&iim_clk);
> -	mx53_revision();
> +	imx_print_silicon_rev("i.MX53", mx53_revision());
>  	clk_disable(&iim_clk);
> -	mx53_display_revision();
>  
>  	/* Set SDHC parents to be PLL2 */
>  	clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
> diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
> index 86f87da..df46967 100644
> --- a/arch/arm/mach-mx5/cpu.c
> +++ b/arch/arm/mach-mx5/cpu.c
> @@ -18,7 +18,7 @@
>  #include <mach/hardware.h>
>  #include <asm/io.h>
>  
> -static int cpu_silicon_rev = -1;
> +static int mx5_cpu_rev = -1;
>  
>  #define IIM_SREV 0x24
>  #define MX50_HW_ADADIG_DIGPROG	0xB0
> @@ -28,11 +28,14 @@ static int get_mx51_srev(void)
>  	void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
>  	u32 rev = readl(iim_base + IIM_SREV) & 0xff;
>  
> -	if (rev == 0x0)
> +	switch (rev) {
> +	case 0x0:
>  		return IMX_CHIP_REVISION_2_0;
> -	else if (rev == 0x10)
> +	case 0x2:
>  		return IMX_CHIP_REVISION_3_0;

0x2 != 0x10

My babbage board now shows a unknown cpu revision.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[[PATCH v2 6/6] ARM: mx5: use generic function for displaying silicon revision

[Fabio Estevam]

Sascha,

On Thu, Aug 25, 2011 at 11:51 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:

>> - ? ? if (rev == 0x0)
>> + ? ? switch (rev) {
>> + ? ? case 0x0:
>> ? ? ? ? ? ? ? return IMX_CHIP_REVISION_2_0;
>> - ? ? else if (rev == 0x10)
>> + ? ? case 0x2:
>> ? ? ? ? ? ? ? return IMX_CHIP_REVISION_3_0;
>
> 0x2 != 0x10
>
> My babbage board now shows a unknown cpu revision.

Just sent a patch to fix this.

Regards,

Fabio Estevam

[[PATCH v2 0/6] imx soc revision clean up

[Jason Hui]

Hi, Sascha,

I have one update called V3 for this, could you please pick up this version.

Thank you very much!

Jason

[[PATCH v2 4/6] ARM: mx31: use generic function for displaying silicon revision

[Jason Hui]

Hi, Fabio,

On Thu, Aug 25, 2011 at 6:22 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Jason,
>
> On Wed, Aug 24, 2011 at 2:04 AM, Jason Liu <jason.hui@linaro.org> wrote:
>> Update to use generic function for displaying silicon revision
>>
>> Tested on mx31pdk board as print the following information:
>> CPU identified as i.MX31, silicon rev 2.8
>
> 2.8? There is no MX31 rev 2.8.

Fixed it in V3 version. Thanks.

Jason

>
> Regards,
>
> Fabio Estevam
>