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From: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
To: linuxppc-dev <linuxppc-dev@ozlabs.org>,
	Scott Wood <scottwood@freescale.com>, Willy Tarreau <w@1wt.eu>,
	Dan Malek <ppc6dev@digitaldans.com>
Subject: [PATCH 02/14] 8xx: Tag DAR with 0x00f0 to catch buggy instructions.
Date: Mon, 10 Oct 2011 13:30:08 +0200	[thread overview]
Message-ID: <1318246220-4839-3-git-send-email-Joakim.Tjernlund@transmode.se> (raw)
In-Reply-To: <1318246220-4839-1-git-send-email-Joakim.Tjernlund@transmode.se>

dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
This also fixes MachineCheck to pass DAR and DSISR as well.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
---
 arch/ppc/kernel/head_8xx.S |   18 +++++++++++++++++-
 1 files changed, 17 insertions(+), 1 deletions(-)

diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index ba05a57..57858ce 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -197,7 +197,17 @@ label:						\
 	STD_EXCEPTION(0x100, Reset, UnknownException)
 
 /* Machine check */
-	STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
+	. = 0x200
+MachineCheck:
+	EXCEPTION_PROLOG
+	mfspr	r20,DSISR
+	stw	r20,_DSISR(r21)
+	mfspr	r20,DAR
+	stw	r20,_DAR(r21)
+	li	r20,0x00f0
+	mtspr	DAR,r20	/* Tag DAR */
+	addi	r3,r1,STACK_FRAME_OVERHEAD
+	FINISH_EXCEPTION(MachineCheckException)
 
 /* Data access exception.
  * This is "never generated" by the MPC8xx.  We jump to it for other
@@ -211,6 +221,8 @@ DataAccess:
 	mr	r5,r20
 	mfspr	r4,DAR
 	stw	r4,_DAR(r21)
+	li	r20,0x00f0
+	mtspr	DAR,r20	/* Tag DAR */
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	li	r20,MSR_KERNEL
 	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
@@ -249,6 +261,8 @@ Alignment:
 	EXCEPTION_PROLOG
 	mfspr	r4,DAR
 	stw	r4,_DAR(r21)
+	li	r20,0x00f0
+	mtspr	DAR,r20	/* Tag DAR */
 	mfspr	r5,DSISR
 	stw	r5,_DSISR(r21)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
@@ -433,6 +447,7 @@ DataStoreTLBMiss:
 	 * of the MMU.
 	 */
 2:	li	r21, 0x00f0
+	mtspr	DAR, r21	/* Tag DAR */
 	rlwimi	r20, r21, 0, 24, 28	/* Set 24-27, clear 28 */
 	DO_8xx_CPU6(0x3d80, r3)
 	mtspr	MD_RPN, r20	/* Update TLB entry */
@@ -543,6 +558,7 @@ DataTLBError:
 	 * of the MMU.
 	 */
 	li	r21, 0x00f0
+	mtspr	DAR, r21	/* Tag DAR */
 	rlwimi	r20, r21, 0, 24, 28	/* Set 24-27, clear 28 */
 	DO_8xx_CPU6(0x3d80, r3)
 	mtspr	MD_RPN, r20	/* Update TLB entry */
-- 
1.7.3.4

  parent reply	other threads:[~2011-10-10 11:30 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-10 11:30 [PATCH 00/14] Backport 8xx TLB to 2.4 Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 01/14] 8xx: Use a macro to simpliy CPU6 errata code Joakim Tjernlund
2011-10-10 11:30 ` Joakim Tjernlund [this message]
2011-10-10 11:30 ` [PATCH 03/14] 8xx: invalidate non present TLBs Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 04/14] 8xx: Fix CONFIG_PIN_TLB Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 05/14] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 06/14] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 07/14] 8xx: CPU6 errata make DTLB error too big to fit Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 08/14] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 09/14] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 10/14] 8xx: Set correct HW pte flags in DTLB Error too Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 11/14] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 12/14] 8xx: Use symbolic constants in TLB asm Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 13/14] 8xx: Optimize TLB Miss handlers Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 14/14] 8xx: The TLB miss handler manages ACCESSED correctly Joakim Tjernlund
2011-10-10 12:30 ` [PATCH 00/14] Backport 8xx TLB to 2.4 Willy Tarreau
2011-12-11 17:19 ` Joakim Tjernlund
2011-12-11 17:33   ` Willy Tarreau
2012-02-08  8:44     ` Joakim Tjernlund
2012-02-08  9:44       ` Willy Tarreau
2012-02-08 11:39         ` Joakim Tjernlund
2012-02-08 12:26           ` Willy Tarreau
2012-04-09 13:08           ` Willy Tarreau

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