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From: Joakim Tjernlund <joakim.tjernlund@transmode.se>
To: Willy Tarreau <w@1wt.eu>
Cc: Scott Wood <scottwood@freescale.com>,
	linuxppc-dev <linuxppc-dev@ozlabs.org>,
	Dan Malek <ppc6dev@digitaldans.com>
Subject: Re: [PATCH 00/14] Backport 8xx TLB to 2.4
Date: Sun, 11 Dec 2011 18:19:54 +0100	[thread overview]
Message-ID: <OF6B6562C0.926C4B3C-ONC1257963.005F34B1-C1257963.005F34B2@transmode.se> (raw)
In-Reply-To: <20111010123020.GA21699@1wt.eu>

> To: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
> From: Willy Tarreau <w@1wt.eu>
>=20
> Hi Joakim,  On Mon, Oct 10, 2011 at 01:30:06PM +0200, Joakim Tjernlund wr=
ote: > This is a
> backport from 2.6 which I did to overcome 8xx CPU > bugs. 8xx does not up=
date the DAR register
> when taking a TLB > error caused by dcbX and icbi insns which makes it ve=
ry > tricky to use these
> insns. Also the dcbst wrongly sets the > the store bit when faulting into=
 DTLB error. > A few
> more bugs very found during development. >  > I know 2.4 is in strict mai=
ntenance mode and 8xx is
> obsolete > but as it is still in use I wanted 8xx to age with grace.  Tha=
nk you. I must admit I
> was hoping those patches would come in for a last release before the end =
of the year :-)  Unless
> there is any objection from anyone, I'll merge them when kernel.org is ba=
ck online.  Cheers,
> Willy

Did this go anywhere?

 Jocke  =
=

  parent reply	other threads:[~2011-12-11 17:20 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-10 11:30 [PATCH 00/14] Backport 8xx TLB to 2.4 Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 01/14] 8xx: Use a macro to simpliy CPU6 errata code Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 02/14] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 03/14] 8xx: invalidate non present TLBs Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 04/14] 8xx: Fix CONFIG_PIN_TLB Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 05/14] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 06/14] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 07/14] 8xx: CPU6 errata make DTLB error too big to fit Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 08/14] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 09/14] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 10/14] 8xx: Set correct HW pte flags in DTLB Error too Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 11/14] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 12/14] 8xx: Use symbolic constants in TLB asm Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 13/14] 8xx: Optimize TLB Miss handlers Joakim Tjernlund
2011-10-10 11:30 ` [PATCH 14/14] 8xx: The TLB miss handler manages ACCESSED correctly Joakim Tjernlund
2011-10-10 12:30 ` [PATCH 00/14] Backport 8xx TLB to 2.4 Willy Tarreau
2011-12-11 17:19 ` Joakim Tjernlund [this message]
2011-12-11 17:33   ` Willy Tarreau
2012-02-08  8:44     ` Joakim Tjernlund
2012-02-08  9:44       ` Willy Tarreau
2012-02-08 11:39         ` Joakim Tjernlund
2012-02-08 12:26           ` Willy Tarreau
2012-04-09 13:08           ` Willy Tarreau

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