* [PATCH] Allow aligned byte and word writes to IOAPIC registers.
@ 2011-11-22 16:09 Julian Stecklina
2011-11-23 10:47 ` Avi Kivity
0 siblings, 1 reply; 6+ messages in thread
From: Julian Stecklina @ 2011-11-22 16:09 UTC (permalink / raw)
To: KVM devel mailing list
This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.
Signed-off-by: Julian Stecklina <js@alien8.de>
---
virt/kvm/ioapic.c | 17 +++++++++++++----
1 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index 3eed61e..e94ef6ba 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
(void*)addr, len, val);
ASSERT(!(addr & 0xf)); /* check alignment */
- if (len == 4 || len == 8)
- data = *(u32 *) val;
- else {
+ switch (len) {
+ case 8:
+ case 4:
+ data = *(u32 *) val;
+ break;
+ case 2:
+ data = *(u16 *) val;
+ break;
+ case 1:
+ data = *(u8 *) val;
+ break;
+ default:
printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
return 0;
}
@@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
spin_lock(&ioapic->lock);
switch (addr) {
case IOAPIC_REG_SELECT:
- ioapic->ioregsel = data;
+ ioapic->ioregsel = data & 0xFF; /* 8-bit register */
break;
case IOAPIC_REG_WINDOW:
--
1.7.7.3
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] Allow aligned byte and word writes to IOAPIC registers.
2011-11-22 16:09 [PATCH] Allow aligned byte and word writes to IOAPIC registers Julian Stecklina
@ 2011-11-23 10:47 ` Avi Kivity
2011-11-23 11:05 ` Nadav Har'El
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Avi Kivity @ 2011-11-23 10:47 UTC (permalink / raw)
To: Julian Stecklina; +Cc: KVM devel mailing list
On 11/22/2011 06:09 PM, Julian Stecklina wrote:
> This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
> ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
> consistent with ioapic_mmio_read, which also allows byte and word accesses.
>
Your patch indents with spaces, while Linux uses tabs for indents.
> Signed-off-by: Julian Stecklina <js@alien8.de>
> ---
> virt/kvm/ioapic.c | 17 +++++++++++++----
> 1 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
> index 3eed61e..e94ef6ba 100644
> --- a/virt/kvm/ioapic.c
> +++ b/virt/kvm/ioapic.c
> @@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
> (void*)addr, len, val);
> ASSERT(!(addr & 0xf)); /* check alignment */
>
> - if (len == 4 || len == 8)
> - data = *(u32 *) val;
> - else {
> + switch (len) {
> + case 8:
> + case 4:
> + data = *(u32 *) val;
> + break;
> + case 2:
> + data = *(u16 *) val;
> + break;
> + case 1:
> + data = *(u8 *) val;
> + break;
> + default:
> printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
> return 0;
> }
> @@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
> spin_lock(&ioapic->lock);
> switch (addr) {
> case IOAPIC_REG_SELECT:
> - ioapic->ioregsel = data;
> + ioapic->ioregsel = data & 0xFF; /* 8-bit register */
> break;
>
> case IOAPIC_REG_WINDOW:
This is a bit over-permissive in that it allows 8-byte writes to the
IOWIN register. I guess it's okay though.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Allow aligned byte and word writes to IOAPIC registers.
2011-11-23 10:47 ` Avi Kivity
@ 2011-11-23 11:05 ` Nadav Har'El
2011-11-23 12:29 ` Julian Stecklina
2011-11-23 12:54 ` [PATCHv2] KVM: " Julian Stecklina
2 siblings, 0 replies; 6+ messages in thread
From: Nadav Har'El @ 2011-11-23 11:05 UTC (permalink / raw)
To: Avi Kivity; +Cc: Julian Stecklina, KVM devel mailing list
On Wed, Nov 23, 2011, Avi Kivity wrote about "Re: [PATCH] Allow aligned byte and word writes to IOAPIC registers.":
> On 11/22/2011 06:09 PM, Julian Stecklina wrote:
> > This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
> > ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
> > consistent with ioapic_mmio_read, which also allows byte and word accesses.
> >
>
> Your patch indents with spaces, while Linux uses tabs for indents.
You might want to run scripts/checkpatch.pl on your patches before
sending them - this will catch this and many other stylistic faux pas.
--
Nadav Har'El | Wednesday, Nov 23 2011,
nyh@math.technion.ac.il |-----------------------------------------
Phone +972-523-790466, ICQ 13349191 |Why do doctors call what they do
http://nadav.harel.org.il |practice? Think about it.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Allow aligned byte and word writes to IOAPIC registers.
2011-11-23 10:47 ` Avi Kivity
2011-11-23 11:05 ` Nadav Har'El
@ 2011-11-23 12:29 ` Julian Stecklina
2011-11-23 12:54 ` [PATCHv2] KVM: " Julian Stecklina
2 siblings, 0 replies; 6+ messages in thread
From: Julian Stecklina @ 2011-11-23 12:29 UTC (permalink / raw)
To: Avi Kivity; +Cc: KVM devel mailing list
On Mi, 2011-11-23 at 12:47 +0200, Avi Kivity wrote:
> On 11/22/2011 06:09 PM, Julian Stecklina wrote:
> > This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
> > ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
> > consistent with ioapic_mmio_read, which also allows byte and word accesses.
> >
>
> Your patch indents with spaces, while Linux uses tabs for indents.
True. I'll post a revised version in a minute. I think this is my second
patch to Linux in total, so I am slowly getting there... Thanks for the
patience.
Regards, Julian
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCHv2] KVM: Allow aligned byte and word writes to IOAPIC registers.
2011-11-23 10:47 ` Avi Kivity
2011-11-23 11:05 ` Nadav Har'El
2011-11-23 12:29 ` Julian Stecklina
@ 2011-11-23 12:54 ` Julian Stecklina
2011-11-27 12:26 ` Avi Kivity
2 siblings, 1 reply; 6+ messages in thread
From: Julian Stecklina @ 2011-11-23 12:54 UTC (permalink / raw)
To: kvm; +Cc: Julian Stecklina
This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.
Signed-off-by: Julian Stecklina <js@alien8.de>
---
virt/kvm/ioapic.c | 15 ++++++++++++---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index 3eed61e..71e2253 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
(void*)addr, len, val);
ASSERT(!(addr & 0xf)); /* check alignment */
- if (len == 4 || len == 8)
+ switch (len) {
+ case 8:
+ case 4:
data = *(u32 *) val;
- else {
+ break;
+ case 2:
+ data = *(u16 *) val;
+ break;
+ case 1:
+ data = *(u8 *) val;
+ break;
+ default:
printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
return 0;
}
@@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
spin_lock(&ioapic->lock);
switch (addr) {
case IOAPIC_REG_SELECT:
- ioapic->ioregsel = data;
+ ioapic->ioregsel = data & 0xFF; /* 8-bit register */
break;
case IOAPIC_REG_WINDOW:
--
1.7.7.3
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCHv2] KVM: Allow aligned byte and word writes to IOAPIC registers.
2011-11-23 12:54 ` [PATCHv2] KVM: " Julian Stecklina
@ 2011-11-27 12:26 ` Avi Kivity
0 siblings, 0 replies; 6+ messages in thread
From: Avi Kivity @ 2011-11-27 12:26 UTC (permalink / raw)
To: Julian Stecklina; +Cc: kvm
On 11/23/2011 02:54 PM, Julian Stecklina wrote:
> This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
> ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
> consistent with ioapic_mmio_read, which also allows byte and word accesses.
>
Applied, thanks.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2011-11-27 12:26 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-11-22 16:09 [PATCH] Allow aligned byte and word writes to IOAPIC registers Julian Stecklina
2011-11-23 10:47 ` Avi Kivity
2011-11-23 11:05 ` Nadav Har'El
2011-11-23 12:29 ` Julian Stecklina
2011-11-23 12:54 ` [PATCHv2] KVM: " Julian Stecklina
2011-11-27 12:26 ` Avi Kivity
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.