* [PATCH v6 0/3] OMAP4: support PMU
@ 2011-11-26 2:53 ` ming.lei at canonical.com
0 siblings, 0 replies; 8+ messages in thread
From: ming.lei @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux, will.deacon, tony; +Cc: linux-arm-kernel, linux-omap, khilman, paul
Hi,
These 3 patches are against -next tree and Benoit's debugss
hwmod patch, so pmu irq on OMAP4 can be routed OK to CPU
with these patches, and perf can work well on OMAP4 now.
[1], http://marc.info/?l=linux-arm-kernel&m=132162120904916&w=2
thanks,
--
Ming Lei
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v6 0/3] OMAP4: support PMU
@ 2011-11-26 2:53 ` ming.lei at canonical.com
0 siblings, 0 replies; 8+ messages in thread
From: ming.lei at canonical.com @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
These 3 patches are against -next tree and Benoit's debugss
hwmod patch, so pmu irq on OMAP4 can be routed OK to CPU
with these patches, and perf can work well on OMAP4 now.
[1], http://marc.info/?l=linux-arm-kernel&m=132162120904916&w=2
thanks,
--
Ming Lei
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v6 1/3] arm: omap4: create pmu device via hwmod
2011-11-26 2:53 ` ming.lei at canonical.com
@ 2011-11-26 2:53 ` ming.lei at canonical.com
-1 siblings, 0 replies; 8+ messages in thread
From: ming.lei @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux, will.deacon, tony
Cc: linux-arm-kernel, linux-omap, khilman, paul, Ming Lei
From: Ming Lei <ming.lei@canonical.com>
The following modules is required to be enabled before configuring
cross trigger interface for enabling pmu irq:
l3_instr, l3_main_3, debugss
so build the arm-pmu device via the three hwmods.
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 61 ++++++++++++++++++++++++++++++++++++++---
1 files changed, 57 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0f8e0eb..6e16274 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -384,14 +384,67 @@ static struct platform_device omap_pmu_device = {
.num_resources = 1,
};
-static void omap_init_pmu(void)
+static struct arm_pmu_platdata omap4_pmu_data;
+static struct omap_device_pm_latency omap_pmu_latency[] = {
+ [0] = {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+};
+
+static struct platform_device* __init omap4_init_pmu(void)
{
- if (cpu_is_omap24xx())
+ int id = -1;
+ const char *hw;
+ struct platform_device *pd;
+ struct omap_hwmod* oh[3];
+ char *dev_name = "arm-pmu";
+
+ hw = "l3_main_3";
+ oh[0] = omap_hwmod_lookup(hw);
+ if (!oh[0]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+ hw = "l3_instr";
+ oh[1] = omap_hwmod_lookup(hw);
+ if (!oh[1]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+ hw = "debugss";
+ oh[2] = omap_hwmod_lookup(hw);
+ if (!oh[2]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+
+ pd = omap_device_build_ss(dev_name, id, oh, 3, &omap4_pmu_data,
+ sizeof(omap4_pmu_data),
+ omap_pmu_latency,
+ ARRAY_SIZE(omap_pmu_latency), 0);
+ WARN(IS_ERR(pd), "Can't build omap_device for %s.\n",
+ dev_name);
+ return pd;
+}
+static void __init omap_init_pmu(void)
+{
+ if (cpu_is_omap24xx()) {
omap_pmu_device.resource = &omap2_pmu_resource;
- else if (cpu_is_omap34xx())
+ } else if (cpu_is_omap34xx()) {
omap_pmu_device.resource = &omap3_pmu_resource;
- else
+ } else if (cpu_is_omap44xx()) {
+ struct platform_device *pd;
+
+ pd = omap4_init_pmu();
+ if (!pd)
+ return;
+ omap_device_enable(pd);
+ return;
+ } else {
return;
+ }
platform_device_register(&omap_pmu_device);
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v6 1/3] arm: omap4: create pmu device via hwmod
@ 2011-11-26 2:53 ` ming.lei at canonical.com
0 siblings, 0 replies; 8+ messages in thread
From: ming.lei at canonical.com @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Ming Lei <ming.lei@canonical.com>
The following modules is required to be enabled before configuring
cross trigger interface for enabling pmu irq:
l3_instr, l3_main_3, debugss
so build the arm-pmu device via the three hwmods.
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 61 ++++++++++++++++++++++++++++++++++++++---
1 files changed, 57 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0f8e0eb..6e16274 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -384,14 +384,67 @@ static struct platform_device omap_pmu_device = {
.num_resources = 1,
};
-static void omap_init_pmu(void)
+static struct arm_pmu_platdata omap4_pmu_data;
+static struct omap_device_pm_latency omap_pmu_latency[] = {
+ [0] = {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+};
+
+static struct platform_device* __init omap4_init_pmu(void)
{
- if (cpu_is_omap24xx())
+ int id = -1;
+ const char *hw;
+ struct platform_device *pd;
+ struct omap_hwmod* oh[3];
+ char *dev_name = "arm-pmu";
+
+ hw = "l3_main_3";
+ oh[0] = omap_hwmod_lookup(hw);
+ if (!oh[0]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+ hw = "l3_instr";
+ oh[1] = omap_hwmod_lookup(hw);
+ if (!oh[1]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+ hw = "debugss";
+ oh[2] = omap_hwmod_lookup(hw);
+ if (!oh[2]) {
+ pr_err("Could not look up %s hwmod\n", hw);
+ return NULL;
+ }
+
+ pd = omap_device_build_ss(dev_name, id, oh, 3, &omap4_pmu_data,
+ sizeof(omap4_pmu_data),
+ omap_pmu_latency,
+ ARRAY_SIZE(omap_pmu_latency), 0);
+ WARN(IS_ERR(pd), "Can't build omap_device for %s.\n",
+ dev_name);
+ return pd;
+}
+static void __init omap_init_pmu(void)
+{
+ if (cpu_is_omap24xx()) {
omap_pmu_device.resource = &omap2_pmu_resource;
- else if (cpu_is_omap34xx())
+ } else if (cpu_is_omap34xx()) {
omap_pmu_device.resource = &omap3_pmu_resource;
- else
+ } else if (cpu_is_omap44xx()) {
+ struct platform_device *pd;
+
+ pd = omap4_init_pmu();
+ if (!pd)
+ return;
+ omap_device_enable(pd);
+ return;
+ } else {
return;
+ }
platform_device_register(&omap_pmu_device);
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v6 2/3] arm: omap4: support pmu
2011-11-26 2:53 ` ming.lei at canonical.com
@ 2011-11-26 2:53 ` ming.lei at canonical.com
-1 siblings, 0 replies; 8+ messages in thread
From: ming.lei @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux, will.deacon, tony
Cc: linux-arm-kernel, linux-omap, khilman, paul, Ming Lei, Woodruff Richard
From: Ming Lei <ming.lei@canonical.com>
This patch supports pmu irq routed from CTI, so
make pmu/perf working on OMAP4.
The idea is from Woodruff Richard in the disscussion
about "Oprofile on Pandaboard / Omap4" on pandaboard@googlegroups.com.
Acked-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Woodruff Richard <r-woodruff2@ti.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 60 +++++++++++++++++++++++++++-
arch/arm/plat-omap/include/plat/omap44xx.h | 3 +
2 files changed, 62 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 6e16274..bc791e0 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -23,6 +23,7 @@
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/pmu.h>
+#include <asm/cti.h>
#include <plat/tc.h>
#include <plat/board.h>
@@ -393,6 +394,57 @@ static struct omap_device_pm_latency omap_pmu_latency[] = {
},
};
+static struct cti omap4_cti[2];
+
+static void omap4_enable_cti(int irq)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_enable(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_enable(&omap4_cti[1]);
+}
+
+static void omap4_disable_cti(int irq)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_disable(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_disable(&omap4_cti[1]);
+}
+
+static irqreturn_t omap4_pmu_handler(int irq, void *dev, irq_handler_t handler)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_irq_ack(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_irq_ack(&omap4_cti[1]);
+
+ return handler(irq, dev);
+}
+
+static void __init omap4_configure_pmu_irq(void)
+{
+ void __iomem *base0;
+ void __iomem *base1;
+
+ base0 = ioremap(OMAP44XX_CTI0_BASE, SZ_4K);
+ base1 = ioremap(OMAP44XX_CTI1_BASE, SZ_4K);
+ if (!base0 && !base1) {
+ pr_err("ioremap for OMAP4 CTI failed\n");
+ return;
+ }
+
+ /*configure CTI0 for pmu irq routing*/
+ cti_init(&omap4_cti[0], base0, OMAP44XX_IRQ_CTI0, 6);
+ cti_unlock(&omap4_cti[0]);
+ cti_map_trigger(&omap4_cti[0], 1, 6, 2);
+
+ /*configure CTI1 for pmu irq routing*/
+ cti_init(&omap4_cti[1], base1, OMAP44XX_IRQ_CTI1, 6);
+ cti_unlock(&omap4_cti[1]);
+ cti_map_trigger(&omap4_cti[1], 1, 6, 2);
+}
+
static struct platform_device* __init omap4_init_pmu(void)
{
int id = -1;
@@ -420,6 +472,10 @@ static struct platform_device* __init omap4_init_pmu(void)
return NULL;
}
+ omap4_pmu_data.handle_irq = omap4_pmu_handler;
+ omap4_pmu_data.enable_irq = omap4_enable_cti;
+ omap4_pmu_data.disable_irq = omap4_disable_cti;
+
pd = omap_device_build_ss(dev_name, id, oh, 3, &omap4_pmu_data,
sizeof(omap4_pmu_data),
omap_pmu_latency,
@@ -440,7 +496,9 @@ static void __init omap_init_pmu(void)
pd = omap4_init_pmu();
if (!pd)
return;
- omap_device_enable(pd);
+
+ omap_device_enable(&od->pdev);
+ omap4_configure_pmu_irq();
return;
} else {
return;
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6..4637980 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -57,5 +57,8 @@
#define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800)
#define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00)
+#define OMAP44XX_CTI0_BASE 0x54148000
+#define OMAP44XX_CTI1_BASE 0x54149000
+
#endif /* __ASM_ARCH_OMAP44XX_H */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v6 2/3] arm: omap4: support pmu
@ 2011-11-26 2:53 ` ming.lei at canonical.com
0 siblings, 0 replies; 8+ messages in thread
From: ming.lei at canonical.com @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Ming Lei <ming.lei@canonical.com>
This patch supports pmu irq routed from CTI, so
make pmu/perf working on OMAP4.
The idea is from Woodruff Richard in the disscussion
about "Oprofile on Pandaboard / Omap4" on pandaboard at googlegroups.com.
Acked-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Woodruff Richard <r-woodruff2@ti.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 60 +++++++++++++++++++++++++++-
arch/arm/plat-omap/include/plat/omap44xx.h | 3 +
2 files changed, 62 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 6e16274..bc791e0 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -23,6 +23,7 @@
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/pmu.h>
+#include <asm/cti.h>
#include <plat/tc.h>
#include <plat/board.h>
@@ -393,6 +394,57 @@ static struct omap_device_pm_latency omap_pmu_latency[] = {
},
};
+static struct cti omap4_cti[2];
+
+static void omap4_enable_cti(int irq)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_enable(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_enable(&omap4_cti[1]);
+}
+
+static void omap4_disable_cti(int irq)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_disable(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_disable(&omap4_cti[1]);
+}
+
+static irqreturn_t omap4_pmu_handler(int irq, void *dev, irq_handler_t handler)
+{
+ if (irq == OMAP44XX_IRQ_CTI0)
+ cti_irq_ack(&omap4_cti[0]);
+ else if (irq == OMAP44XX_IRQ_CTI1)
+ cti_irq_ack(&omap4_cti[1]);
+
+ return handler(irq, dev);
+}
+
+static void __init omap4_configure_pmu_irq(void)
+{
+ void __iomem *base0;
+ void __iomem *base1;
+
+ base0 = ioremap(OMAP44XX_CTI0_BASE, SZ_4K);
+ base1 = ioremap(OMAP44XX_CTI1_BASE, SZ_4K);
+ if (!base0 && !base1) {
+ pr_err("ioremap for OMAP4 CTI failed\n");
+ return;
+ }
+
+ /*configure CTI0 for pmu irq routing*/
+ cti_init(&omap4_cti[0], base0, OMAP44XX_IRQ_CTI0, 6);
+ cti_unlock(&omap4_cti[0]);
+ cti_map_trigger(&omap4_cti[0], 1, 6, 2);
+
+ /*configure CTI1 for pmu irq routing*/
+ cti_init(&omap4_cti[1], base1, OMAP44XX_IRQ_CTI1, 6);
+ cti_unlock(&omap4_cti[1]);
+ cti_map_trigger(&omap4_cti[1], 1, 6, 2);
+}
+
static struct platform_device* __init omap4_init_pmu(void)
{
int id = -1;
@@ -420,6 +472,10 @@ static struct platform_device* __init omap4_init_pmu(void)
return NULL;
}
+ omap4_pmu_data.handle_irq = omap4_pmu_handler;
+ omap4_pmu_data.enable_irq = omap4_enable_cti;
+ omap4_pmu_data.disable_irq = omap4_disable_cti;
+
pd = omap_device_build_ss(dev_name, id, oh, 3, &omap4_pmu_data,
sizeof(omap4_pmu_data),
omap_pmu_latency,
@@ -440,7 +496,9 @@ static void __init omap_init_pmu(void)
pd = omap4_init_pmu();
if (!pd)
return;
- omap_device_enable(pd);
+
+ omap_device_enable(&od->pdev);
+ omap4_configure_pmu_irq();
return;
} else {
return;
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6..4637980 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -57,5 +57,8 @@
#define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800)
#define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00)
+#define OMAP44XX_CTI0_BASE 0x54148000
+#define OMAP44XX_CTI1_BASE 0x54149000
+
#endif /* __ASM_ARCH_OMAP44XX_H */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v6 3/3] arm: omap4: pmu: support runtime pm
2011-11-26 2:53 ` ming.lei at canonical.com
@ 2011-11-26 2:53 ` ming.lei at canonical.com
-1 siblings, 0 replies; 8+ messages in thread
From: ming.lei @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux, will.deacon, tony
Cc: linux-arm-kernel, linux-omap, khilman, paul, Ming Lei
From: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index bc791e0..ab4de0d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -17,6 +17,7 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/of.h>
+#include <linux/pm_runtime.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
@@ -395,9 +396,11 @@ static struct omap_device_pm_latency omap_pmu_latency[] = {
};
static struct cti omap4_cti[2];
+static struct platform_device *pmu_dev;
static void omap4_enable_cti(int irq)
{
+ pm_runtime_get_sync(&pmu_dev->dev);
if (irq == OMAP44XX_IRQ_CTI0)
cti_enable(&omap4_cti[0]);
else if (irq == OMAP44XX_IRQ_CTI1)
@@ -410,6 +413,7 @@ static void omap4_disable_cti(int irq)
cti_disable(&omap4_cti[0]);
else if (irq == OMAP44XX_IRQ_CTI1)
cti_disable(&omap4_cti[1]);
+ pm_runtime_put(&pmu_dev->dev);
}
static irqreturn_t omap4_pmu_handler(int irq, void *dev, irq_handler_t handler)
@@ -497,8 +501,11 @@ static void __init omap_init_pmu(void)
if (!pd)
return;
- omap_device_enable(&od->pdev);
+ pmu_dev= pd;
+ pm_runtime_enable(&pd->dev);
+ pm_runtime_get_sync(&pd->dev);
omap4_configure_pmu_irq();
+ pm_runtime_put(&pd->dev);
return;
} else {
return;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v6 3/3] arm: omap4: pmu: support runtime pm
@ 2011-11-26 2:53 ` ming.lei at canonical.com
0 siblings, 0 replies; 8+ messages in thread
From: ming.lei at canonical.com @ 2011-11-26 2:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
---
arch/arm/mach-omap2/devices.c | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index bc791e0..ab4de0d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -17,6 +17,7 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/of.h>
+#include <linux/pm_runtime.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
@@ -395,9 +396,11 @@ static struct omap_device_pm_latency omap_pmu_latency[] = {
};
static struct cti omap4_cti[2];
+static struct platform_device *pmu_dev;
static void omap4_enable_cti(int irq)
{
+ pm_runtime_get_sync(&pmu_dev->dev);
if (irq == OMAP44XX_IRQ_CTI0)
cti_enable(&omap4_cti[0]);
else if (irq == OMAP44XX_IRQ_CTI1)
@@ -410,6 +413,7 @@ static void omap4_disable_cti(int irq)
cti_disable(&omap4_cti[0]);
else if (irq == OMAP44XX_IRQ_CTI1)
cti_disable(&omap4_cti[1]);
+ pm_runtime_put(&pmu_dev->dev);
}
static irqreturn_t omap4_pmu_handler(int irq, void *dev, irq_handler_t handler)
@@ -497,8 +501,11 @@ static void __init omap_init_pmu(void)
if (!pd)
return;
- omap_device_enable(&od->pdev);
+ pmu_dev= pd;
+ pm_runtime_enable(&pd->dev);
+ pm_runtime_get_sync(&pd->dev);
omap4_configure_pmu_irq();
+ pm_runtime_put(&pd->dev);
return;
} else {
return;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
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2011-11-26 2:53 [PATCH v6 0/3] OMAP4: support PMU ming.lei
2011-11-26 2:53 ` ming.lei at canonical.com
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2011-11-26 2:53 ` ming.lei at canonical.com
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