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* [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
@ 2011-12-22 21:01 ` Stephen Warren
  0 siblings, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2011-12-22 21:01 UTC (permalink / raw)
  To: Olof Johansson, Colin Cross
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA, Stephen Warren

On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
time, and program the correct divisor.

This makes uncompressor messages work correctly on Tegra30. This also
fixes early printk, assuming zImage is used and this setup code runs.

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/mach-tegra/include/mach/uncompress.h |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4e83237..61d6e08 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -24,6 +24,8 @@
 #include <linux/types.h>
 #include <linux/serial_reg.h>
 
+#include <asm/hardware/gic.h>
+
 #include <mach/iomap.h>
 
 static void putc(int c)
@@ -45,15 +47,29 @@ static inline void flush(void)
 
 static inline void arch_decomp_setup(void)
 {
+	u8 *distctr = (u8 *)(TEGRA_ARM_INT_DIST_BASE +
+			     GIC_DIST_CTR);
+	u32 ctlrs, div;
 	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
 	int shift = 2;
 
 	if (uart == NULL)
 		return;
 
+	/*
+	 * Tegra20 has 4 interrupt controllers
+	 * Tegra30 has 5 interrupt controllers
+	 * Future SoCs may need additional means of identification
+	 */
+	ctlrs = (*distctr) & 0x1f;
+	if (ctlrs == 4)
+		div = 0x0075;
+	else
+		div = 0x00dd;
+
 	uart[UART_LCR << shift] |= UART_LCR_DLAB;
-	uart[UART_DLL << shift] = 0x75;
-	uart[UART_DLM << shift] = 0x0;
+	uart[UART_DLL << shift] = div & 0xff;
+	uart[UART_DLM << shift] = div >> 8;
 	uart[UART_LCR << shift] = 3;
 }
 
-- 
1.7.0.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
@ 2011-12-22 21:01 ` Stephen Warren
  0 siblings, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2011-12-22 21:01 UTC (permalink / raw)
  To: linux-arm-kernel

On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
time, and program the correct divisor.

This makes uncompressor messages work correctly on Tegra30. This also
fixes early printk, assuming zImage is used and this setup code runs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/include/mach/uncompress.h |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 4e83237..61d6e08 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -24,6 +24,8 @@
 #include <linux/types.h>
 #include <linux/serial_reg.h>
 
+#include <asm/hardware/gic.h>
+
 #include <mach/iomap.h>
 
 static void putc(int c)
@@ -45,15 +47,29 @@ static inline void flush(void)
 
 static inline void arch_decomp_setup(void)
 {
+	u8 *distctr = (u8 *)(TEGRA_ARM_INT_DIST_BASE +
+			     GIC_DIST_CTR);
+	u32 ctlrs, div;
 	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
 	int shift = 2;
 
 	if (uart == NULL)
 		return;
 
+	/*
+	 * Tegra20 has 4 interrupt controllers
+	 * Tegra30 has 5 interrupt controllers
+	 * Future SoCs may need additional means of identification
+	 */
+	ctlrs = (*distctr) & 0x1f;
+	if (ctlrs == 4)
+		div = 0x0075;
+	else
+		div = 0x00dd;
+
 	uart[UART_LCR << shift] |= UART_LCR_DLAB;
-	uart[UART_DLL << shift] = 0x75;
-	uart[UART_DLM << shift] = 0x0;
+	uart[UART_DLL << shift] = div & 0xff;
+	uart[UART_DLM << shift] = div >> 8;
 	uart[UART_LCR << shift] = 3;
 }
 
-- 
1.7.0.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
  2011-12-22 21:01 ` Stephen Warren
@ 2011-12-26 10:51     ` Sergei Shtylyov
  -1 siblings, 0 replies; 6+ messages in thread
From: Sergei Shtylyov @ 2011-12-26 10:51 UTC (permalink / raw)
  To: Stephen Warren
  Cc: Olof Johansson, Colin Cross, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r

Hello.

On 23-12-2011 1:01, Stephen Warren wrote:

> On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
> 408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
> time, and program the correct divisor.

> This makes uncompressor messages work correctly on Tegra30. This also
> fixes early printk, assuming zImage is used and this setup code runs.

> Signed-off-by: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>   arch/arm/mach-tegra/include/mach/uncompress.h |   20 ++++++++++++++++++--
>   1 files changed, 18 insertions(+), 2 deletions(-)

> diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
> index 4e83237..61d6e08 100644
> --- a/arch/arm/mach-tegra/include/mach/uncompress.h
> +++ b/arch/arm/mach-tegra/include/mach/uncompress.h
[...]
> @@ -45,15 +47,29 @@ static inline void flush(void)
>
>   static inline void arch_decomp_setup(void)
>   {
> +	u8 *distctr = (u8 *)(TEGRA_ARM_INT_DIST_BASE +
> +			     GIC_DIST_CTR);
> +	u32 ctlrs, div;
>   	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
>   	int shift = 2;
>
>   	if (uart == NULL)
>   		return;
>
> +	/*
> +	 * Tegra20 has 4 interrupt controllers
> +	 * Tegra30 has 5 interrupt controllers
> +	 * Future SoCs may need additional means of identification
> +	 */
> +	ctlrs = (*distctr) & 0x1f;

    () not necessary.

WBR, Sergei

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
@ 2011-12-26 10:51     ` Sergei Shtylyov
  0 siblings, 0 replies; 6+ messages in thread
From: Sergei Shtylyov @ 2011-12-26 10:51 UTC (permalink / raw)
  To: linux-arm-kernel

Hello.

On 23-12-2011 1:01, Stephen Warren wrote:

> On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
> 408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
> time, and program the correct divisor.

> This makes uncompressor messages work correctly on Tegra30. This also
> fixes early printk, assuming zImage is used and this setup code runs.

> Signed-off-by: Stephen Warren<swarren@nvidia.com>
> ---
>   arch/arm/mach-tegra/include/mach/uncompress.h |   20 ++++++++++++++++++--
>   1 files changed, 18 insertions(+), 2 deletions(-)

> diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
> index 4e83237..61d6e08 100644
> --- a/arch/arm/mach-tegra/include/mach/uncompress.h
> +++ b/arch/arm/mach-tegra/include/mach/uncompress.h
[...]
> @@ -45,15 +47,29 @@ static inline void flush(void)
>
>   static inline void arch_decomp_setup(void)
>   {
> +	u8 *distctr = (u8 *)(TEGRA_ARM_INT_DIST_BASE +
> +			     GIC_DIST_CTR);
> +	u32 ctlrs, div;
>   	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
>   	int shift = 2;
>
>   	if (uart == NULL)
>   		return;
>
> +	/*
> +	 * Tegra20 has 4 interrupt controllers
> +	 * Tegra30 has 5 interrupt controllers
> +	 * Future SoCs may need additional means of identification
> +	 */
> +	ctlrs = (*distctr) & 0x1f;

    () not necessary.

WBR, Sergei

^ permalink raw reply	[flat|nested] 6+ messages in thread
* RE: [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
  2011-12-22 21:01 ` Stephen Warren
@ 2012-01-03 18:03     ` Stephen Warren
  -1 siblings, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2012-01-03 18:03 UTC (permalink / raw)
  To: Stephen Warren, Olof Johansson, Colin Cross
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA

Stephen Warren wrote at Thursday, December 22, 2011 2:02 PM:
> On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
> 408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
> time, and program the correct divisor.
> 
> This makes uncompressor messages work correctly on Tegra30. This also
> fixes early printk, assuming zImage is used and this setup code runs.

I'll be posting a V2 for this patch soon; I'll rework it to use Tegra's
CHIPID register instead of a random GIC register, which should make the
code a little more future-proof.

-- 
nvpublic

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup
@ 2012-01-03 18:03     ` Stephen Warren
  0 siblings, 0 replies; 6+ messages in thread
From: Stephen Warren @ 2012-01-03 18:03 UTC (permalink / raw)
  To: linux-arm-kernel

Stephen Warren wrote at Thursday, December 22, 2011 2:02 PM:
> On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
> 408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
> time, and program the correct divisor.
> 
> This makes uncompressor messages work correctly on Tegra30. This also
> fixes early printk, assuming zImage is used and this setup code runs.

I'll be posting a V2 for this patch soon; I'll rework it to use Tegra's
CHIPID register instead of a random GIC register, which should make the
code a little more future-proof.

-- 
nvpublic

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-01-03 18:03 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-12-22 21:01 [PATCH] arm/tegra: Support Tegra30 in decompressor UART setup Stephen Warren
2011-12-22 21:01 ` Stephen Warren
     [not found] ` <1324587719-32731-1-git-send-email-swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2011-12-26 10:51   ` Sergei Shtylyov
2011-12-26 10:51     ` Sergei Shtylyov
2012-01-03 18:03   ` Stephen Warren
2012-01-03 18:03     ` Stephen Warren

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