From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Devicetree Discuss <devicetree-discuss@lists.ozlabs.org>, Jerry Van Baren <vanbaren@cideas.com>, Tom Warren <twarren@nvidia.com> Subject: [PATCH 3/6] tegra: fdt: Add NAND controller binding and definitions Date: Fri, 13 Jan 2012 15:10:53 -0800 [thread overview] Message-ID: <1326496256-5559-4-git-send-email-sjg@chromium.org> (raw) In-Reply-To: <1326496256-5559-1-git-send-email-sjg@chromium.org> Add a NAND controller along with a bindings file for review. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/arm/dts/tegra20.dtsi | 7 ++- doc/device-tree-bindings/nand/nvidia-nand.txt | 68 +++++++++++++++++++++++++ 2 files changed, 74 insertions(+), 1 deletions(-) create mode 100644 doc/device-tree-bindings/nand/nvidia-nand.txt diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index c009f16..33d6972 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -210,5 +210,10 @@ reg = <0x7000f400 0x200>; }; + nand: nand-controller@0x70008000 { + #address-cells = <0>; + #size-cells = <0>; + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + }; }; - diff --git a/doc/device-tree-bindings/nand/nvidia-nand.txt b/doc/device-tree-bindings/nand/nvidia-nand.txt new file mode 100644 index 0000000..3674cf3 --- /dev/null +++ b/doc/device-tree-bindings/nand/nvidia-nand.txt @@ -0,0 +1,68 @@ +NAND Flash +---------- + +(there isn't yet a generic binding in Linux, so this describes what is in +U-Boot) + +The device node for a NAND flash device is as described in the document +"Open Firmware Recommended Practice : Universal Serial Bus" with the +following modifications and additions : + +Required properties : + - compatible : Should be "manufacture,device", "nand-flash" + - page-data-bytes : Number of bytes in the data area + - page-spare-bytes : * Number of bytes in spare area + spare area = skipped-spare-bytes + data-ecc-bytes + tag-bytes + + tag-ecc-bytes + - skipped-spare-bytes : Number of bytes to skip at start of spare area + (these are typically used for bad block maintenance) + - data-ecc-bytes : Number of ECC bytes for data area + - tag-bytes :Number of tag bytes in spare area + - tag-ecc-bytes : Number ECC bytes to be generated for tag bytes + +(replace -bytes with -size or -length?) + +This node should sit inside its controller. + + +Nvidia NAND Controller +---------------------- + +The device node for a NAND flash controller is as described in the document +"Open Firmware Recommended Practice : Universal Serial Bus" with the +following modifications and additions : + +Optional properties: + +wp-gpio : GPIO of write-protect line, three cells in the format: + phandle, parameter, flags +width : bus width of the NAND device in bits + +For now here is something specific to the Nvidia controller, with naming +based on Nvidia's original (non-fdt) NAND driver: + + - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns. + Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH), + TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL + + MAX_TRP_TREA is: + non-EDO mode: Max(tRP, tREA) + 6ns + EDO mode: tRP timing + +Example: + +nand-controller@0x70008000 { + compatible = "nvidia,tegra20-nand"; + wp-gpios = <&gpio 59 0>; /* PH3 */ + width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + nand@0 { + compatible = "hynix,hy27uf4g2b", "nand-flash"; + page-data-bytes = <2048>; + tag-ecc-bytes = <4>; + tag-bytes = <20>; + data-ecc-bytes = <36>; + skipped-spare-bytes = <4>; + page-spare-bytes = <64>; + }; +}; -- 1.7.7.3
WARNING: multiple messages have this Message-ID (diff)
From: Simon Glass <sjg@chromium.org> To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/6] tegra: fdt: Add NAND controller binding and definitions Date: Fri, 13 Jan 2012 15:10:53 -0800 [thread overview] Message-ID: <1326496256-5559-4-git-send-email-sjg@chromium.org> (raw) In-Reply-To: <1326496256-5559-1-git-send-email-sjg@chromium.org> Add a NAND controller along with a bindings file for review. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/arm/dts/tegra20.dtsi | 7 ++- doc/device-tree-bindings/nand/nvidia-nand.txt | 68 +++++++++++++++++++++++++ 2 files changed, 74 insertions(+), 1 deletions(-) create mode 100644 doc/device-tree-bindings/nand/nvidia-nand.txt diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index c009f16..33d6972 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -210,5 +210,10 @@ reg = <0x7000f400 0x200>; }; + nand: nand-controller at 0x70008000 { + #address-cells = <0>; + #size-cells = <0>; + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + }; }; - diff --git a/doc/device-tree-bindings/nand/nvidia-nand.txt b/doc/device-tree-bindings/nand/nvidia-nand.txt new file mode 100644 index 0000000..3674cf3 --- /dev/null +++ b/doc/device-tree-bindings/nand/nvidia-nand.txt @@ -0,0 +1,68 @@ +NAND Flash +---------- + +(there isn't yet a generic binding in Linux, so this describes what is in +U-Boot) + +The device node for a NAND flash device is as described in the document +"Open Firmware Recommended Practice : Universal Serial Bus" with the +following modifications and additions : + +Required properties : + - compatible : Should be "manufacture,device", "nand-flash" + - page-data-bytes : Number of bytes in the data area + - page-spare-bytes : * Number of bytes in spare area + spare area = skipped-spare-bytes + data-ecc-bytes + tag-bytes + + tag-ecc-bytes + - skipped-spare-bytes : Number of bytes to skip at start of spare area + (these are typically used for bad block maintenance) + - data-ecc-bytes : Number of ECC bytes for data area + - tag-bytes :Number of tag bytes in spare area + - tag-ecc-bytes : Number ECC bytes to be generated for tag bytes + +(replace -bytes with -size or -length?) + +This node should sit inside its controller. + + +Nvidia NAND Controller +---------------------- + +The device node for a NAND flash controller is as described in the document +"Open Firmware Recommended Practice : Universal Serial Bus" with the +following modifications and additions : + +Optional properties: + +wp-gpio : GPIO of write-protect line, three cells in the format: + phandle, parameter, flags +width : bus width of the NAND device in bits + +For now here is something specific to the Nvidia controller, with naming +based on Nvidia's original (non-fdt) NAND driver: + + - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns. + Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH), + TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL + + MAX_TRP_TREA is: + non-EDO mode: Max(tRP, tREA) + 6ns + EDO mode: tRP timing + +Example: + +nand-controller at 0x70008000 { + compatible = "nvidia,tegra20-nand"; + wp-gpios = <&gpio 59 0>; /* PH3 */ + width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + nand at 0 { + compatible = "hynix,hy27uf4g2b", "nand-flash"; + page-data-bytes = <2048>; + tag-ecc-bytes = <4>; + tag-bytes = <20>; + data-ecc-bytes = <36>; + skipped-spare-bytes = <4>; + page-spare-bytes = <64>; + }; +}; -- 1.7.7.3
next prev parent reply other threads:[~2012-01-13 23:10 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-01-13 23:10 [U-Boot] [PATCH 0/6] tegra: Add NAND flash support Simon Glass 2012-01-13 23:10 ` [U-Boot] [PATCH 2/6] tegra: Add NAND support to funcmux Simon Glass 2012-01-19 22:27 ` Stephen Warren 2012-01-13 23:10 ` Simon Glass [this message] 2012-01-13 23:10 ` [U-Boot] [PATCH 3/6] tegra: fdt: Add NAND controller binding and definitions Simon Glass [not found] ` <1326496256-5559-4-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2012-01-20 1:03 ` Stephen Warren 2012-01-20 1:03 ` [U-Boot] " Stephen Warren 2012-04-13 17:44 ` Simon Glass 2012-04-13 17:44 ` [U-Boot] " Simon Glass [not found] ` <1326496256-5559-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2012-01-13 23:10 ` [PATCH 1/6] fdt: Add debugging to fdtdec_get_int/addr() Simon Glass 2012-01-13 23:10 ` [U-Boot] " Simon Glass 2012-01-13 23:10 ` [PATCH 4/6] tegra: fdt: Add NAND definitions to fdt Simon Glass 2012-01-13 23:10 ` [U-Boot] " Simon Glass 2012-01-13 23:10 ` [U-Boot] [PATCH 5/6] tegra: nand: Add Tegra NAND driver Simon Glass 2012-01-15 4:03 ` Mike Frysinger 2012-01-15 4:08 ` Simon Glass 2012-01-15 4:12 ` Mike Frysinger 2012-01-16 2:25 ` Jim Lin 2012-01-20 17:31 ` Stephen Warren 2012-04-13 17:42 ` Simon Glass 2012-01-20 22:55 ` Scott Wood 2012-04-13 17:42 ` Simon Glass 2012-04-13 18:09 ` Scott Wood 2012-04-13 18:25 ` Simon Glass 2012-04-13 18:34 ` Scott Wood 2012-04-13 18:45 ` Simon Glass 2012-04-13 18:47 ` Scott Wood 2012-04-13 18:49 ` Simon Glass 2012-01-13 23:10 ` [U-Boot] [PATCH 6/6] tegra: Enable NAND on Seaboard Simon Glass
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