[PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Ameya Palande]

From: Rajendra Nayak <rnayak@ti.com>

All DPLLs except USB are in ALWON powerdomain. Make sure the
clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
a DPLL relock. So, mark the database accordingly.

Without this fix, it was seen that DPLL relock fails while testing
relock in a loop of USB DPLL.

CC: Nishanth Menon <nm@ti.com>
Tested-by: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/clock44xx_data.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 08e86d7..9519374 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -974,6 +974,7 @@ static struct clk dpll_usb_ck = {
 	.recalc		= &omap3_dpll_recalc,
 	.round_rate	= &omap2_dpll_round_rate,
 	.set_rate	= &omap3_noncore_dpll_set_rate,
+	.clkdm_name	= "l3_init_clkdm",
 };
 
 static struct clk dpll_usb_clkdcoldo_ck = {
-- 
1.7.4.1

Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Palande, Ameya]

Any update on this?

On Thu, Jan 19, 2012 at 11:22 AM, Ameya Palande <ameya.palande@ti.com> wrote:
> From: Rajendra Nayak <rnayak@ti.com>
>
> All DPLLs except USB are in ALWON powerdomain. Make sure the
> clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
> a DPLL relock. So, mark the database accordingly.
>
> Without this fix, it was seen that DPLL relock fails while testing
> relock in a loop of USB DPLL.
>
> CC: Nishanth Menon <nm@ti.com>
> Tested-by: Ameya Palande <ameya.palande@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> ---
>  arch/arm/mach-omap2/clock44xx_data.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
> index 08e86d7..9519374 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -974,6 +974,7 @@ static struct clk dpll_usb_ck = {
>        .recalc         = &omap3_dpll_recalc,
>        .round_rate     = &omap2_dpll_round_rate,
>        .set_rate       = &omap3_noncore_dpll_set_rate,
> +       .clkdm_name     = "l3_init_clkdm",
>  };
>
>  static struct clk dpll_usb_clkdcoldo_ck = {
> --
> 1.7.4.1
>
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Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Palande, Ameya]

Any update on this?

On Fri, Jan 20, 2012 at 11:53 AM, Palande, Ameya <ameya.palande@ti.com> wrote:
> Any update on this?
>
> On Thu, Jan 19, 2012 at 11:22 AM, Ameya Palande <ameya.palande@ti.com> wrote:
>> From: Rajendra Nayak <rnayak@ti.com>
>>
>> All DPLLs except USB are in ALWON powerdomain. Make sure the
>> clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
>> a DPLL relock. So, mark the database accordingly.
>>
>> Without this fix, it was seen that DPLL relock fails while testing
>> relock in a loop of USB DPLL.
>>
>> CC: Nishanth Menon <nm@ti.com>
>> Tested-by: Ameya Palande <ameya.palande@ti.com>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> ---
>>  arch/arm/mach-omap2/clock44xx_data.c |    1 +
>>  1 files changed, 1 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
>> index 08e86d7..9519374 100644
>> --- a/arch/arm/mach-omap2/clock44xx_data.c
>> +++ b/arch/arm/mach-omap2/clock44xx_data.c
>> @@ -974,6 +974,7 @@ static struct clk dpll_usb_ck = {
>>        .recalc         = &omap3_dpll_recalc,
>>        .round_rate     = &omap2_dpll_round_rate,
>>        .set_rate       = &omap3_noncore_dpll_set_rate,
>> +       .clkdm_name     = "l3_init_clkdm",
>>  };
>>
>>  static struct clk dpll_usb_clkdcoldo_ck = {
>> --
>> 1.7.4.1
>>
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Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Paul Walmsley]

[-- Attachment #1: Type: TEXT/PLAIN, Size: 1655 bytes --]

Hi

On Tue, 24 Jan 2012, Palande, Ameya wrote:

> Any update on this?

Looks good to me, but have the scripts been updated?

Also could you please cc linux-arm-kernel@lists.infradead.org?

- Paul

> 
> On Fri, Jan 20, 2012 at 11:53 AM, Palande, Ameya <ameya.palande@ti.com> wrote:
> > Any update on this?
> >
> > On Thu, Jan 19, 2012 at 11:22 AM, Ameya Palande <ameya.palande@ti.com> wrote:
> >> From: Rajendra Nayak <rnayak@ti.com>
> >>
> >> All DPLLs except USB are in ALWON powerdomain. Make sure the
> >> clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
> >> a DPLL relock. So, mark the database accordingly.
> >>
> >> Without this fix, it was seen that DPLL relock fails while testing
> >> relock in a loop of USB DPLL.
> >>
> >> CC: Nishanth Menon <nm@ti.com>
> >> Tested-by: Ameya Palande <ameya.palande@ti.com>
> >> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> >> ---
> >>  arch/arm/mach-omap2/clock44xx_data.c |    1 +
> >>  1 files changed, 1 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
> >> index 08e86d7..9519374 100644
> >> --- a/arch/arm/mach-omap2/clock44xx_data.c
> >> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> >> @@ -974,6 +974,7 @@ static struct clk dpll_usb_ck = {
> >>        .recalc         = &omap3_dpll_recalc,
> >>        .round_rate     = &omap2_dpll_round_rate,
> >>        .set_rate       = &omap3_noncore_dpll_set_rate,
> >> +       .clkdm_name     = "l3_init_clkdm",
> >>  };
> >>
> >>  static struct clk dpll_usb_clkdcoldo_ck = {
> >> --
> >> 1.7.4.1
> >>
> 


- Paul

Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Cousson, Benoit]

Hi Paul,

On 1/25/2012 8:05 PM, Paul Walmsley wrote:
> Hi
>
> On Tue, 24 Jan 2012, Palande, Ameya wrote:
>
>> Any update on this?
>
> Looks good to me, but have the scripts been updated?

Nope. The clkdm was never populated for DPLL in OMAP4 so far. We will 
have to add that extra parameters to every DPLLs in theory if we want to 
be consistent.

Hopefully, the information is available in the data source, so this is 
just a matter of printing it in the DPLL node template.

Regards,
Benoit

>
> Also could you please cc linux-arm-kernel@lists.infradead.org?
>
> - Paul
>
>>
>> On Fri, Jan 20, 2012 at 11:53 AM, Palande, Ameya<ameya.palande@ti.com>  wrote:
>>> Any update on this?
>>>
>>> On Thu, Jan 19, 2012 at 11:22 AM, Ameya Palande<ameya.palande@ti.com>  wrote:
>>>> From: Rajendra Nayak<rnayak@ti.com>
>>>>
>>>> All DPLLs except USB are in ALWON powerdomain. Make sure the
>>>> clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
>>>> a DPLL relock. So, mark the database accordingly.
>>>>
>>>> Without this fix, it was seen that DPLL relock fails while testing
>>>> relock in a loop of USB DPLL.
>>>>
>>>> CC: Nishanth Menon<nm@ti.com>
>>>> Tested-by: Ameya Palande<ameya.palande@ti.com>
>>>> Signed-off-by: Rajendra Nayak<rnayak@ti.com>
>>>> ---
>>>>   arch/arm/mach-omap2/clock44xx_data.c |    1 +
>>>>   1 files changed, 1 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
>>>> index 08e86d7..9519374 100644
>>>> --- a/arch/arm/mach-omap2/clock44xx_data.c
>>>> +++ b/arch/arm/mach-omap2/clock44xx_data.c
>>>> @@ -974,6 +974,7 @@ static struct clk dpll_usb_ck = {
>>>>         .recalc         =&omap3_dpll_recalc,
>>>>         .round_rate     =&omap2_dpll_round_rate,
>>>>         .set_rate       =&omap3_noncore_dpll_set_rate,
>>>> +       .clkdm_name     = "l3_init_clkdm",
>>>>   };
>>>>
>>>>   static struct clk dpll_usb_clkdcoldo_ck = {
>>>> --
>>>> 1.7.4.1
>>>>
>>
>
>
> - Paul

Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Palande, Ameya]

Hi Paul,

On Wed, Jan 25, 2012 at 11:05 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi
>
> On Tue, 24 Jan 2012, Palande, Ameya wrote:
>
>> Any update on this?
>
> Looks good to me, but have the scripts been updated?

Thanks for the review!

> Also could you please cc linux-arm-kernel@lists.infradead.org?

Sorry. Will do it from next time.

Cheers,
Ameya.

Re: [PATCH] OMAP4: Clock: Force a DPLL clkdm/pwrdm ON before a relock

[Paul Walmsley]

Hi Ameya

On Wed, 25 Jan 2012, Palande, Ameya wrote:

> On Wed, Jan 25, 2012 at 11:05 AM, Paul Walmsley <paul@pwsan.com> wrote:
> 
> > Also could you please cc linux-arm-kernel@lists.infradead.org?
> 
> Sorry. Will do it from next time.

Please do it on this one too.  Otherwise I will have to do it :-)


- Paul