[Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Paolo Bonzini]

Direct usage of rt_clock should be discouraged. For RTC devices the user
cannot choose to follow the host clock with respect to NTP adjustment
and daylight savings changes.   For other devices it does not provide
determinism together with -icount or qtest, and it also keeps ticking
while the machine is paused.

This series uses rtc_clock uniformly in device models that provide RTC
functionality, and vm_clock in the omap_lpg whose ticking should be tied
to the VM running state.  For consistency I'm also switching the pl031
to rtc_clock; so far it used the vm_clock.

v1->v2: switch omap_lpg to vm_clock

Paolo Bonzini (5):
  rtc: add -rtc clock=rt
  omap: switch omap_lpg to vm_clock
  arm: switch real-time clocks to rtc_clock
  pl031: rearm alarm timer upon load
  pl031: switch clock base to rtc_clock

 hw/omap1.c      |   10 +++---
 hw/pl031.c      |   75 ++++++++++++++++++++++++++++++++++++-------------------
 hw/pxa2xx.c     |   28 ++++++++++----------
 hw/strongarm.c  |   10 +++---
 hw/twl92230.c   |    9 +++---
 qemu-options.hx |    7 +++--
 vl.c            |    2 +
 7 files changed, 84 insertions(+), 57 deletions(-)

-- 
1.7.7.6

[Qemu-devel] [PATCH v2 1/5] rtc: add -rtc clock=rt

[Paolo Bonzini]

This will let people use backwards-compatible semantics for devices that
will be affected by the following patches.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 qemu-options.hx |    7 ++++---
 vl.c            |    2 ++
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/qemu-options.hx b/qemu-options.hx
index b129996..44af861 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -2436,7 +2436,7 @@ DEF("localtime", 0, QEMU_OPTION_localtime, "", QEMU_ARCH_ALL)
 DEF("startdate", HAS_ARG, QEMU_OPTION_startdate, "", QEMU_ARCH_ALL)
 
 DEF("rtc", HAS_ARG, QEMU_OPTION_rtc, \
-    "-rtc [base=utc|localtime|date][,clock=host|vm][,driftfix=none|slew]\n" \
+    "-rtc [base=utc|localtime|date][,clock=host|rt|vm][,driftfix=none|slew]\n" \
     "                set the RTC base and clock, enable drift fix for clock ticks (x86 only)\n",
     QEMU_ARCH_ALL)
 
@@ -2452,8 +2452,9 @@ format @code{2006-06-17T16:01:21} or @code{2006-06-17}. The default base is UTC.
 By default the RTC is driven by the host system time. This allows to use the
 RTC as accurate reference clock inside the guest, specifically if the host
 time is smoothly following an accurate external reference clock, e.g. via NTP.
-If you want to isolate the guest time from the host, even prevent it from
-progressing during suspension, you can set @option{clock} to @code{vm} instead.
+If you want to isolate the guest time from the host, you can set @option{clock}
+to @code{rt} instead.  To even prevent it from progressing during suspension,
+you can set it to @code{vm}.
 
 Enable @option{driftfix} (i386 targets only) if you experience time drift problems,
 specifically with Windows' ACPI HAL. This option will try to figure out how
diff --git a/vl.c b/vl.c
index 4a77696..510609e 100644
--- a/vl.c
+++ b/vl.c
@@ -529,6 +529,8 @@ static void configure_rtc(QemuOpts *opts)
     if (value) {
         if (!strcmp(value, "host")) {
             rtc_clock = host_clock;
+        } else if (!strcmp(value, "rt")) {
+            rtc_clock = rt_clock;
         } else if (!strcmp(value, "vm")) {
             rtc_clock = vm_clock;
         } else {
-- 
1.7.7.6

[Qemu-devel] [PATCH v2 2/5] omap: switch omap_lpg to vm_clock

[Paolo Bonzini]

The output of the pulse generator needs to be deterministic when
running in -icount mode, and to remain constant whenever the VM is
stopped.  So the right clock to use is vm_clock.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/omap1.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/omap1.c b/hw/omap1.c
index 1aa5f23..d19049a 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -3497,9 +3497,9 @@ static void omap_lpg_tick(void *opaque)
     struct omap_lpg_s *s = opaque;
 
     if (s->cycle)
-        qemu_mod_timer(s->tm, qemu_get_clock_ms(rt_clock) + s->period - s->on);
+        qemu_mod_timer(s->tm, qemu_get_clock_ms(vm_clock) + s->period - s->on);
     else
-        qemu_mod_timer(s->tm, qemu_get_clock_ms(rt_clock) + s->on);
+        qemu_mod_timer(s->tm, qemu_get_clock_ms(vm_clock) + s->on);
 
     s->cycle = !s->cycle;
     printf("%s: LED is %s\n", __FUNCTION__, s->cycle ? "on" : "off");
@@ -3617,7 +3617,7 @@ static struct omap_lpg_s *omap_lpg_init(MemoryRegion *system_memory,
     struct omap_lpg_s *s = (struct omap_lpg_s *)
             g_malloc0(sizeof(struct omap_lpg_s));
 
-    s->tm = qemu_new_timer_ms(rt_clock, omap_lpg_tick, s);
+    s->tm = qemu_new_timer_ms(vm_clock, omap_lpg_tick, s);
 
     omap_lpg_reset(s);
 
-- 
1.7.7.6

[Qemu-devel] [PATCH v2 3/5] arm: switch real-time clocks to rtc_clock

[Paolo Bonzini]

This lets the user specify the desired semantics.  By default, the RTC
will follow adjustments from the host's NTP client.  "-rtc clock=vm" will
improve determinism with both icount and qtest.  Finally, the previous
behavior is available with "-rtc clock=rt".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/omap1.c     |    4 ++--
 hw/pxa2xx.c    |   28 ++++++++++++++--------------
 hw/strongarm.c |   10 +++++-----
 hw/twl92230.c  |    9 +++++----
 4 files changed, 26 insertions(+), 25 deletions(-)

diff --git a/hw/omap1.c b/hw/omap1.c
index d19049a..5349908 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2888,7 +2888,7 @@ static void omap_rtc_reset(struct omap_rtc_s *s)
     s->pm_am = 0;
     s->auto_comp = 0;
     s->round = 0;
-    s->tick = qemu_get_clock_ms(rt_clock);
+    s->tick = qemu_get_clock_ms(rtc_clock);
     memset(&s->alarm_tm, 0, sizeof(s->alarm_tm));
     s->alarm_tm.tm_mday = 0x01;
     s->status = 1 << 7;
@@ -2909,7 +2909,7 @@ static struct omap_rtc_s *omap_rtc_init(MemoryRegion *system_memory,
 
     s->irq = timerirq;
     s->alarm = alarmirq;
-    s->clk = qemu_new_timer_ms(rt_clock, omap_rtc_tick, s);
+    s->clk = qemu_new_timer_ms(rtc_clock, omap_rtc_tick, s);
 
     omap_rtc_reset(s);
 
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 1ab2701..15cee71 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -875,7 +875,7 @@ static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s)
 
 static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
 {
-    int64_t rt = qemu_get_clock_ms(rt_clock);
+    int64_t rt = qemu_get_clock_ms(rtc_clock);
     s->last_rcnr += ((rt - s->last_hz) << 15) /
             (1000 * ((s->rttr & 0xffff) + 1));
     s->last_rdcr += ((rt - s->last_hz) << 15) /
@@ -885,7 +885,7 @@ static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
 
 static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
 {
-    int64_t rt = qemu_get_clock_ms(rt_clock);
+    int64_t rt = qemu_get_clock_ms(rtc_clock);
     if (s->rtsr & (1 << 12))
         s->last_swcr += (rt - s->last_sw) / 10;
     s->last_sw = rt;
@@ -893,7 +893,7 @@ static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
 
 static void pxa2xx_rtc_piupdate(PXA2xxRTCState *s)
 {
-    int64_t rt = qemu_get_clock_ms(rt_clock);
+    int64_t rt = qemu_get_clock_ms(rtc_clock);
     if (s->rtsr & (1 << 15))
         s->last_swcr += rt - s->last_pi;
     s->last_pi = rt;
@@ -1019,16 +1019,16 @@ static uint64_t pxa2xx_rtc_read(void *opaque, target_phys_addr_t addr,
     case PIAR:
         return s->piar;
     case RCNR:
-        return s->last_rcnr + ((qemu_get_clock_ms(rt_clock) - s->last_hz) << 15) /
+        return s->last_rcnr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) /
                 (1000 * ((s->rttr & 0xffff) + 1));
     case RDCR:
-        return s->last_rdcr + ((qemu_get_clock_ms(rt_clock) - s->last_hz) << 15) /
+        return s->last_rdcr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) /
                 (1000 * ((s->rttr & 0xffff) + 1));
     case RYCR:
         return s->last_rycr;
     case SWCR:
         if (s->rtsr & (1 << 12))
-            return s->last_swcr + (qemu_get_clock_ms(rt_clock) - s->last_sw) / 10;
+            return s->last_swcr + (qemu_get_clock_ms(rtc_clock) - s->last_sw) / 10;
         else
             return s->last_swcr;
     default:
@@ -1168,14 +1168,14 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
     s->last_swcr = (tm.tm_hour << 19) |
             (tm.tm_min << 13) | (tm.tm_sec << 7);
     s->last_rtcpicr = 0;
-    s->last_hz = s->last_sw = s->last_pi = qemu_get_clock_ms(rt_clock);
-
-    s->rtc_hz    = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_hz_tick,    s);
-    s->rtc_rdal1 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_rdal1_tick, s);
-    s->rtc_rdal2 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_rdal2_tick, s);
-    s->rtc_swal1 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_swal1_tick, s);
-    s->rtc_swal2 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_swal2_tick, s);
-    s->rtc_pi    = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_pi_tick,    s);
+    s->last_hz = s->last_sw = s->last_pi = qemu_get_clock_ms(rtc_clock);
+
+    s->rtc_hz    = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_hz_tick,    s);
+    s->rtc_rdal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s);
+    s->rtc_rdal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s);
+    s->rtc_swal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s);
+    s->rtc_swal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s);
+    s->rtc_pi    = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_pi_tick,    s);
 
     sysbus_init_irq(dev, &s->rtc_irq);
 
diff --git a/hw/strongarm.c b/hw/strongarm.c
index 4d5b60f..1b15f39 100644
--- a/hw/strongarm.c
+++ b/hw/strongarm.c
@@ -255,7 +255,7 @@ static inline void strongarm_rtc_int_update(StrongARMRTCState *s)
 
 static void strongarm_rtc_hzupdate(StrongARMRTCState *s)
 {
-    int64_t rt = qemu_get_clock_ms(rt_clock);
+    int64_t rt = qemu_get_clock_ms(rtc_clock);
     s->last_rcnr += ((rt - s->last_hz) << 15) /
             (1000 * ((s->rttr & 0xffff) + 1));
     s->last_hz = rt;
@@ -308,7 +308,7 @@ static uint64_t strongarm_rtc_read(void *opaque, target_phys_addr_t addr,
         return s->rtar;
     case RCNR:
         return s->last_rcnr +
-                ((qemu_get_clock_ms(rt_clock) - s->last_hz) << 15) /
+                ((qemu_get_clock_ms(rtc_clock) - s->last_hz) << 15) /
                 (1000 * ((s->rttr & 0xffff) + 1));
     default:
         printf("%s: Bad register 0x" TARGET_FMT_plx "\n", __func__, addr);
@@ -374,10 +374,10 @@ static int strongarm_rtc_init(SysBusDevice *dev)
     qemu_get_timedate(&tm, 0);
 
     s->last_rcnr = (uint32_t) mktimegm(&tm);
-    s->last_hz = qemu_get_clock_ms(rt_clock);
+    s->last_hz = qemu_get_clock_ms(rtc_clock);
 
-    s->rtc_alarm = qemu_new_timer_ms(rt_clock, strongarm_rtc_alarm_tick, s);
-    s->rtc_hz = qemu_new_timer_ms(rt_clock, strongarm_rtc_hz_tick, s);
+    s->rtc_alarm = qemu_new_timer_ms(rtc_clock, strongarm_rtc_alarm_tick, s);
+    s->rtc_hz = qemu_new_timer_ms(rtc_clock, strongarm_rtc_hz_tick, s);
 
     sysbus_init_irq(dev, &s->rtc_irq);
     sysbus_init_irq(dev, &s->rtc_hz_irq);
diff --git a/hw/twl92230.c b/hw/twl92230.c
index 22da6f8..0d70d84 100644
--- a/hw/twl92230.c
+++ b/hw/twl92230.c
@@ -22,6 +22,7 @@
 #include "hw.h"
 #include "qemu-timer.h"
 #include "i2c.h"
+#include "sysemu.h"
 #include "console.h"
 
 #define VERBOSE 1
@@ -71,14 +72,14 @@ static inline void menelaus_update(MenelausState *s)
 
 static inline void menelaus_rtc_start(MenelausState *s)
 {
-    s->rtc.next += qemu_get_clock_ms(rt_clock);
+    s->rtc.next += qemu_get_clock_ms(rtc_clock);
     qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
 }
 
 static inline void menelaus_rtc_stop(MenelausState *s)
 {
     qemu_del_timer(s->rtc.hz_tm);
-    s->rtc.next -= qemu_get_clock_ms(rt_clock);
+    s->rtc.next -= qemu_get_clock_ms(rtc_clock);
     if (s->rtc.next < 1)
         s->rtc.next = 1;
 }
@@ -781,7 +782,7 @@ static void menelaus_pre_save(void *opaque)
 {
     MenelausState *s = opaque;
     /* Should be <= 1000 */
-    s->rtc_next_vmstate =  s->rtc.next - qemu_get_clock_ms(rt_clock);
+    s->rtc_next_vmstate =  s->rtc.next - qemu_get_clock_ms(rtc_clock);
 }
 
 static int menelaus_post_load(void *opaque, int version_id)
@@ -842,7 +843,7 @@ static int twl92230_init(I2CSlave *i2c)
 {
     MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
 
-    s->rtc.hz_tm = qemu_new_timer_ms(rt_clock, menelaus_rtc_hz, s);
+    s->rtc.hz_tm = qemu_new_timer_ms(rtc_clock, menelaus_rtc_hz, s);
     /* Three output pins plus one interrupt pin.  */
     qdev_init_gpio_out(&i2c->qdev, s->out, 4);
 
-- 
1.7.7.6

[Qemu-devel] [PATCH v2 4/5] pl031: rearm alarm timer upon load

[Paolo Bonzini]

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/pl031.c |   39 ++++++++++++++++++++++++---------------
 1 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/hw/pl031.c b/hw/pl031.c
index 69abc4f..713f85d 100644
--- a/hw/pl031.c
+++ b/hw/pl031.c
@@ -47,21 +47,6 @@ typedef struct {
     uint32_t is;
 } pl031_state;
 
-static const VMStateDescription vmstate_pl031 = {
-    .name = "pl031",
-    .version_id = 1,
-    .minimum_version_id = 1,
-    .fields = (VMStateField[]) {
-        VMSTATE_UINT32(tick_offset, pl031_state),
-        VMSTATE_UINT32(mr, pl031_state),
-        VMSTATE_UINT32(lr, pl031_state),
-        VMSTATE_UINT32(cr, pl031_state),
-        VMSTATE_UINT32(im, pl031_state),
-        VMSTATE_UINT32(is, pl031_state),
-        VMSTATE_END_OF_LIST()
-    }
-};
-
 static const unsigned char pl031_id[] = {
     0x31, 0x10, 0x14, 0x00,         /* Device ID        */
     0x0d, 0xf0, 0x05, 0xb1          /* Cell ID      */
@@ -213,6 +198,30 @@ static int pl031_init(SysBusDevice *dev)
     return 0;
 }
 
+static int pl031_post_load(void *opaque, int version_id)
+{
+    pl031_state *s = opaque;
+
+    pl031_set_alarm(s);
+    return 0;
+}
+
+static const VMStateDescription vmstate_pl031 = {
+    .name = "pl031",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .post_load = pl031_post_load,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT32(tick_offset, pl031_state),
+        VMSTATE_UINT32(mr, pl031_state),
+        VMSTATE_UINT32(lr, pl031_state),
+        VMSTATE_UINT32(cr, pl031_state),
+        VMSTATE_UINT32(im, pl031_state),
+        VMSTATE_UINT32(is, pl031_state),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static void pl031_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-- 
1.7.7.6

[Qemu-devel] [PATCH v2 5/5] pl031: switch clock base to rtc_clock

[Paolo Bonzini]

This lets the user specify the desired semantics.  By default, the RTC
will follow adjustments from the host's NTP client, and will remain in
sync when the virtual machine is stopped.  The previous behavior, which
provides determinism with both icount and qtest, remains available with
"-rtc clock=vm".

pl031 supports migration, so we need to convert the time base from
rtc_clock to vm_clock and back for backwards compatibility.  (The
rtc_clock may not be synchronized on the two machines, especially with
savevm/loadvm, so the conversion is needed anyway.  And since any time
base will do, why not pick the one base that is backwards compatible).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/pl031.c |   38 ++++++++++++++++++++++++++------------
 1 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/hw/pl031.c b/hw/pl031.c
index 713f85d..9602664 100644
--- a/hw/pl031.c
+++ b/hw/pl031.c
@@ -13,6 +13,7 @@
 
 #include "sysbus.h"
 #include "qemu-timer.h"
+#include "sysemu.h"
 
 //#define DEBUG_PL031
 
@@ -38,6 +39,11 @@ typedef struct {
     QEMUTimer *timer;
     qemu_irq irq;
 
+    /* Needed to preserve the tick_count across migration, even if the
+     * absolute value of the rtc_clock is different on the source and
+     * destination.
+     */
+    uint32_t tick_offset_vmstate;
     uint32_t tick_offset;
 
     uint32_t mr;
@@ -68,27 +74,23 @@ static void pl031_interrupt(void * opaque)
 
 static uint32_t pl031_get_count(pl031_state *s)
 {
-    /* This assumes qemu_get_clock_ns returns the time since the machine was
-       created.  */
-    return s->tick_offset + qemu_get_clock_ns(vm_clock) / get_ticks_per_sec();
+    int64_t now = qemu_get_clock_ns(rtc_clock);
+    return s->tick_offset + now / get_ticks_per_sec();
 }
 
 static void pl031_set_alarm(pl031_state *s)
 {
-    int64_t now;
     uint32_t ticks;
 
-    now = qemu_get_clock_ns(vm_clock);
-    ticks = s->tick_offset + now / get_ticks_per_sec();
-
     /* The timer wraps around.  This subtraction also wraps in the same way,
        and gives correct results when alarm < now_ticks.  */
-    ticks = s->mr - ticks;
+    ticks = s->mr - pl031_get_count(s);
     DPRINTF("Alarm set in %ud ticks\n", ticks);
     if (ticks == 0) {
         qemu_del_timer(s->timer);
         pl031_interrupt(s);
     } else {
+        int64_t now = qemu_get_clock_ns(rtc_clock);
         qemu_mod_timer(s->timer, now + (int64_t)ticks * get_ticks_per_sec());
     }
 }
@@ -190,18 +192,29 @@ static int pl031_init(SysBusDevice *dev)
     sysbus_init_mmio(dev, &s->iomem);
 
     sysbus_init_irq(dev, &s->irq);
-    /* ??? We assume vm_clock is zero at this point.  */
     qemu_get_timedate(&tm, 0);
-    s->tick_offset = mktimegm(&tm);
+    s->tick_offset = mktimegm(&tm) - qemu_get_clock_ns(rtc_clock) / get_ticks_per_sec();
 
-    s->timer = qemu_new_timer_ns(vm_clock, pl031_interrupt, s);
+    s->timer = qemu_new_timer_ns(rtc_clock, pl031_interrupt, s);
     return 0;
 }
 
+static void pl031_pre_save(void *opaque)
+{
+    pl031_state *s = opaque;
+
+    /* tick_offset is base_time - rtc_clock base time.  Instead, we want to
+     * store the base time relative to the vm_clock for backwards-compatibility.  */
+    int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock);
+    s->tick_offset_vmstate = s->tick_offset + delta / get_ticks_per_sec();
+}
+
 static int pl031_post_load(void *opaque, int version_id)
 {
     pl031_state *s = opaque;
 
+    int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock);
+    s->tick_offset = s->tick_offset_vmstate - delta / get_ticks_per_sec();
     pl031_set_alarm(s);
     return 0;
 }
@@ -210,9 +223,10 @@ static const VMStateDescription vmstate_pl031 = {
     .name = "pl031",
     .version_id = 1,
     .minimum_version_id = 1,
+    .pre_save = pl031_pre_save,
     .post_load = pl031_post_load,
     .fields = (VMStateField[]) {
-        VMSTATE_UINT32(tick_offset, pl031_state),
+        VMSTATE_UINT32(tick_offset_vmstate, pl031_state),
         VMSTATE_UINT32(mr, pl031_state),
         VMSTATE_UINT32(lr, pl031_state),
         VMSTATE_UINT32(cr, pl031_state),
-- 
1.7.7.6

Re: [Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Peter Maydell]

On 5 March 2012 09:08, Paolo Bonzini <pbonzini@redhat.com> wrote:
> Direct usage of rt_clock should be discouraged. For RTC devices the user
> cannot choose to follow the host clock with respect to NTP adjustment
> and daylight savings changes.   For other devices it does not provide
> determinism together with -icount or qtest, and it also keeps ticking
> while the machine is paused.
>
> This series uses rtc_clock uniformly in device models that provide RTC
> functionality, and vm_clock in the omap_lpg whose ticking should be tied
> to the VM running state.  For consistency I'm also switching the pl031
> to rtc_clock; so far it used the vm_clock.
>
> v1->v2: switch omap_lpg to vm_clock
>
> Paolo Bonzini (5):
>  rtc: add -rtc clock=rt
>  omap: switch omap_lpg to vm_clock
>  arm: switch real-time clocks to rtc_clock
>  pl031: rearm alarm timer upon load
>  pl031: switch clock base to rtc_clock

I'm happy to take these into the arm-devs tree, but I'd prefer to
see an ack or review from somebody who understands qemu timers first.

-- PMM

Re: [Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Paolo Bonzini]

Il 05/03/2012 15:05, Peter Maydell ha scritto:
>> > Direct usage of rt_clock should be discouraged. For RTC devices the user
>> > cannot choose to follow the host clock with respect to NTP adjustment
>> > and daylight savings changes.   For other devices it does not provide
>> > determinism together with -icount or qtest, and it also keeps ticking
>> > while the machine is paused.
>> >
>> > This series uses rtc_clock uniformly in device models that provide RTC
>> > functionality, and vm_clock in the omap_lpg whose ticking should be tied
>> > to the VM running state.  For consistency I'm also switching the pl031
>> > to rtc_clock; so far it used the vm_clock.
>> >
>> > v1->v2: switch omap_lpg to vm_clock
>> >
>> > Paolo Bonzini (5):
>> >  rtc: add -rtc clock=rt
>> >  omap: switch omap_lpg to vm_clock
>> >  arm: switch real-time clocks to rtc_clock
>> >  pl031: rearm alarm timer upon load
>> >  pl031: switch clock base to rtc_clock
> I'm happy to take these into the arm-devs tree, but I'd prefer to
> see an ack or review from somebody who understands qemu timers first.

Andrzej or Jan, would you take a look?

Paolo

Re: [Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Paolo Bonzini]

Il 05/03/2012 15:05, Peter Maydell ha scritto:
> On 5 March 2012 09:08, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> > Direct usage of rt_clock should be discouraged. For RTC devices the user
>> > cannot choose to follow the host clock with respect to NTP adjustment
>> > and daylight savings changes.   For other devices it does not provide
>> > determinism together with -icount or qtest, and it also keeps ticking
>> > while the machine is paused.
>> >
>> > This series uses rtc_clock uniformly in device models that provide RTC
>> > functionality, and vm_clock in the omap_lpg whose ticking should be tied
>> > to the VM running state.  For consistency I'm also switching the pl031
>> > to rtc_clock; so far it used the vm_clock.
>> >
>> > v1->v2: switch omap_lpg to vm_clock
>> >
>> > Paolo Bonzini (5):
>> >  rtc: add -rtc clock=rt
>> >  omap: switch omap_lpg to vm_clock
>> >  arm: switch real-time clocks to rtc_clock
>> >  pl031: rearm alarm timer upon load
>> >  pl031: switch clock base to rtc_clock
> I'm happy to take these into the arm-devs tree, but I'd prefer to
> see an ack or review from somebody who understands qemu timers first.

Two weeks passed... prefer or require? :)

Paolo

Re: [Qemu-devel] [PATCH v2 0/5] Make rt_clock usage configurable for ARM devices

[Peter Maydell]

On 27 March 2012 18:07, Paolo Bonzini <pbonzini@redhat.com> wrote:
> Il 05/03/2012 15:05, Peter Maydell ha scritto:
>> On 5 March 2012 09:08, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>> > Paolo Bonzini (5):
>>> >  rtc: add -rtc clock=rt
>>> >  omap: switch omap_lpg to vm_clock
>>> >  arm: switch real-time clocks to rtc_clock
>>> >  pl031: rearm alarm timer upon load
>>> >  pl031: switch clock base to rtc_clock
>> I'm happy to take these into the arm-devs tree, but I'd prefer to
>> see an ack or review from somebody who understands qemu timers first.
>
> Two weeks passed... prefer or require? :)

Yeah, I was just thinking I should probably give in and take these
unreviewed... (shame there's no tag for "signed-off-by but not reviewed-by"
:-))

-- PMM