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From: xiong <xiong@qca.qualcomm.com>
To: <davem@davemloft.net>, <netdev@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Cc: <qca-linux-team@qualcomm.com>, <nic-devel@qualcomm.com>,
	xiong <xiong@qca.qualcomm.com>
Subject: [PATCH 15/37] atl1c: update right threshold for TSO
Date: Fri, 13 Apr 2012 08:14:40 +0800	[thread overview]
Message-ID: <1334276102-15866-16-git-send-email-xiong@qca.qualcomm.com> (raw)
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>

atl1c_configure_tx used a wrong value of MAX_TX_OFFLOAD_THRESH(9KB)
for TSO threshold.
the right value should be 7KB
Fast Ethernet controller doesn't support Jumbo frame.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
 drivers/net/ethernet/atheros/atl1c/atl1c.h      |    2 --
 drivers/net/ethernet/atheros/atl1c/atl1c_hw.h   |    1 +
 drivers/net/ethernet/atheros/atl1c/atl1c_main.c |   11 ++++++++---
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index 6e5ae89..9f4fc41 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -74,8 +74,6 @@
 
 #define AT_RX_BUF_SIZE		(ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)
 #define MAX_JUMBO_FRAME_SIZE	(6*1024)
-#define MAX_TSO_FRAME_SIZE      (7*1024)
-#define MAX_TX_OFFLOAD_THRESH	(9*1024)
 
 #define AT_MAX_RECEIVE_QUEUE    4
 #define AT_DEF_RECEIVE_QUEUE	1
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index ec68611..b9fa854 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -515,6 +515,7 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
 /* Jumbo packet Threshold for task offload */
 #define REG_TX_TSO_OFFLOAD_THRESH	0x1594 /* In 8-bytes */
 #define TX_TSO_OFFLOAD_THRESH_MASK	0x07FF
+#define MAX_TSO_FRAME_SIZE		(7*1024)
 
 #define	REG_TXF_WATER_MARK		0x1598 /* In 8-bytes */
 #define TXF_WATER_MARK_MASK		0x0FFF
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 141fe67..0b15e1f 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -501,11 +501,16 @@ static int atl1c_set_features(struct net_device *netdev,
 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
 {
 	struct atl1c_adapter *adapter = netdev_priv(netdev);
+	struct atl1c_hw *hw = &adapter->hw;
 	int old_mtu   = netdev->mtu;
 	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 
-	if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
-			(max_frame > MAX_JUMBO_FRAME_SIZE)) {
+	/* Fast Etherent controller doesn't support Jumbo packet */
+	if (((hw->nic_type == athr_l2c ||
+	      hw->nic_type == athr_l2c_b ||
+	      hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
+	      max_frame < ETH_ZLEN + ETH_FCS_LEN ||
+	      max_frame > MAX_JUMBO_FRAME_SIZE) {
 		if (netif_msg_link(adapter))
 			dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
 		return -EINVAL;
@@ -1050,7 +1055,7 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
 	u16 tx_offload_thresh;
 	u32 txq_ctrl_data;
 
-	tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
+	tx_offload_thresh = MAX_TSO_FRAME_SIZE;
 	AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
 		(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
 	AT_READ_REGW(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
-- 
1.7.7


  parent reply	other threads:[~2012-04-13  0:17 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-13  0:14 [PATCH 00/37] atl1c: update hardware settings xiong
2012-04-13  0:14 ` [PATCH 01/37] atl1c: update author contact info & company/driver desciption xiong
2012-04-13  0:14 ` [PATCH 02/37] atl1c: remove multiple-RX-Q code xiong
2012-04-13  0:14 ` [PATCH 03/37] atl1c: remove HDS register xiong
2012-04-13  0:14 ` [PATCH 04/37] atl1c: remove VPD register xiong
2012-04-14  0:45   ` David Miller
2012-04-14  9:12     ` Huang, Xiong
2012-04-14 14:22       ` Ben Hutchings
2012-04-14 18:24         ` David Miller
2012-04-17  8:36         ` Huang, Xiong
2012-04-17  8:36           ` Huang, Xiong
2012-04-13  0:14 ` [PATCH 05/37] atl1c: remove SMB/CMB DMA related code xiong
2012-04-13  0:14 ` [PATCH 06/37] atl1c: split 2 32bit registers of TPD to 4 16bit registers xiong
2012-04-13  0:14 ` [PATCH 07/37] atl1c: remove code related to rxq 1/2/3 xiong
2012-04-13  0:14 ` [PATCH 08/37] atl1c: wrong register used to stop TXQ xiong
2012-04-13  0:14 ` [PATCH 09/37] atl1c: correct wrong definition of REG_DMA_CTRL xiong
2012-04-13  0:14 ` [PATCH 10/37] atl1c: remove dmaw_block xiong
2012-04-13  0:14 ` [PATCH 11/37] atl1c: using fixed TXQ configuration for l2cb and l1c xiong
2012-04-13  0:14 ` [PATCH 12/37] atl1c: restore max-read-request-size in Device Conrol Register xiong
2012-04-13 17:02   ` Ben Hutchings
2012-04-14 10:39     ` Huang, Xiong
2012-04-14 10:39       ` Huang, Xiong
2012-04-14 10:39       ` Huang, Xiong
2012-04-13  0:14 ` [PATCH 13/37] atl1c: threshold for ASPM is changed based on chip capability xiong
2012-04-13  0:14 ` [PATCH 14/37] atl1c: add module parameter for l1c_wait_until_idle xiong
2012-04-13  0:14 ` xiong [this message]
2012-04-13  0:14 ` [PATCH 16/37] atl1c: remove dmar_dly_cnt and dmaw_dly_cnt xiong
2012-04-13  0:14 ` [PATCH 17/37] atl1c: clear PCIE error status in atl1c_reset_pcie xiong
2012-04-13  0:14 ` [PATCH 18/37] atl1c: refine reg definition of REG_MASTER_CTRL xiong
2012-04-13  0:14 ` [PATCH 19/37] atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patch xiong
2012-04-13  0:14 ` [PATCH 20/37] atl1c: refine/update ASPM configuration xiong
2012-04-13  0:14 ` [PATCH 21/37] atl1c: refine atl1c_pcie_patch xiong
2012-04-13  0:14 ` [PATCH 22/37] atl1c: fix WoL(magic) issue for l2cb 1.1 xiong
2012-04-13  0:14 ` [PATCH 23/37] atl1c: remove MDIO_REG_ADDR_MASK in atl1c_mdio_read/write xiong
2012-04-13  0:14 ` [PATCH 24/37] atl1c: remove REG_PHY_STATUS xiong
2012-04-13  0:14 ` [PATCH 25/37] atl1c: refine phy-register read/write function xiong
2012-04-13  0:14 ` [PATCH 26/37] atl1c: remove PHY contrl in atl1c_reset_pcie xiong
2012-04-13  0:14 ` [PATCH 27/37] atl1c: refine SERDES-clock related code xiong
2012-04-13  0:14 ` [PATCH 28/37] atl1c: remove PHY polling from atl1c_open xiong
2012-04-13  0:14 ` [PATCH 29/37] atl1c: update PHY reset related routine xiong
2012-04-13  0:14 ` [PATCH 30/37] atl1c: remove PHY reset/init for link down event xiong
2012-04-13  0:14 ` [PATCH 31/37] atl1c: add function atl1c_power_saving xiong
2012-04-13  0:14 ` [PATCH 32/37] atl1c: refine start/enable code for MAC module xiong
2012-04-13  0:14 ` [PATCH 33/37] atl1c: add PHY link event(up/down) patch xiong
2012-04-13  0:14 ` [PATCH 34/37] atl1c: clear WoL status when reset pcie xiong
2012-04-13  0:15 ` [PATCH 35/37] atl1c: remove code of closing register writable attribution xiong
2012-04-13  0:15 ` [PATCH 36/37] atl1c: refine mac address related code xiong
2012-04-13  0:15 ` [PATCH 37/37] atl1c: cancel task when interface closed xiong

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