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From: Eugeni Dodonov <eugeni.dodonov@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: [PATCH 21/29] drm/i915: initialize DDI buffer translations
Date: Fri, 13 Apr 2012 17:08:57 -0300	[thread overview]
Message-ID: <1334347745-11743-22-git-send-email-eugeni.dodonov@intel.com> (raw)
In-Reply-To: <1334347745-11743-1-git-send-email-eugeni.dodonov@intel.com>

Buffer translations for DDI links must be initialized prior to enablement.
For FDI and DP, first 9 pairs of values are used to select the connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   84 +++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/intel_drv.h     |    1 +
 2 files changed, 84 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a1598a5..e7a2a81 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2856,6 +2856,86 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
 	DRM_DEBUG_KMS("FDI train done.\n");
 }
 
+/* HDMI/DVI modes ignore everything but the last 2 items. So we share
+ * them for both DP and FDI transports, allowing those ports to
+ * automatically adapt to HDMI connections as well
+ */
+static const long hsw_ddi_translations_dp[] = {
+	0x00FFFFFF, 0x0006000E,
+	0x00D75FFF, 0x0005000A,
+	0x00C30FFF, 0x00040006,
+	0x80AAAFFF, 0x000B0000,
+	0x00FFFFFF, 0x0005000A,
+	0x00D75FFF, 0x000C0004,
+	0x80C30FFF, 0x000B0000,
+	0x00FFFFFF, 0x00040006,
+	0x80D75FFF, 0x000B0000,
+	0x00FFFFFF, 0x00040006
+};
+
+static const long hsw_ddi_translations_fdi[] = {
+	0x00FFFFFF, 0x0007000E,
+	0x00D75FFF, 0x000F000A,
+	0x00C30FFF, 0x00060006,
+	0x00AAAFFF, 0x001E0000,
+	0x00FFFFFF, 0x000F000A,
+	0x00D75FFF, 0x00160004,
+	0x00C30FFF, 0x001E0000,
+	0x00FFFFFF, 0x00060006,
+	0x00D75FFF, 0x001E0000,
+	0x00FFFFFF, 0x00040006
+};
+
+/* On Haswell, DDI port buffers must be programmed with correct values
+ * in advance. The buffer values are different for FDI and DP modes,
+ * but the HDMI/DVI fields are shared among those. So we program the DDI
+ * in either FDI or DP modes only, as HDMI connections will work with both
+ * of those
+ */
+void hsw_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 reg;
+	int i, j;
+
+	DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
+			port_name(port),
+			use_fdi_mode ? "FDI" : "DP");
+
+	WARN((use_fdi_mode && (port != PORT_E)),
+		"Programming port %c in FDI mode, this probably will not work.\n",
+		port_name(port));
+
+	/* Those registers seem to be double-buffered, so write them twice */
+	for (j=0; j < 2; j++) {
+		for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
+			I915_WRITE(reg,
+					(use_fdi_mode) ?
+						hsw_ddi_translations_fdi[i] :
+						hsw_ddi_translations_dp[i]);
+			reg += 4;
+		}
+		udelay(20);
+	}
+}
+
+/* Program DDI buffers translations for DP. By default, program ports A-D in DP
+ * mode and port E for FDI.
+ */
+static void intel_hsw_prepare_ddi_buffers(struct drm_device *dev)
+{
+	int port;
+
+	for (port = PORT_A; port < PORT_E; port++)
+		hsw_prepare_ddi_buffers(dev, port, false);
+
+	/* DDI E is the suggested one to work in FDI mode, so program is as such by
+	 * default. It will have to be re-programmed in case a digital DP output
+	 * will be detected on it
+	 */
+	hsw_prepare_ddi_buffers(dev, PORT_E, true);
+}
+
 /* Manual link training for Ivy Bridge A0 parts */
 static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
 {
@@ -9732,8 +9812,10 @@ void intel_modeset_init(struct drm_device *dev)
 
 	intel_init_quirks(dev);
 
-	if (IS_HASWELL(dev))
+	if (IS_HASWELL(dev)) {
 		intel_init_power_wells(dev);
+		intel_hsw_prepare_ddi_buffers(dev);
+	}
 
 	intel_init_display(dev);
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 79cabf5..6862ed3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -420,6 +420,7 @@ extern void intel_init_clock_gating(struct drm_device *dev);
 extern void intel_write_eld(struct drm_encoder *encoder,
 			    struct drm_display_mode *mode);
 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
+extern void hsw_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode);
 
 /* For use by IVB LP watermark workaround in intel_sprite.c */
 extern void sandybridge_update_wm(struct drm_device *dev);
-- 
1.7.10

  parent reply	other threads:[~2012-04-13 20:35 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-13 20:08 [PATCH 00/29] Haswell round 3 Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 01/29] drm/i915: add definition of LPT FDI port width registers Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 02/29] drm/i915: add WRPLL divider programming bits Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 03/29] drm/i915: add Haswell DIP controls registers Eugeni Dodonov
2012-04-17 10:12   ` Daniel Vetter
2012-04-17 12:02     ` Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 04/29] drm/i915: support infoframes on Haswell Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 05/29] drm/i915: prevent NULL pointer exception when using gmbus Eugeni Dodonov
2012-04-13 20:18   ` Chris Wilson
2012-04-14  0:26     ` Eugeni Dodonov
2012-04-14 15:58       ` Daniel Vetter
2012-04-14 16:01         ` Chris Wilson
2012-04-13 20:08 ` [PATCH 06/29] drm/i915: add support for SBI ops Eugeni Dodonov
2012-04-13 20:26   ` Chris Wilson
2012-04-14  0:28     ` Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 07/29] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge Eugeni Dodonov
2012-04-13 20:27   ` Chris Wilson
2012-04-13 20:08 ` [PATCH 08/29] drm/i915: share forcewaking code between IVB and HSW Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 09/29] drm/i915: haswell has 3 pipes as well Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 10/29] drm/i915: reuse Ivybridge interrupts code for Haswell Eugeni Dodonov
2012-04-15 23:29   ` Daniel Vetter
2012-04-13 20:08 ` [PATCH 11/29] drm/i915: share pipe count handling with Ivybridge Eugeni Dodonov
2012-04-17 10:19   ` Daniel Vetter
2012-04-17 10:36     ` Chris Wilson
2012-04-17 11:26       ` Daniel Vetter
2012-04-17 11:38         ` Chris Wilson
2012-04-13 20:08 ` [PATCH 12/29] drm/i915: share IVB cursor routine with Haswell Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 13/29] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-04-17 10:20   ` Daniel Vetter
2012-04-13 20:08 ` [PATCH 14/29] drm/i915: do not use fdi_normal_train on haswell Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell Eugeni Dodonov
2012-04-13 20:55   ` Chris Wilson
2012-04-14  0:31     ` Eugeni Dodonov
2012-04-15 23:52   ` Daniel Vetter
2012-04-13 20:08 ` [PATCH 16/29] drm/i915: detect PCH encoders on Haswell Eugeni Dodonov
2012-04-17 10:21   ` Daniel Vetter
2012-04-13 20:08 ` [PATCH 17/29] drm/i915: enable power wells on haswell init Eugeni Dodonov
2012-04-13 21:03   ` Chris Wilson
2012-04-14  1:26     ` Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 18/29] drm/i915: disable rc6 on haswell for now Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 19/29] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 20/29] drm/i915: do not use old code paths " Eugeni Dodonov
2012-04-13 20:08 ` Eugeni Dodonov [this message]
2012-04-13 21:05   ` [PATCH 21/29] drm/i915: initialize DDI buffer translations Chris Wilson
2012-04-13 21:11   ` Chris Wilson
2012-04-14  1:32     ` Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 22/29] drm/i915: perform Haswell DDI link training in FDI mode Eugeni Dodonov
2012-04-13 20:08 ` [PATCH 23/29] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-04-13 20:09 ` [PATCH 24/29] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-04-15 23:49   ` Daniel Vetter
2012-04-16  0:44     ` Eugeni Dodonov
2012-04-16  8:26       ` Chris Wilson
2012-04-16  8:56         ` Daniel Vetter
2012-04-13 20:09 ` [PATCH 25/29] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-04-13 21:17   ` Chris Wilson
2012-04-14  0:37     ` Eugeni Dodonov
2012-04-15 23:36       ` Daniel Vetter
2012-04-13 20:09 ` [PATCH 26/29] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-04-13 20:09 ` [PATCH 27/29] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-04-13 20:09 ` [PATCH 28/29] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-04-13 20:09 ` [PATCH 29/29] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-04-17 10:49 ` [PATCH 00/29] Haswell round 3 Daniel Vetter
2012-04-17 11:58   ` Eugeni Dodonov

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