* [PATCH] drm/i915: print computed bpp in dp link configuration @ 2012-04-20 9:08 Daniel Vetter 2012-04-20 9:13 ` Chris Wilson 0 siblings, 1 reply; 9+ messages in thread From: Daniel Vetter @ 2012-04-20 9:08 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter Pretty useful to debug our DP bandwidth woes. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44cf32c..4640790 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -717,9 +717,9 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, intel_dp->lane_count = lane_count; adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw); DRM_DEBUG_KMS("Display port link bw %02x lane " - "count %d clock %d\n", + "count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, - adjusted_mode->clock); + adjusted_mode->clock, bpp); return true; } } -- 1.7.10 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 9:08 [PATCH] drm/i915: print computed bpp in dp link configuration Daniel Vetter @ 2012-04-20 9:13 ` Chris Wilson 2012-04-20 9:29 ` Daniel Vetter 0 siblings, 1 reply; 9+ messages in thread From: Chris Wilson @ 2012-04-20 9:13 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter On Fri, 20 Apr 2012 11:08:45 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Pretty useful to debug our DP bandwidth woes. I'd like to see the computed values as well, i..e the link_required and max_data_rate. -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 9:13 ` Chris Wilson @ 2012-04-20 9:29 ` Daniel Vetter 2012-04-20 9:38 ` Chris Wilson 0 siblings, 1 reply; 9+ messages in thread From: Daniel Vetter @ 2012-04-20 9:29 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter Pretty useful to debug our DP bandwidth woes. v2: Also print out the required and available link bandwidth, suggested by Chris Wilson. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_dp.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44cf32c..ad9d741 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -688,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, int lane_count, clock; int max_lane_count = intel_dp_max_lane_count(intel_dp); int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; - int bpp; + int bpp, mode_rate; static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { @@ -706,20 +706,22 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, return false; bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; + mode_rate = intel_dp_link_required(mode->clock, bpp); for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { for (clock = 0; clock <= max_clock; clock++) { int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); - if (intel_dp_link_required(mode->clock, bpp) - <= link_avail) { + if (mode_rate <= link_avail) { intel_dp->link_bw = bws[clock]; intel_dp->lane_count = lane_count; adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw); DRM_DEBUG_KMS("Display port link bw %02x lane " - "count %d clock %d\n", + "count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, - adjusted_mode->clock); + adjusted_mode->clock, bpp); + DRM_DEBUG_KMS("Display port link bw required %i available %i\n", + mode_rate, link_avail); return true; } } -- 1.7.10 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 9:29 ` Daniel Vetter @ 2012-04-20 9:38 ` Chris Wilson 2012-04-20 14:25 ` Daniel Vetter 0 siblings, 1 reply; 9+ messages in thread From: Chris Wilson @ 2012-04-20 9:38 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter On Fri, 20 Apr 2012 11:29:48 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Pretty useful to debug our DP bandwidth woes. > > v2: Also print out the required and available link bandwidth, > suggested by Chris Wilson. And possibly even more important in the failure path! ;-) -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 9:38 ` Chris Wilson @ 2012-04-20 14:25 ` Daniel Vetter 2012-04-20 14:37 ` Chris Wilson 0 siblings, 1 reply; 9+ messages in thread From: Daniel Vetter @ 2012-04-20 14:25 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter Pretty useful to debug our DP bandwidth woes. v2: Also print out the required and available link bandwidth, suggested by Chris Wilson. v3: Also print out the input parameters so that diagnosing failures to find a valid dp link configuration is possible. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_dp.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44cf32c..4b7a286 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -688,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, int lane_count, clock; int max_lane_count = intel_dp_max_lane_count(intel_dp); int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; - int bpp; + int bpp, mode_rate; static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { @@ -702,24 +702,30 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, mode->clock = intel_dp->panel_fixed_mode->clock; } + DRM_DEBUG_KMS("Display port link computation with max lane count %i " + "max bw %02x pixel clock %iKHz\n", + max_lane_count, bws[max_clock], mode->clock); + if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode)) return false; bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; + mode_rate = intel_dp_link_required(mode->clock, bpp); for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { for (clock = 0; clock <= max_clock; clock++) { int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); - if (intel_dp_link_required(mode->clock, bpp) - <= link_avail) { + if (mode_rate <= link_avail) { intel_dp->link_bw = bws[clock]; intel_dp->lane_count = lane_count; adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw); DRM_DEBUG_KMS("Display port link bw %02x lane " - "count %d clock %d\n", + "count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, - adjusted_mode->clock); + adjusted_mode->clock, bpp); + DRM_DEBUG_KMS("Display port link bw required %i available %i\n", + mode_rate, link_avail); return true; } } -- 1.7.10 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 14:25 ` Daniel Vetter @ 2012-04-20 14:37 ` Chris Wilson 2012-04-20 18:11 ` Daniel Vetter 2012-04-20 18:23 ` Daniel Vetter 0 siblings, 2 replies; 9+ messages in thread From: Chris Wilson @ 2012-04-20 14:37 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter On Fri, 20 Apr 2012 16:25:58 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Pretty useful to debug our DP bandwidth woes. > > v2: Also print out the required and available link bandwidth, > suggested by Chris Wilson. > > v3: Also print out the input parameters so that diagnosing failures to > find a valid dp link configuration is possible. > > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Maybe s/Display port/DP/ in the messages, it just seems an unusual and unnecessary construct. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 14:37 ` Chris Wilson @ 2012-04-20 18:11 ` Daniel Vetter 2012-04-20 18:23 ` Daniel Vetter 1 sibling, 0 replies; 9+ messages in thread From: Daniel Vetter @ 2012-04-20 18:11 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter Pretty useful to debug our DP bandwidth woes. v2: Also print out the required and available link bandwidth, suggested by Chris Wilson. v3: Also print out the input parameters so that diagnosing failures to find a valid dp link configuration is possible. v4: s/Display port/DP/ to shorten the output. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_dp.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44cf32c..4b7a286 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -688,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, int lane_count, clock; int max_lane_count = intel_dp_max_lane_count(intel_dp); int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; - int bpp; + int bpp, mode_rate; static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { @@ -702,24 +702,30 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, mode->clock = intel_dp->panel_fixed_mode->clock; } + DRM_DEBUG_KMS("Display port link computation with max lane count %i " + "max bw %02x pixel clock %iKHz\n", + max_lane_count, bws[max_clock], mode->clock); + if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode)) return false; bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; + mode_rate = intel_dp_link_required(mode->clock, bpp); for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { for (clock = 0; clock <= max_clock; clock++) { int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); - if (intel_dp_link_required(mode->clock, bpp) - <= link_avail) { + if (mode_rate <= link_avail) { intel_dp->link_bw = bws[clock]; intel_dp->lane_count = lane_count; adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw); DRM_DEBUG_KMS("Display port link bw %02x lane " - "count %d clock %d\n", + "count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, - adjusted_mode->clock); + adjusted_mode->clock, bpp); + DRM_DEBUG_KMS("Display port link bw required %i available %i\n", + mode_rate, link_avail); return true; } } -- 1.7.10 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 14:37 ` Chris Wilson 2012-04-20 18:11 ` Daniel Vetter @ 2012-04-20 18:23 ` Daniel Vetter 2012-04-21 16:52 ` Daniel Vetter 1 sibling, 1 reply; 9+ messages in thread From: Daniel Vetter @ 2012-04-20 18:23 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter Pretty useful to debug our DP bandwidth woes. v2: Also print out the required and available link bandwidth, suggested by Chris Wilson. v3: Also print out the input parameters so that diagnosing failures to find a valid dp link configuration is possible. v4: s/Display port/DP/ to shorten the output. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_dp.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44cf32c..22c66b7 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -688,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, int lane_count, clock; int max_lane_count = intel_dp_max_lane_count(intel_dp); int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; - int bpp; + int bpp, mode_rate; static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { @@ -702,24 +702,30 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, mode->clock = intel_dp->panel_fixed_mode->clock; } + DRM_DEBUG_KMS("DP link computation with max lane count %i " + "max bw %02x pixel clock %iKHz\n", + max_lane_count, bws[max_clock], mode->clock); + if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode)) return false; bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; + mode_rate = intel_dp_link_required(mode->clock, bpp); for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { for (clock = 0; clock <= max_clock; clock++) { int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); - if (intel_dp_link_required(mode->clock, bpp) - <= link_avail) { + if (mode_rate <= link_avail) { intel_dp->link_bw = bws[clock]; intel_dp->lane_count = lane_count; adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw); - DRM_DEBUG_KMS("Display port link bw %02x lane " - "count %d clock %d\n", + DRM_DEBUG_KMS("DP link bw %02x lane " + "count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, - adjusted_mode->clock); + adjusted_mode->clock, bpp); + DRM_DEBUG_KMS("DP link bw required %i available %i\n", + mode_rate, link_avail); return true; } } -- 1.7.10 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: print computed bpp in dp link configuration 2012-04-20 18:23 ` Daniel Vetter @ 2012-04-21 16:52 ` Daniel Vetter 0 siblings, 0 replies; 9+ messages in thread From: Daniel Vetter @ 2012-04-21 16:52 UTC (permalink / raw) To: Intel Graphics Development; +Cc: Daniel Vetter On Fri, Apr 20, 2012 at 08:23:49PM +0200, Daniel Vetter wrote: > Pretty useful to debug our DP bandwidth woes. > > v2: Also print out the required and available link bandwidth, > suggested by Chris Wilson. > > v3: Also print out the input parameters so that diagnosing failures to > find a valid dp link configuration is possible. > > v4: s/Display port/DP/ to shorten the output. > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Queued for -next, thanks for the review. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48 ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2012-04-21 16:51 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2012-04-20 9:08 [PATCH] drm/i915: print computed bpp in dp link configuration Daniel Vetter 2012-04-20 9:13 ` Chris Wilson 2012-04-20 9:29 ` Daniel Vetter 2012-04-20 9:38 ` Chris Wilson 2012-04-20 14:25 ` Daniel Vetter 2012-04-20 14:37 ` Chris Wilson 2012-04-20 18:11 ` Daniel Vetter 2012-04-20 18:23 ` Daniel Vetter 2012-04-21 16:52 ` Daniel Vetter
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