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* [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
@ 2018-10-04  9:29 ` Marc Zyngier
  0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2018-10-04  9:29 UTC (permalink / raw)
  To: Paolo Bonzini, Radim Krčmář
  Cc: linux-arm-kernel, Florian Fainelli, kvmarm, kvm

The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
are not correctly ordered, leading to a BUG() at boot time.

Move them to their natural location.

Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
Reported-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
Paolo, Radim,

Could you please send this patch directly to Greg so that it makes it
into 4.19? I thought I had it fixed long before the merge window, and
obviously didn't...

Thanks,

	M.

 arch/arm/kvm/coproc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 450c7a4fbc8a..cb094e55dc5f 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -478,15 +478,15 @@ static const struct coproc_reg cp15_regs[] = {
 
 	/* ICC_SGI1R */
 	{ CRm64(12), Op1( 0), is64, access_gic_sgi},
-	/* ICC_ASGI1R */
-	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
-	/* ICC_SGI0R */
-	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
 
 	/* VBAR: swapped by interrupt.S. */
 	{ CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
 			NULL, reset_val, c12_VBAR, 0x00000000 },
 
+	/* ICC_ASGI1R */
+	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
+	/* ICC_SGI0R */
+	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
 	/* ICC_SRE */
 	{ CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre },
 
-- 
2.19.0

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
@ 2018-10-04  9:29 ` Marc Zyngier
  0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2018-10-04  9:29 UTC (permalink / raw)
  To: linux-arm-kernel

The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
are not correctly ordered, leading to a BUG() at boot time.

Move them to their natural location.

Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
Reported-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
Paolo, Radim,

Could you please send this patch directly to Greg so that it makes it
into 4.19? I thought I had it fixed long before the merge window, and
obviously didn't...

Thanks,

	M.

 arch/arm/kvm/coproc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 450c7a4fbc8a..cb094e55dc5f 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -478,15 +478,15 @@ static const struct coproc_reg cp15_regs[] = {
 
 	/* ICC_SGI1R */
 	{ CRm64(12), Op1( 0), is64, access_gic_sgi},
-	/* ICC_ASGI1R */
-	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
-	/* ICC_SGI0R */
-	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
 
 	/* VBAR: swapped by interrupt.S. */
 	{ CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
 			NULL, reset_val, c12_VBAR, 0x00000000 },
 
+	/* ICC_ASGI1R */
+	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
+	/* ICC_SGI0R */
+	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
 	/* ICC_SRE */
 	{ CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre },
 
-- 
2.19.0

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
  2018-10-04  9:29 ` Marc Zyngier
@ 2018-10-04 17:19   ` Florian Fainelli
  -1 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2018-10-04 17:19 UTC (permalink / raw)
  To: Marc Zyngier, Paolo Bonzini, Radim Krčmář
  Cc: linux-arm-kernel, kvmarm, kvm

On 10/04/2018 02:29 AM, Marc Zyngier wrote:
> The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
> are not correctly ordered, leading to a BUG() at boot time.
> 
> Move them to their natural location.
> 
> Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
> Reported-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> Paolo, Radim,
> 
> Could you please send this patch directly to Greg so that it makes it
> into 4.19? I thought I had it fixed long before the merge window, and
> obviously didn't...

Thanks for the quick fix! I probably won't be able to test this until 8h
from now but this looks obviously correct.

> 
> Thanks,
> 
> 	M.
> 
>  arch/arm/kvm/coproc.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 450c7a4fbc8a..cb094e55dc5f 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -478,15 +478,15 @@ static const struct coproc_reg cp15_regs[] = {
>  
>  	/* ICC_SGI1R */
>  	{ CRm64(12), Op1( 0), is64, access_gic_sgi},
> -	/* ICC_ASGI1R */
> -	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
> -	/* ICC_SGI0R */
> -	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
>  
>  	/* VBAR: swapped by interrupt.S. */
>  	{ CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
>  			NULL, reset_val, c12_VBAR, 0x00000000 },
>  
> +	/* ICC_ASGI1R */
> +	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
> +	/* ICC_SGI0R */
> +	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
>  	/* ICC_SRE */
>  	{ CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre },
>  
> 


-- 
Florian

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
@ 2018-10-04 17:19   ` Florian Fainelli
  0 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2018-10-04 17:19 UTC (permalink / raw)
  To: linux-arm-kernel

On 10/04/2018 02:29 AM, Marc Zyngier wrote:
> The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
> are not correctly ordered, leading to a BUG() at boot time.
> 
> Move them to their natural location.
> 
> Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
> Reported-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> Paolo, Radim,
> 
> Could you please send this patch directly to Greg so that it makes it
> into 4.19? I thought I had it fixed long before the merge window, and
> obviously didn't...

Thanks for the quick fix! I probably won't be able to test this until 8h
from now but this looks obviously correct.

> 
> Thanks,
> 
> 	M.
> 
>  arch/arm/kvm/coproc.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 450c7a4fbc8a..cb094e55dc5f 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -478,15 +478,15 @@ static const struct coproc_reg cp15_regs[] = {
>  
>  	/* ICC_SGI1R */
>  	{ CRm64(12), Op1( 0), is64, access_gic_sgi},
> -	/* ICC_ASGI1R */
> -	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
> -	/* ICC_SGI0R */
> -	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
>  
>  	/* VBAR: swapped by interrupt.S. */
>  	{ CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
>  			NULL, reset_val, c12_VBAR, 0x00000000 },
>  
> +	/* ICC_ASGI1R */
> +	{ CRm64(12), Op1( 1), is64, access_gic_sgi},
> +	/* ICC_SGI0R */
> +	{ CRm64(12), Op1( 2), is64, access_gic_sgi},
>  	/* ICC_SRE */
>  	{ CRn(12), CRm(12), Op1( 0), Op2(5), is32, access_gic_sre },
>  
> 


-- 
Florian

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
  2018-10-04  9:29 ` Marc Zyngier
@ 2018-10-05  3:38   ` Florian Fainelli
  -1 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2018-10-05  3:38 UTC (permalink / raw)
  To: Marc Zyngier, Paolo Bonzini, Radim Krčmář
  Cc: linux-arm-kernel, kvmarm, kvm

Le 10/04/18 à 02:29, Marc Zyngier a écrit :
> The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
> are not correctly ordered, leading to a BUG() at boot time.
> 
> Move them to their natural location.
> 
> Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
> Reported-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Tested-by: Florian Fainelli <f.fainelli@gmail.com>

Thanks!
-- 
Florian
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array
@ 2018-10-05  3:38   ` Florian Fainelli
  0 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2018-10-05  3:38 UTC (permalink / raw)
  To: linux-arm-kernel

Le 10/04/18 ? 02:29, Marc Zyngier a ?crit?:
> The ICC_ASGI1R and ICC_SGI0R register entries in the cp15 array
> are not correctly ordered, leading to a BUG() at boot time.
> 
> Move them to their natural location.
> 
> Fixes: 3e8a8a50c7ef ("KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses")
> Reported-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Tested-by: Florian Fainelli <f.fainelli@gmail.com>

Thanks!
-- 
Florian

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-10-05  3:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-04  9:29 [PATCH] ARM: KVM: Correctly order SGI register entries in the cp15 array Marc Zyngier
2018-10-04  9:29 ` Marc Zyngier
2018-10-04 17:19 ` Florian Fainelli
2018-10-04 17:19   ` Florian Fainelli
2018-10-05  3:38 ` Florian Fainelli
2018-10-05  3:38   ` Florian Fainelli

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