From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>, Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [PATCH v2 3/3] iommu/tegra: smmu: Refrain from accessing to AHB registers Date: Tue, 24 Apr 2012 15:05:16 +0300 [thread overview] Message-ID: <1335269116-9578-3-git-send-email-hdoyu@nvidia.com> (raw) In-Reply-To: <1335269116-9578-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Use "tegra_ahb_enable_smmu()" to inform AHB that SMMU is ready, instead of directly aceessing AHB registers. Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- drivers/iommu/tegra-smmu.c | 40 ++++++++-------------------------------- 1 files changed, 8 insertions(+), 32 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index ecd6790..de9fafe 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -36,6 +36,7 @@ #include <mach/iomap.h> #include <mach/smmu.h> +#include <mach/tegra-ahb.h> /* bitmap of the page sizes currently supported */ #define SMMU_IOMMU_PGSIZES (SZ_4K) @@ -111,11 +112,6 @@ #define SMMU_PDE_NEXT_SHIFT 28 -/* AHB Arbiter Registers */ -#define AHB_XBAR_CTRL 0xe0 -#define AHB_XBAR_CTRL_SMMU_INIT_DONE_DONE 1 -#define AHB_XBAR_CTRL_SMMU_INIT_DONE_SHIFT 17 - #define SMMU_NUM_ASIDS 4 #define SMMU_TLB_FLUSH_VA_SECTION__MASK 0xffc00000 #define SMMU_TLB_FLUSH_VA_SECTION__SHIFT 12 /* right shift */ @@ -235,7 +231,7 @@ struct smmu_as { * Per SMMU device - IOMMU device */ struct smmu_device { - void __iomem *regs, *regs_ahbarb; + void __iomem *regs; unsigned long iovmm_base; /* remappable base address */ unsigned long page_count; /* total remappable size */ spinlock_t lock; @@ -257,7 +253,7 @@ struct smmu_device { static struct smmu_device *smmu_handle; /* unique for a system */ /* - * SMMU/AHB register accessors + * SMMU register accessors */ static inline u32 smmu_read(struct smmu_device *smmu, size_t offs) { @@ -268,15 +264,6 @@ static inline void smmu_write(struct smmu_device *smmu, u32 val, size_t offs) writel(val, smmu->regs + offs); } -static inline u32 ahb_read(struct smmu_device *smmu, size_t offs) -{ - return readl(smmu->regs_ahbarb + offs); -} -static inline void ahb_write(struct smmu_device *smmu, u32 val, size_t offs) -{ - writel(val, smmu->regs_ahbarb + offs); -} - #define VA_PAGE_TO_PA(va, page) \ (page_to_phys(page) + ((unsigned long)(va) & ~PAGE_MASK)) @@ -397,11 +384,7 @@ static void smmu_setup_regs(struct smmu_device *smmu) smmu_write(smmu, SMMU_PTC_CONFIG_RESET_VAL, SMMU_PTC_CONFIG); smmu_flush_regs(smmu, 1); - - val = ahb_read(smmu, AHB_XBAR_CTRL); - val |= AHB_XBAR_CTRL_SMMU_INIT_DONE_DONE << - AHB_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; - ahb_write(smmu, val, AHB_XBAR_CTRL); + tegra_ahb_enable_smmu(); } static void flush_ptc_and_tlb(struct smmu_device *smmu, @@ -883,7 +866,7 @@ static int tegra_smmu_resume(struct device *dev) static int tegra_smmu_probe(struct platform_device *pdev) { struct smmu_device *smmu; - struct resource *regs, *regs2, *window; + struct resource *regs, *window; struct device *dev = &pdev->dev; int i, err = 0; @@ -893,9 +876,8 @@ static int tegra_smmu_probe(struct platform_device *pdev) BUILD_BUG_ON(PAGE_SHIFT != SMMU_PAGE_SHIFT); regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs2 = platform_get_resource(pdev, IORESOURCE_MEM, 1); - window = platform_get_resource(pdev, IORESOURCE_MEM, 2); - if (!regs || !regs2 || !window) { + window = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!regs || !window) { dev_err(dev, "No SMMU resources\n"); return -ENODEV; } @@ -911,9 +893,7 @@ static int tegra_smmu_probe(struct platform_device *pdev) smmu->iovmm_base = (unsigned long)window->start; smmu->page_count = resource_size(window) >> SMMU_PAGE_SHIFT; smmu->regs = devm_ioremap(dev, regs->start, resource_size(regs)); - smmu->regs_ahbarb = devm_ioremap(dev, regs2->start, - resource_size(regs2)); - if (!smmu->regs || !smmu->regs_ahbarb) { + if (!smmu->regs) { dev_err(dev, "failed to remap SMMU registers\n"); err = -ENXIO; goto fail; @@ -960,8 +940,6 @@ fail: __free_page(smmu->avp_vector_page); if (smmu->regs) devm_iounmap(dev, smmu->regs); - if (smmu->regs_ahbarb) - devm_iounmap(dev, smmu->regs_ahbarb); if (smmu && smmu->as) { for (i = 0; i < smmu->num_as; i++) { if (smmu->as[i].pdir_page) { @@ -993,8 +971,6 @@ static int tegra_smmu_remove(struct platform_device *pdev) __free_page(smmu->avp_vector_page); if (smmu->regs) devm_iounmap(dev, smmu->regs); - if (smmu->regs_ahbarb) - devm_iounmap(dev, smmu->regs_ahbarb); devm_kfree(dev, smmu); smmu_handle = NULL; return 0; -- 1.7.5.4
WARNING: multiple messages have this Message-ID (diff)
From: Hiroshi DOYU <hdoyu@nvidia.com> To: hdoyu@nvidia.com Cc: linux-tegra@vger.kernel.org, Joerg Roedel <joerg.roedel@amd.com>, Thierry Reding <thierry.reding@avionic-design.de>, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] iommu/tegra: smmu: Refrain from accessing to AHB registers Date: Tue, 24 Apr 2012 15:05:16 +0300 [thread overview] Message-ID: <1335269116-9578-3-git-send-email-hdoyu@nvidia.com> (raw) In-Reply-To: <1335269116-9578-1-git-send-email-hdoyu@nvidia.com> Use "tegra_ahb_enable_smmu()" to inform AHB that SMMU is ready, instead of directly aceessing AHB registers. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> --- drivers/iommu/tegra-smmu.c | 40 ++++++++-------------------------------- 1 files changed, 8 insertions(+), 32 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index ecd6790..de9fafe 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -36,6 +36,7 @@ #include <mach/iomap.h> #include <mach/smmu.h> +#include <mach/tegra-ahb.h> /* bitmap of the page sizes currently supported */ #define SMMU_IOMMU_PGSIZES (SZ_4K) @@ -111,11 +112,6 @@ #define SMMU_PDE_NEXT_SHIFT 28 -/* AHB Arbiter Registers */ -#define AHB_XBAR_CTRL 0xe0 -#define AHB_XBAR_CTRL_SMMU_INIT_DONE_DONE 1 -#define AHB_XBAR_CTRL_SMMU_INIT_DONE_SHIFT 17 - #define SMMU_NUM_ASIDS 4 #define SMMU_TLB_FLUSH_VA_SECTION__MASK 0xffc00000 #define SMMU_TLB_FLUSH_VA_SECTION__SHIFT 12 /* right shift */ @@ -235,7 +231,7 @@ struct smmu_as { * Per SMMU device - IOMMU device */ struct smmu_device { - void __iomem *regs, *regs_ahbarb; + void __iomem *regs; unsigned long iovmm_base; /* remappable base address */ unsigned long page_count; /* total remappable size */ spinlock_t lock; @@ -257,7 +253,7 @@ struct smmu_device { static struct smmu_device *smmu_handle; /* unique for a system */ /* - * SMMU/AHB register accessors + * SMMU register accessors */ static inline u32 smmu_read(struct smmu_device *smmu, size_t offs) { @@ -268,15 +264,6 @@ static inline void smmu_write(struct smmu_device *smmu, u32 val, size_t offs) writel(val, smmu->regs + offs); } -static inline u32 ahb_read(struct smmu_device *smmu, size_t offs) -{ - return readl(smmu->regs_ahbarb + offs); -} -static inline void ahb_write(struct smmu_device *smmu, u32 val, size_t offs) -{ - writel(val, smmu->regs_ahbarb + offs); -} - #define VA_PAGE_TO_PA(va, page) \ (page_to_phys(page) + ((unsigned long)(va) & ~PAGE_MASK)) @@ -397,11 +384,7 @@ static void smmu_setup_regs(struct smmu_device *smmu) smmu_write(smmu, SMMU_PTC_CONFIG_RESET_VAL, SMMU_PTC_CONFIG); smmu_flush_regs(smmu, 1); - - val = ahb_read(smmu, AHB_XBAR_CTRL); - val |= AHB_XBAR_CTRL_SMMU_INIT_DONE_DONE << - AHB_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; - ahb_write(smmu, val, AHB_XBAR_CTRL); + tegra_ahb_enable_smmu(); } static void flush_ptc_and_tlb(struct smmu_device *smmu, @@ -883,7 +866,7 @@ static int tegra_smmu_resume(struct device *dev) static int tegra_smmu_probe(struct platform_device *pdev) { struct smmu_device *smmu; - struct resource *regs, *regs2, *window; + struct resource *regs, *window; struct device *dev = &pdev->dev; int i, err = 0; @@ -893,9 +876,8 @@ static int tegra_smmu_probe(struct platform_device *pdev) BUILD_BUG_ON(PAGE_SHIFT != SMMU_PAGE_SHIFT); regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs2 = platform_get_resource(pdev, IORESOURCE_MEM, 1); - window = platform_get_resource(pdev, IORESOURCE_MEM, 2); - if (!regs || !regs2 || !window) { + window = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!regs || !window) { dev_err(dev, "No SMMU resources\n"); return -ENODEV; } @@ -911,9 +893,7 @@ static int tegra_smmu_probe(struct platform_device *pdev) smmu->iovmm_base = (unsigned long)window->start; smmu->page_count = resource_size(window) >> SMMU_PAGE_SHIFT; smmu->regs = devm_ioremap(dev, regs->start, resource_size(regs)); - smmu->regs_ahbarb = devm_ioremap(dev, regs2->start, - resource_size(regs2)); - if (!smmu->regs || !smmu->regs_ahbarb) { + if (!smmu->regs) { dev_err(dev, "failed to remap SMMU registers\n"); err = -ENXIO; goto fail; @@ -960,8 +940,6 @@ fail: __free_page(smmu->avp_vector_page); if (smmu->regs) devm_iounmap(dev, smmu->regs); - if (smmu->regs_ahbarb) - devm_iounmap(dev, smmu->regs_ahbarb); if (smmu && smmu->as) { for (i = 0; i < smmu->num_as; i++) { if (smmu->as[i].pdir_page) { @@ -993,8 +971,6 @@ static int tegra_smmu_remove(struct platform_device *pdev) __free_page(smmu->avp_vector_page); if (smmu->regs) devm_iounmap(dev, smmu->regs); - if (smmu->regs_ahbarb) - devm_iounmap(dev, smmu->regs_ahbarb); devm_kfree(dev, smmu); smmu_handle = NULL; return 0; -- 1.7.5.4
next prev parent reply other threads:[~2012-04-24 12:05 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-04-24 12:05 [PATCH v2 1/3] ARM: tegra: Add AHB driver Hiroshi DOYU 2012-04-24 12:05 ` Hiroshi DOYU 2012-04-24 12:05 ` Hiroshi DOYU 2012-04-24 12:05 ` [PATCH v2 2/3] ARM: tegra: Add SMMU enabler in AHB Hiroshi DOYU 2012-04-24 12:05 ` Hiroshi DOYU 2012-04-24 12:32 ` Felipe Balbi 2012-04-24 12:32 ` Felipe Balbi [not found] ` <20120424123248.GG8444-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org> 2012-04-24 12:39 ` Hiroshi Doyu 2012-04-24 12:39 ` Hiroshi Doyu 2012-04-24 12:39 ` Hiroshi Doyu [not found] ` <20120424.153930.1438573079107186567.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2012-04-24 12:41 ` Felipe Balbi 2012-04-24 12:41 ` Felipe Balbi 2012-04-24 12:41 ` Felipe Balbi [not found] ` <20120424124115.GL8444-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org> 2012-04-24 13:03 ` Hiroshi Doyu 2012-04-24 13:03 ` Hiroshi Doyu 2012-04-24 13:03 ` Hiroshi Doyu 2012-04-24 13:25 ` Felipe Balbi 2012-04-24 13:25 ` Felipe Balbi 2012-04-24 13:25 ` Felipe Balbi [not found] ` <1335269116-9578-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2012-04-24 19:59 ` Russell King - ARM Linux 2012-04-24 19:59 ` Russell King - ARM Linux 2012-04-24 19:59 ` Russell King - ARM Linux [not found] ` <1335269116-9578-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2012-04-24 12:05 ` Hiroshi DOYU [this message] 2012-04-24 12:05 ` [PATCH v2 3/3] iommu/tegra: smmu: Refrain from accessing to AHB registers Hiroshi DOYU 2012-04-24 12:16 ` [PATCH v2 1/3] ARM: tegra: Add AHB driver Felipe Balbi 2012-04-24 12:16 ` Felipe Balbi 2012-04-24 12:16 ` Felipe Balbi [not found] ` <20120424121619.GF8444-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org> 2012-04-24 19:49 ` Stephen Warren 2012-04-24 19:49 ` Stephen Warren 2012-04-24 19:49 ` Stephen Warren [not found] ` <4F9703C2.50002-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2012-04-24 20:31 ` Felipe Balbi 2012-04-24 20:31 ` Felipe Balbi 2012-04-24 20:31 ` Felipe Balbi 2012-04-24 19:56 ` Russell King - ARM Linux 2012-04-24 19:56 ` Russell King - ARM Linux 2012-04-24 19:56 ` Russell King - ARM Linux [not found] ` <20120424195645.GB3628-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org> 2012-04-25 5:37 ` Hiroshi Doyu 2012-04-25 5:37 ` Hiroshi Doyu 2012-04-25 5:37 ` Hiroshi Doyu [not found] ` <20120425083747.466f5c98330af8964d980b8c-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2012-04-25 7:46 ` Felipe Balbi 2012-04-25 7:46 ` Felipe Balbi 2012-04-25 7:46 ` Felipe Balbi 2012-04-25 12:15 ` Arnd Bergmann 2012-04-25 12:15 ` Arnd Bergmann 2012-04-25 12:15 ` Arnd Bergmann [not found] ` <201204251215.22889.arnd-r2nGTMty4D4@public.gmane.org> 2012-04-25 15:59 ` Stephen Warren 2012-04-25 15:59 ` Stephen Warren 2012-04-25 15:59 ` Stephen Warren [not found] ` <4F981F6C.2050807-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2012-04-26 5:49 ` Hiroshi Doyu 2012-04-26 5:49 ` Hiroshi Doyu 2012-04-26 5:49 ` Hiroshi Doyu 2012-04-26 8:14 ` Peter De Schrijver 2012-04-26 8:14 ` Peter De Schrijver 2012-04-26 8:14 ` Peter De Schrijver
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