* [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight
@ 2012-04-25 17:28 Kamal Mostafa
2012-04-25 17:28 ` [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z Kamal Mostafa
2012-04-26 20:07 ` [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Daniel Vetter
0 siblings, 2 replies; 9+ messages in thread
From: Kamal Mostafa @ 2012-04-25 17:28 UTC (permalink / raw)
To: Intel Graphics Development
i915.enable_backlight=0 can be used to disable i915 backlight control
and the /sys/class/backlight/intel_backlight interface -- useful for
systems where intel_backight conflicts with BIOS backlight control.
BugLink: https://launchpad.net/bugs/954661
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
---
drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_panel.c | 12 ++++++++++++
3 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ae8a64f..ddb947b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -112,6 +112,12 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
MODULE_PARM_DESC(i915_enable_ppgtt,
"Enable PPGTT (default: true)");
+int i915_enable_backlight __read_mostly = -1;
+module_param_named(enable_backlight, i915_enable_backlight, int, 0644);
+MODULE_PARM_DESC(enable_backlight,
+ "Enable backlight control and the intel_backlight interface. "
+ "(default: -1 (auto))");
+
static struct drm_driver driver;
extern int intel_agp_enabled;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5fabc6c..6e52a42 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1087,6 +1087,7 @@ extern int i915_enable_rc6 __read_mostly;
extern int i915_enable_fbc __read_mostly;
extern bool i915_enable_hangcheck __read_mostly;
extern int i915_enable_ppgtt __read_mostly;
+extern int i915_enable_backlight __read_mostly;
extern int i915_suspend(struct drm_device *dev, pm_message_t state);
extern int i915_resume(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 48177ec..fcecbd2 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -259,6 +259,9 @@ void intel_panel_disable_backlight(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ if (!i915_enable_backlight)
+ return;
+
dev_priv->backlight_enabled = false;
intel_panel_actually_set_backlight(dev, 0);
}
@@ -267,6 +270,9 @@ void intel_panel_enable_backlight(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ if (!i915_enable_backlight)
+ return;
+
if (dev_priv->backlight_level == 0)
dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
@@ -333,6 +339,9 @@ int intel_panel_setup_backlight(struct drm_device *dev)
struct backlight_properties props;
struct drm_connector *connector;
+ if (!i915_enable_backlight)
+ return 0;
+
intel_panel_init_backlight(dev);
if (dev_priv->int_lvds_connector)
@@ -368,6 +377,9 @@ void intel_panel_destroy_backlight(struct drm_device *dev)
#else
int intel_panel_setup_backlight(struct drm_device *dev)
{
+ if (!i915_enable_backlight)
+ return;
+
intel_panel_init_backlight(dev);
return 0;
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z
2012-04-25 17:28 [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Kamal Mostafa
@ 2012-04-25 17:28 ` Kamal Mostafa
2012-04-27 20:56 ` Kamal Mostafa
2012-04-26 20:07 ` [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Daniel Vetter
1 sibling, 1 reply; 9+ messages in thread
From: Kamal Mostafa @ 2012-04-25 17:28 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Robert Hooker
From: Robert Hooker <robert.hooker@canonical.com>
Dell XPS 13z exhibits problems (backlight flashing/pulsating) when
intel_backlight is enabled at all, so disable it.
BugLink: https://launchpad.net/bugs/954661
Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
---
drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5908cd5..0c4cac4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9100,6 +9100,19 @@ static void quirk_ssc_force_disable(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE;
}
+
+/*
+ * Some machines (Dell XPS 13z) exhibit problems with i915 control of the
+ * backlight registers; Others may need the intel_backlight interface
+ * disabled for some other reason.
+ */
+static void quirk_backlight_disable(struct drm_device *dev)
+{
+ if (i915_enable_backlight == -1) {
+ i915_enable_backlight = 0;
+ DRM_DEBUG_DRIVER("disabling intel_backlight interface via quirk\n");
+ }
+}
struct intel_quirk {
int device;
@@ -9133,6 +9146,10 @@ struct intel_quirk intel_quirks[] = {
/* Sony Vaio Y cannot use SSC on LVDS */
{ 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },
+
+ /* Dell XPS 13z needs to disable the intel_backlight interface
+ (LP: #954661) */
+ { 0x0116, 0x1028, 0x052e, quirk_backlight_disable },
};
static void intel_init_quirks(struct drm_device *dev)
--
1.7.5.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight
2012-04-25 17:28 [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Kamal Mostafa
2012-04-25 17:28 ` [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z Kamal Mostafa
@ 2012-04-26 20:07 ` Daniel Vetter
2012-04-27 20:55 ` Kamal Mostafa
2012-05-14 18:53 ` Kamal Mostafa
1 sibling, 2 replies; 9+ messages in thread
From: Daniel Vetter @ 2012-04-26 20:07 UTC (permalink / raw)
To: Kamal Mostafa; +Cc: Intel Graphics Development
On Wed, Apr 25, 2012 at 10:28:41AM -0700, Kamal Mostafa wrote:
> i915.enable_backlight=0 can be used to disable i915 backlight control
> and the /sys/class/backlight/intel_backlight interface -- useful for
> systems where intel_backight conflicts with BIOS backlight control.
>
> BugLink: https://launchpad.net/bugs/954661
> Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Ok, I've just gone through the fun of merging a set of backlight quirks a
few weeks back. Then noticed that an awful lot of machines seem to be
affected and later on read about a few interesting bits in the
documentation. Turns out the hw is all good, it's just the driver totally
mishandling the backlight.
To cut things short: This time around I want more justification for the
quirk than just "this makes this one machine work somehow".
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 12 ++++++++++++
> 3 files changed, 19 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index ae8a64f..ddb947b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -112,6 +112,12 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
> MODULE_PARM_DESC(i915_enable_ppgtt,
> "Enable PPGTT (default: true)");
>
> +int i915_enable_backlight __read_mostly = -1;
> +module_param_named(enable_backlight, i915_enable_backlight, int, 0644);
> +MODULE_PARM_DESC(enable_backlight,
> + "Enable backlight control and the intel_backlight interface. "
> + "(default: -1 (auto))");
> +
> static struct drm_driver driver;
> extern int intel_agp_enabled;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5fabc6c..6e52a42 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1087,6 +1087,7 @@ extern int i915_enable_rc6 __read_mostly;
> extern int i915_enable_fbc __read_mostly;
> extern bool i915_enable_hangcheck __read_mostly;
> extern int i915_enable_ppgtt __read_mostly;
> +extern int i915_enable_backlight __read_mostly;
>
> extern int i915_suspend(struct drm_device *dev, pm_message_t state);
> extern int i915_resume(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 48177ec..fcecbd2 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -259,6 +259,9 @@ void intel_panel_disable_backlight(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> + if (!i915_enable_backlight)
> + return;
> +
> dev_priv->backlight_enabled = false;
> intel_panel_actually_set_backlight(dev, 0);
> }
> @@ -267,6 +270,9 @@ void intel_panel_enable_backlight(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> + if (!i915_enable_backlight)
> + return;
> +
> if (dev_priv->backlight_level == 0)
> dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
>
> @@ -333,6 +339,9 @@ int intel_panel_setup_backlight(struct drm_device *dev)
> struct backlight_properties props;
> struct drm_connector *connector;
>
> + if (!i915_enable_backlight)
> + return 0;
> +
> intel_panel_init_backlight(dev);
>
> if (dev_priv->int_lvds_connector)
> @@ -368,6 +377,9 @@ void intel_panel_destroy_backlight(struct drm_device *dev)
> #else
> int intel_panel_setup_backlight(struct drm_device *dev)
> {
> + if (!i915_enable_backlight)
> + return;
> +
> intel_panel_init_backlight(dev);
> return 0;
> }
> --
> 1.7.5.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight
2012-04-26 20:07 ` [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Daniel Vetter
@ 2012-04-27 20:55 ` Kamal Mostafa
2012-05-14 18:53 ` Kamal Mostafa
1 sibling, 0 replies; 9+ messages in thread
From: Kamal Mostafa @ 2012-04-27 20:55 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development
On Thu, 2012-04-26 at 22:07 +0200, Daniel Vetter wrote:
> On Wed, Apr 25, 2012 at 10:28:41AM -0700, Kamal Mostafa wrote:
> > i915.enable_backlight=0 can be used to disable i915 backlight control
> > and the /sys/class/backlight/intel_backlight interface -- useful for
> > systems where intel_backight conflicts with BIOS backlight control.
> >
> > BugLink: https://launchpad.net/bugs/954661
> > Signed-off-by: Kamal Mostafa <kamal@canonical.com>
>
> Ok, I've just gone through the fun of merging a set of backlight quirks a
> few weeks back. Then noticed that an awful lot of machines seem to be
> affected and later on read about a few interesting bits in the
> documentation. Turns out the hw is all good, it's just the driver totally
> mishandling the backlight.
>
> To cut things short: This time around I want more justification for the
> quirk than just "this makes this one machine work somehow".
The enable_backlight modparam (this PATCH 1/2) would be generally useful
to have, whether or not we quirk-disable it for that particular machine.
Consider accepting this first patch 1/2 on its own?
-Kamal
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_panel.c | 12 ++++++++++++
> > 3 files changed, 19 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index ae8a64f..ddb947b 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -112,6 +112,12 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
> > MODULE_PARM_DESC(i915_enable_ppgtt,
> > "Enable PPGTT (default: true)");
> >
> > +int i915_enable_backlight __read_mostly = -1;
> > +module_param_named(enable_backlight, i915_enable_backlight, int, 0644);
> > +MODULE_PARM_DESC(enable_backlight,
> > + "Enable backlight control and the intel_backlight interface. "
> > + "(default: -1 (auto))");
> > +
> > static struct drm_driver driver;
> > extern int intel_agp_enabled;
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 5fabc6c..6e52a42 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1087,6 +1087,7 @@ extern int i915_enable_rc6 __read_mostly;
> > extern int i915_enable_fbc __read_mostly;
> > extern bool i915_enable_hangcheck __read_mostly;
> > extern int i915_enable_ppgtt __read_mostly;
> > +extern int i915_enable_backlight __read_mostly;
> >
> > extern int i915_suspend(struct drm_device *dev, pm_message_t state);
> > extern int i915_resume(struct drm_device *dev);
> > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> > index 48177ec..fcecbd2 100644
> > --- a/drivers/gpu/drm/i915/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > @@ -259,6 +259,9 @@ void intel_panel_disable_backlight(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> >
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > dev_priv->backlight_enabled = false;
> > intel_panel_actually_set_backlight(dev, 0);
> > }
> > @@ -267,6 +270,9 @@ void intel_panel_enable_backlight(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> >
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > if (dev_priv->backlight_level == 0)
> > dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
> >
> > @@ -333,6 +339,9 @@ int intel_panel_setup_backlight(struct drm_device *dev)
> > struct backlight_properties props;
> > struct drm_connector *connector;
> >
> > + if (!i915_enable_backlight)
> > + return 0;
> > +
> > intel_panel_init_backlight(dev);
> >
> > if (dev_priv->int_lvds_connector)
> > @@ -368,6 +377,9 @@ void intel_panel_destroy_backlight(struct drm_device *dev)
> > #else
> > int intel_panel_setup_backlight(struct drm_device *dev)
> > {
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > intel_panel_init_backlight(dev);
> > return 0;
> > }
> > --
> > 1.7.5.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z
2012-04-25 17:28 ` [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z Kamal Mostafa
@ 2012-04-27 20:56 ` Kamal Mostafa
2012-04-27 21:25 ` Daniel Vetter
0 siblings, 1 reply; 9+ messages in thread
From: Kamal Mostafa @ 2012-04-27 20:56 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Robert Hooker, Intel Graphics Development
On Thu, 2012-04-26 at 22:07 +0200, Daniel Vetter wrote:
> ...
> To cut things short: This time around I want more justification for the
> quirk than just "this makes this one machine work somehow".
A bit more detail...
On this Dell XPS 13z "Ultrabook" (sandybridge_m 0x0116) when
intel_backlight/brightness gets stuffed with any value except 0 or
max_brightness, the backlight cycles between flashing (like a strobe
light!) and then pulsating (bright to dim to bright). That
flashing/pulsating cycle repeats continuously, about every 2 seconds.
The behavior is affected by the value stuffed into brightness more or
less along the lines of:
0: very dim, totally stable
1: flashes like crazy for about 1.5 sec, then pulsates for 0.5 sec
1000: flashes for about 0.5 sec, then pulsates for about 1.5 sec
2000: flashes very briefly, then pulsates for about 2 sec
3000: flickers, then pulsates for about 2 sec
4000 pulsates continuously, every 2 sec
4882: (max_brightness) full brightness, stable
This behavior manifests both in X and in a text VT, and occurs with or
without the presence of other backlight interfaces besides
intel_backlight. It does not appear to me to be a userspace problem.
The additional wrinkle is that this machine presents an acpi_video0
backlight interface as well, and it even works properly -- but *only*
after you specifically stuff 0 into intel_backlight/brightness (or if
intel_backlight is disabled by the proposed quirk).
Any non-zero intel_backlight/brightness value prevents acpi_video0 from
working. When intel_backlight is set to max_brightness (like at boot),
acpi_video0/brightness seems to have no effect at all; when
intel_backlight is set to other non-zero values, the flashing/pulsating
behavior occurs.
I'd be (quite) happy to test a proper intel_backlight fix, but in the
meantime disabling it by quirk seems appropriate for this machine, since
that allows the acpi_video0 interface to work out of the box.
Thanks for considering it,
-Kamal
On Wed, 2012-04-25 at 10:28 -0700, Kamal Mostafa wrote:
> From: Robert Hooker <robert.hooker@canonical.com>
>
> Dell XPS 13z exhibits problems (backlight flashing/pulsating) when
> intel_backlight is enabled at all, so disable it.
>
> BugLink: https://launchpad.net/bugs/954661
> Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
> Signed-off-by: Kamal Mostafa <kamal@canonical.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
> 1 files changed, 17 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5908cd5..0c4cac4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9100,6 +9100,19 @@ static void quirk_ssc_force_disable(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE;
> }
> +
> +/*
> + * Some machines (Dell XPS 13z) exhibit problems with i915 control of the
> + * backlight registers; Others may need the intel_backlight interface
> + * disabled for some other reason.
> + */
> +static void quirk_backlight_disable(struct drm_device *dev)
> +{
> + if (i915_enable_backlight == -1) {
> + i915_enable_backlight = 0;
> + DRM_DEBUG_DRIVER("disabling intel_backlight interface via quirk\n");
> + }
> +}
>
> struct intel_quirk {
> int device;
> @@ -9133,6 +9146,10 @@ struct intel_quirk intel_quirks[] = {
>
> /* Sony Vaio Y cannot use SSC on LVDS */
> { 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },
> +
> + /* Dell XPS 13z needs to disable the intel_backlight interface
> + (LP: #954661) */
> + { 0x0116, 0x1028, 0x052e, quirk_backlight_disable },
> };
>
> static void intel_init_quirks(struct drm_device *dev)
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z
2012-04-27 20:56 ` Kamal Mostafa
@ 2012-04-27 21:25 ` Daniel Vetter
2012-04-27 21:55 ` Kamal Mostafa
0 siblings, 1 reply; 9+ messages in thread
From: Daniel Vetter @ 2012-04-27 21:25 UTC (permalink / raw)
To: Kamal Mostafa; +Cc: Robert Hooker, Intel Graphics Development
On Fri, Apr 27, 2012 at 01:56:09PM -0700, Kamal Mostafa wrote:
> On Thu, 2012-04-26 at 22:07 +0200, Daniel Vetter wrote:
> > ...
> > To cut things short: This time around I want more justification for the
> > quirk than just "this makes this one machine work somehow".
>
>
> A bit more detail...
>
> On this Dell XPS 13z "Ultrabook" (sandybridge_m 0x0116) when
> intel_backlight/brightness gets stuffed with any value except 0 or
> max_brightness, the backlight cycles between flashing (like a strobe
> light!) and then pulsating (bright to dim to bright). That
> flashing/pulsating cycle repeats continuously, about every 2 seconds.
> The behavior is affected by the value stuffed into brightness more or
> less along the lines of:
>
> 0: very dim, totally stable
> 1: flashes like crazy for about 1.5 sec, then pulsates for 0.5 sec
> 1000: flashes for about 0.5 sec, then pulsates for about 1.5 sec
> 2000: flashes very briefly, then pulsates for about 2 sec
> 3000: flickers, then pulsates for about 2 sec
> 4000 pulsates continuously, every 2 sec
> 4882: (max_brightness) full brightness, stable
>
> This behavior manifests both in X and in a text VT, and occurs with or
> without the presence of other backlight interfaces besides
> intel_backlight. It does not appear to me to be a userspace problem.
>
> The additional wrinkle is that this machine presents an acpi_video0
> backlight interface as well, and it even works properly -- but *only*
> after you specifically stuff 0 into intel_backlight/brightness (or if
> intel_backlight is disabled by the proposed quirk).
>
> Any non-zero intel_backlight/brightness value prevents acpi_video0 from
> working. When intel_backlight is set to max_brightness (like at boot),
> acpi_video0/brightness seems to have no effect at all; when
> intel_backlight is set to other non-zero values, the flashing/pulsating
> behavior occurs.
>
> I'd be (quite) happy to test a proper intel_backlight fix, but in the
> meantime disabling it by quirk seems appropriate for this machine, since
> that allows the acpi_video0 interface to work out of the box.
>
> Thanks for considering it,
Hm. Can you please install intel-gpu-tools and attach the output of
intel_reg_dumper? I have an idea ...
Thanks, Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z
2012-04-27 21:25 ` Daniel Vetter
@ 2012-04-27 21:55 ` Kamal Mostafa
2012-05-14 18:54 ` Kamal Mostafa
0 siblings, 1 reply; 9+ messages in thread
From: Kamal Mostafa @ 2012-04-27 21:55 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Robert Hooker, Intel Graphics Development
On Fri, 2012-04-27 at 23:25 +0200, Daniel Vetter wrote:
> Hm. Can you please install intel-gpu-tools and attach the output of
> intel_reg_dumper? I have an idea ...
Here it is with intel_backlight/brightness set to 1 ("strobe light"
behavior occurring):
PGETBL_CTL: 0x00000000
GEN6_INSTDONE_1: 0x8888fffb
GEN6_INSTDONE_2: 0x03305e3f
CPU_VGACNTRL: 0x80000000 (disabled)
DIGITAL_PORT_HOTPLUG_CNTRL: 0x00000000
RR_HW_CTL: 0x00000000 (low 0, high 0)
FDI_PLL_BIOS_0: 0xffffffff
FDI_PLL_BIOS_1: 0xffffffff
FDI_PLL_BIOS_2: 0xffffffff
DISPLAY_PORT_PLL_BIOS_0: 0xffffffff
DISPLAY_PORT_PLL_BIOS_1: 0xffffffff
DISPLAY_PORT_PLL_BIOS_2: 0xffffffff
FDI_PLL_FREQ_CTL: 0xffffffff
PIPEACONF: 0xc0000050 (enabled, active, 6bpc)
HTOTAL_A: 0x05d90555 (1366 active, 1498 total)
HBLANK_A: 0x05d90555 (1366 start, 1498 end)
HSYNC_A: 0x05a50585 (1414 start, 1446 end)
VTOTAL_A: 0x031502ff (768 active, 790 total)
VBLANK_A: 0x031502ff (768 start, 790 end)
VSYNC_A: 0x03040300 (769 start, 773 end)
VSYNCSHIFT_A: 0x00000000
PIPEASRC: 0x055502ff (1366, 768)
PIPEA_DATA_M1: 0x7e1380e4 (TU 64, val 0x1380e4 1278180)
PIPEA_DATA_N1: 0x0020f580 (val 0x20f580 2160000)
PIPEA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
PIPEA_DATA_N2: 0x00000000 (val 0x0 0)
PIPEA_LINK_M1: 0x00011562 (val 0x11562 71010)
PIPEA_LINK_N1: 0x00041eb0 (val 0x41eb0 270000)
PIPEA_LINK_M2: 0x00000000 (val 0x0 0)
PIPEA_LINK_N2: 0x00000000 (val 0x0 0)
DSPACNTR: 0xd8004400 (enabled)
DSPABASE: 0x00000000
DSPASTRIDE: 0x00001600 (88)
DSPASURF: 0x009bf000
DSPATILEOFF: 0x00000000 (0, 0)
PIPEBCONF: 0x00000000 (disabled, inactive, 8bpc)
HTOTAL_B: 0x00000000 (1 active, 1 total)
HBLANK_B: 0x00000000 (1 start, 1 end)
HSYNC_B: 0x00000000 (1 start, 1 end)
VTOTAL_B: 0x00000000 (1 active, 1 total)
VBLANK_B: 0x00000000 (1 start, 1 end)
VSYNC_B: 0x00000000 (1 start, 1 end)
VSYNCSHIFT_B: 0x00000000
DSPBCNTR: 0x00004000 (disabled)
DSPBBASE: 0x00000000
DSPBSTRIDE: 0x00000000 (0)
DSPBSURF: 0x00000000
DSPBTILEOFF: 0x00000000 (0, 0)
PIPEBSRC: 0x00000000 (1, 1)
PIPEB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N1: 0x00000000 (val 0x0 0)
PIPEB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N2: 0x00000000 (val 0x0 0)
PIPEB_LINK_M1: 0x00000000 (val 0x0 0)
PIPEB_LINK_N1: 0x00000000 (val 0x0 0)
PIPEB_LINK_M2: 0x00000000 (val 0x0 0)
PIPEB_LINK_N2: 0x00000000 (val 0x0 0)
PFA_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_CTL_2: 0x00007e80 (vscale 0.988281)
PFA_CTL_3: 0x00003f40 (vscale initial phase 0.494141)
PFA_CTL_4: 0x00007d54 (hscale 0.979126)
PFA_WIN_POS: 0x00000000 (0, 0)
PFA_WIN_SIZE: 0x00000000 (0, 0)
PFB_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFB_CTL_2: 0x00000000 (vscale 0.000000)
PFB_CTL_3: 0x00000000 (vscale initial phase 0.000000)
PFB_CTL_4: 0x00000000 (hscale 0.000000)
PFB_WIN_POS: 0x00000000 (0, 0)
PFB_WIN_SIZE: 0x00000000 (0, 0)
PCH_DREF_CONTROL: 0x00001402 (cpu source disable, ssc_source enable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 enable, ssc4 disable)
PCH_RAWCLK_FREQ: 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
PCH_DPLL_TMR_CFG: 0x0271186a
PCH_SSC4_PARMS: 0x01204860
PCH_SSC4_AUX_PARMS: 0x000029c5
PCH_DPLL_SEL: 0x00000008 (TransA DPLL enable (DPLL A), TransB DPLL disable (DPLL (null)))
PCH_DPLL_ANALOG_CTL: 0x00008000
PCH_DPLL_A: 0x88046004 (enable, sdvo high speed no, mode LVDS, p2 Div 14, FPA0 P1 3, FPA1 P1 3, refclk SSC, sdvo/hdmi mul 1)
PCH_DPLL_B: 0x04800080 (disable, sdvo high speed no, mode (null), p2 (null), FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1)
PCH_FPA0: 0x00021007 (n = 2, m1 = 16, m2 = 7)
PCH_FPA1: 0x00021007 (n = 2, m1 = 16, m2 = 7)
PCH_FPB0: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
PCH_FPB1: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
TRANS_HTOTAL_A: 0x05d90555 (1366 active, 1498 total)
TRANS_HBLANK_A: 0x05d90555 (1366 start, 1498 end)
TRANS_HSYNC_A: 0x05a50585 (1414 start, 1446 end)
TRANS_VTOTAL_A: 0x031502ff (768 active, 790 total)
TRANS_VBLANK_A: 0x031502ff (768 start, 790 end)
TRANS_VSYNC_A: 0x03040300 (769 start, 773 end)
TRANS_VSYNCSHIFT_A: 0x00000000
TRANSA_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N1: 0x00000000 (val 0x0 0)
TRANSA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N2: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_B: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_B: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_B: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_B: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_B: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_B: 0x00000000 (1 start, 1 end)
TRANS_VSYNCSHIFT_B: 0x00000000
TRANSB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N1: 0x00000000 (val 0x0 0)
TRANSB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N2: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_C: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_C: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_C: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_C: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_C: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_C: 0x00000000 (1 start, 1 end)
TRANS_VSYNCSHIFT_C: 0x00000000
TRANSC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N1: 0x00000000 (val 0x0 0)
TRANSC_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N2: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANSACONF: 0xc0000000 (enable, active)
TRANSBCONF: 0x00000000 (disable, inactive)
TRANSCCONF: 0x00000000 (disable, inactive)
FDI_TXA_CTL: 0xb0044000 (enable, train pattern not train, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
FDI_TXB_CTL: 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
FDI_TXC_CTL: 0x00000000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable)
FDI_RXA_CTL: 0x80022350 (enable, train pattern not train, port width X1, 6bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL enable,FS ecc disable, FE ecc disable, FS err report enable, FE err report enable,scrambing enable, enhanced framing enable, PCDClk)
FDI_RXB_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
FDI_RXC_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
FDI_RXA_MISC: 0x00000080 (FDI Delay 128)
FDI_RXB_MISC: 0x00000080 (FDI Delay 128)
FDI_RXC_MISC: 0x00000080 (FDI Delay 128)
FDI_RXA_TUSIZE1: 0x7e000000
FDI_RXA_TUSIZE2: 0x7e000000
FDI_RXB_TUSIZE1: 0x7e000000
FDI_RXB_TUSIZE2: 0x7e000000
FDI_RXC_TUSIZE1: 0x7e000000
FDI_RXC_TUSIZE2: 0x7e000000
FDI_PLL_CTL_1: 0x7e000000
FDI_PLL_CTL_2: 0x7e000000
FDI_RXA_IIR: 0x00000000
FDI_RXA_IMR: 0x000008ff
FDI_RXB_IIR: 0x00000000
FDI_RXB_IMR: 0x000008ff
PCH_ADPA: 0x00f40000 (disabled, transcoder A, -hsync, -vsync)
HDMIB: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
HDMIC: 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
HDMID: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
PCH_LVDS: 0x80200302 (enabled, pipe A, 18 bit, 1 channel)
CPU_eDP_A: 0x00000018
PCH_DP_B: 0x00000000
PCH_DP_C: 0x00000004
PCH_DP_D: 0x00000000
TRANS_DP_CTL_A: 0x60000418 (disable port none 6bpc +vsync +hsync)
TRANS_DP_CTL_B: 0x60000018 (disable port none 8bpc +vsync +hsync)
TRANS_DP_CTL_C: 0x60000018 (disable port none 8bpc +vsync +hsync)
BLC_PWM_CPU_CTL2: 0x80000000
BLC_PWM_CPU_CTL: 0x00000001
BLC_PWM_PCH_CTL1: 0x80000000
BLC_PWM_PCH_CTL2: 0x13120000
PCH_PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
PCH_PP_CONTROL: 0xabcd0003 (blacklight disabled, power down on reset, panel on)
PCH_PP_ON_DELAYS: 0x025807d0
PCH_PP_OFF_DELAYS: 0x01f409c4
PCH_PP_DIVISOR: 0x00186905
PORT_DBG: 0x00000000 (HW DRRS off)
RC6_RESIDENCY_TIME: 0x02fb9ec6
RC6p_RESIDENCY_TIME: 0x00000000
RC6pp_RESIDENCY_TIME: 0x00000000
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight
2012-04-26 20:07 ` [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Daniel Vetter
2012-04-27 20:55 ` Kamal Mostafa
@ 2012-05-14 18:53 ` Kamal Mostafa
1 sibling, 0 replies; 9+ messages in thread
From: Kamal Mostafa @ 2012-05-14 18:53 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development
[-- Attachment #1.1: Type: text/plain, Size: 4688 bytes --]
Hi Daniel-
Reminding you of this patch...
The new i915.enable_backlight modparam introduced in patch 1/2 is
generally useful, regardless of whether we quirk-enable as done in patch
2/2. Its already been used successfully for a different machine[0] with
a different backlight problem.
Please consider applying this patch 1/2.
Thanks,
-Kamal
[0] https://bugs.launchpad.net/ubuntu/+source/linux/+bug/954661/comments/27
On Thu, 2012-04-26 at 22:07 +0200, Daniel Vetter wrote:
> On Wed, Apr 25, 2012 at 10:28:41AM -0700, Kamal Mostafa wrote:
> > i915.enable_backlight=0 can be used to disable i915 backlight control
> > and the /sys/class/backlight/intel_backlight interface -- useful for
> > systems where intel_backight conflicts with BIOS backlight control.
> >
> > BugLink: https://launchpad.net/bugs/954661
> > Signed-off-by: Kamal Mostafa <kamal@canonical.com>
>
> Ok, I've just gone through the fun of merging a set of backlight quirks a
> few weeks back. Then noticed that an awful lot of machines seem to be
> affected and later on read about a few interesting bits in the
> documentation. Turns out the hw is all good, it's just the driver totally
> mishandling the backlight.
>
> To cut things short: This time around I want more justification for the
> quirk than just "this makes this one machine work somehow".
> -Daniel
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_panel.c | 12 ++++++++++++
> > 3 files changed, 19 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index ae8a64f..ddb947b 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -112,6 +112,12 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
> > MODULE_PARM_DESC(i915_enable_ppgtt,
> > "Enable PPGTT (default: true)");
> >
> > +int i915_enable_backlight __read_mostly = -1;
> > +module_param_named(enable_backlight, i915_enable_backlight, int, 0644);
> > +MODULE_PARM_DESC(enable_backlight,
> > + "Enable backlight control and the intel_backlight interface. "
> > + "(default: -1 (auto))");
> > +
> > static struct drm_driver driver;
> > extern int intel_agp_enabled;
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 5fabc6c..6e52a42 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1087,6 +1087,7 @@ extern int i915_enable_rc6 __read_mostly;
> > extern int i915_enable_fbc __read_mostly;
> > extern bool i915_enable_hangcheck __read_mostly;
> > extern int i915_enable_ppgtt __read_mostly;
> > +extern int i915_enable_backlight __read_mostly;
> >
> > extern int i915_suspend(struct drm_device *dev, pm_message_t state);
> > extern int i915_resume(struct drm_device *dev);
> > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> > index 48177ec..fcecbd2 100644
> > --- a/drivers/gpu/drm/i915/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > @@ -259,6 +259,9 @@ void intel_panel_disable_backlight(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> >
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > dev_priv->backlight_enabled = false;
> > intel_panel_actually_set_backlight(dev, 0);
> > }
> > @@ -267,6 +270,9 @@ void intel_panel_enable_backlight(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> >
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > if (dev_priv->backlight_level == 0)
> > dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
> >
> > @@ -333,6 +339,9 @@ int intel_panel_setup_backlight(struct drm_device *dev)
> > struct backlight_properties props;
> > struct drm_connector *connector;
> >
> > + if (!i915_enable_backlight)
> > + return 0;
> > +
> > intel_panel_init_backlight(dev);
> >
> > if (dev_priv->int_lvds_connector)
> > @@ -368,6 +377,9 @@ void intel_panel_destroy_backlight(struct drm_device *dev)
> > #else
> > int intel_panel_setup_backlight(struct drm_device *dev)
> > {
> > + if (!i915_enable_backlight)
> > + return;
> > +
> > intel_panel_init_backlight(dev);
> > return 0;
> > }
> > --
> > 1.7.5.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z
2012-04-27 21:55 ` Kamal Mostafa
@ 2012-05-14 18:54 ` Kamal Mostafa
0 siblings, 0 replies; 9+ messages in thread
From: Kamal Mostafa @ 2012-05-14 18:54 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Robert Hooker, Intel Graphics Development
[-- Attachment #1.1: Type: text/plain, Size: 12910 bytes --]
Hi Daniel-
Reminding you of this issue... I've sent the register dump you asked
for... You said you had an idea?
Thanks very much for looking into it,
-Kamal
On Fri, 2012-04-27 at 14:55 -0700, Kamal Mostafa wrote:
> On Fri, 2012-04-27 at 23:25 +0200, Daniel Vetter wrote:
> > Hm. Can you please install intel-gpu-tools and attach the output of
> > intel_reg_dumper? I have an idea ...
>
> Here it is with intel_backlight/brightness set to 1 ("strobe light"
> behavior occurring):
>
> PGETBL_CTL: 0x00000000
> GEN6_INSTDONE_1: 0x8888fffb
> GEN6_INSTDONE_2: 0x03305e3f
> CPU_VGACNTRL: 0x80000000 (disabled)
> DIGITAL_PORT_HOTPLUG_CNTRL: 0x00000000
> RR_HW_CTL: 0x00000000 (low 0, high 0)
> FDI_PLL_BIOS_0: 0xffffffff
> FDI_PLL_BIOS_1: 0xffffffff
> FDI_PLL_BIOS_2: 0xffffffff
> DISPLAY_PORT_PLL_BIOS_0: 0xffffffff
> DISPLAY_PORT_PLL_BIOS_1: 0xffffffff
> DISPLAY_PORT_PLL_BIOS_2: 0xffffffff
> FDI_PLL_FREQ_CTL: 0xffffffff
> PIPEACONF: 0xc0000050 (enabled, active, 6bpc)
> HTOTAL_A: 0x05d90555 (1366 active, 1498 total)
> HBLANK_A: 0x05d90555 (1366 start, 1498 end)
> HSYNC_A: 0x05a50585 (1414 start, 1446 end)
> VTOTAL_A: 0x031502ff (768 active, 790 total)
> VBLANK_A: 0x031502ff (768 start, 790 end)
> VSYNC_A: 0x03040300 (769 start, 773 end)
> VSYNCSHIFT_A: 0x00000000
> PIPEASRC: 0x055502ff (1366, 768)
> PIPEA_DATA_M1: 0x7e1380e4 (TU 64, val 0x1380e4 1278180)
> PIPEA_DATA_N1: 0x0020f580 (val 0x20f580 2160000)
> PIPEA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
> PIPEA_DATA_N2: 0x00000000 (val 0x0 0)
> PIPEA_LINK_M1: 0x00011562 (val 0x11562 71010)
> PIPEA_LINK_N1: 0x00041eb0 (val 0x41eb0 270000)
> PIPEA_LINK_M2: 0x00000000 (val 0x0 0)
> PIPEA_LINK_N2: 0x00000000 (val 0x0 0)
> DSPACNTR: 0xd8004400 (enabled)
> DSPABASE: 0x00000000
> DSPASTRIDE: 0x00001600 (88)
> DSPASURF: 0x009bf000
> DSPATILEOFF: 0x00000000 (0, 0)
> PIPEBCONF: 0x00000000 (disabled, inactive, 8bpc)
> HTOTAL_B: 0x00000000 (1 active, 1 total)
> HBLANK_B: 0x00000000 (1 start, 1 end)
> HSYNC_B: 0x00000000 (1 start, 1 end)
> VTOTAL_B: 0x00000000 (1 active, 1 total)
> VBLANK_B: 0x00000000 (1 start, 1 end)
> VSYNC_B: 0x00000000 (1 start, 1 end)
> VSYNCSHIFT_B: 0x00000000
> DSPBCNTR: 0x00004000 (disabled)
> DSPBBASE: 0x00000000
> DSPBSTRIDE: 0x00000000 (0)
> DSPBSURF: 0x00000000
> DSPBTILEOFF: 0x00000000 (0, 0)
> PIPEBSRC: 0x00000000 (1, 1)
> PIPEB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
> PIPEB_DATA_N1: 0x00000000 (val 0x0 0)
> PIPEB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
> PIPEB_DATA_N2: 0x00000000 (val 0x0 0)
> PIPEB_LINK_M1: 0x00000000 (val 0x0 0)
> PIPEB_LINK_N1: 0x00000000 (val 0x0 0)
> PIPEB_LINK_M2: 0x00000000 (val 0x0 0)
> PIPEB_LINK_N2: 0x00000000 (val 0x0 0)
> PFA_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
> PFA_CTL_2: 0x00007e80 (vscale 0.988281)
> PFA_CTL_3: 0x00003f40 (vscale initial phase 0.494141)
> PFA_CTL_4: 0x00007d54 (hscale 0.979126)
> PFA_WIN_POS: 0x00000000 (0, 0)
> PFA_WIN_SIZE: 0x00000000 (0, 0)
> PFB_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
> PFB_CTL_2: 0x00000000 (vscale 0.000000)
> PFB_CTL_3: 0x00000000 (vscale initial phase 0.000000)
> PFB_CTL_4: 0x00000000 (hscale 0.000000)
> PFB_WIN_POS: 0x00000000 (0, 0)
> PFB_WIN_SIZE: 0x00000000 (0, 0)
> PCH_DREF_CONTROL: 0x00001402 (cpu source disable, ssc_source enable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 enable, ssc4 disable)
> PCH_RAWCLK_FREQ: 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
> PCH_DPLL_TMR_CFG: 0x0271186a
> PCH_SSC4_PARMS: 0x01204860
> PCH_SSC4_AUX_PARMS: 0x000029c5
> PCH_DPLL_SEL: 0x00000008 (TransA DPLL enable (DPLL A), TransB DPLL disable (DPLL (null)))
> PCH_DPLL_ANALOG_CTL: 0x00008000
> PCH_DPLL_A: 0x88046004 (enable, sdvo high speed no, mode LVDS, p2 Div 14, FPA0 P1 3, FPA1 P1 3, refclk SSC, sdvo/hdmi mul 1)
> PCH_DPLL_B: 0x04800080 (disable, sdvo high speed no, mode (null), p2 (null), FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1)
> PCH_FPA0: 0x00021007 (n = 2, m1 = 16, m2 = 7)
> PCH_FPA1: 0x00021007 (n = 2, m1 = 16, m2 = 7)
> PCH_FPB0: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
> PCH_FPB1: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
> TRANS_HTOTAL_A: 0x05d90555 (1366 active, 1498 total)
> TRANS_HBLANK_A: 0x05d90555 (1366 start, 1498 end)
> TRANS_HSYNC_A: 0x05a50585 (1414 start, 1446 end)
> TRANS_VTOTAL_A: 0x031502ff (768 active, 790 total)
> TRANS_VBLANK_A: 0x031502ff (768 start, 790 end)
> TRANS_VSYNC_A: 0x03040300 (769 start, 773 end)
> TRANS_VSYNCSHIFT_A: 0x00000000
> TRANSA_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
> TRANSA_DATA_N1: 0x00000000 (val 0x0 0)
> TRANSA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
> TRANSA_DATA_N2: 0x00000000 (val 0x0 0)
> TRANSA_DP_LINK_M1: 0x00000000 (val 0x0 0)
> TRANSA_DP_LINK_N1: 0x00000000 (val 0x0 0)
> TRANSA_DP_LINK_M2: 0x00000000 (val 0x0 0)
> TRANSA_DP_LINK_N2: 0x00000000 (val 0x0 0)
> TRANS_HTOTAL_B: 0x00000000 (1 active, 1 total)
> TRANS_HBLANK_B: 0x00000000 (1 start, 1 end)
> TRANS_HSYNC_B: 0x00000000 (1 start, 1 end)
> TRANS_VTOTAL_B: 0x00000000 (1 active, 1 total)
> TRANS_VBLANK_B: 0x00000000 (1 start, 1 end)
> TRANS_VSYNC_B: 0x00000000 (1 start, 1 end)
> TRANS_VSYNCSHIFT_B: 0x00000000
> TRANSB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
> TRANSB_DATA_N1: 0x00000000 (val 0x0 0)
> TRANSB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
> TRANSB_DATA_N2: 0x00000000 (val 0x0 0)
> TRANSB_DP_LINK_M1: 0x00000000 (val 0x0 0)
> TRANSB_DP_LINK_N1: 0x00000000 (val 0x0 0)
> TRANSB_DP_LINK_M2: 0x00000000 (val 0x0 0)
> TRANSB_DP_LINK_N2: 0x00000000 (val 0x0 0)
> TRANS_HTOTAL_C: 0x00000000 (1 active, 1 total)
> TRANS_HBLANK_C: 0x00000000 (1 start, 1 end)
> TRANS_HSYNC_C: 0x00000000 (1 start, 1 end)
> TRANS_VTOTAL_C: 0x00000000 (1 active, 1 total)
> TRANS_VBLANK_C: 0x00000000 (1 start, 1 end)
> TRANS_VSYNC_C: 0x00000000 (1 start, 1 end)
> TRANS_VSYNCSHIFT_C: 0x00000000
> TRANSC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
> TRANSC_DATA_N1: 0x00000000 (val 0x0 0)
> TRANSC_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
> TRANSC_DATA_N2: 0x00000000 (val 0x0 0)
> TRANSC_DP_LINK_M1: 0x00000000 (val 0x0 0)
> TRANSC_DP_LINK_N1: 0x00000000 (val 0x0 0)
> TRANSC_DP_LINK_M2: 0x00000000 (val 0x0 0)
> TRANSC_DP_LINK_N2: 0x00000000 (val 0x0 0)
> TRANSACONF: 0xc0000000 (enable, active)
> TRANSBCONF: 0x00000000 (disable, inactive)
> TRANSCCONF: 0x00000000 (disable, inactive)
> FDI_TXA_CTL: 0xb0044000 (enable, train pattern not train, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
> FDI_TXB_CTL: 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
> FDI_TXC_CTL: 0x00000000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable)
> FDI_RXA_CTL: 0x80022350 (enable, train pattern not train, port width X1, 6bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL enable,FS ecc disable, FE ecc disable, FS err report enable, FE err report enable,scrambing enable, enhanced framing enable, PCDClk)
> FDI_RXB_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
> FDI_RXC_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
> FDI_RXA_MISC: 0x00000080 (FDI Delay 128)
> FDI_RXB_MISC: 0x00000080 (FDI Delay 128)
> FDI_RXC_MISC: 0x00000080 (FDI Delay 128)
> FDI_RXA_TUSIZE1: 0x7e000000
> FDI_RXA_TUSIZE2: 0x7e000000
> FDI_RXB_TUSIZE1: 0x7e000000
> FDI_RXB_TUSIZE2: 0x7e000000
> FDI_RXC_TUSIZE1: 0x7e000000
> FDI_RXC_TUSIZE2: 0x7e000000
> FDI_PLL_CTL_1: 0x7e000000
> FDI_PLL_CTL_2: 0x7e000000
> FDI_RXA_IIR: 0x00000000
> FDI_RXA_IMR: 0x000008ff
> FDI_RXB_IIR: 0x00000000
> FDI_RXB_IMR: 0x000008ff
> PCH_ADPA: 0x00f40000 (disabled, transcoder A, -hsync, -vsync)
> HDMIB: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
> HDMIC: 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
> HDMID: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
> PCH_LVDS: 0x80200302 (enabled, pipe A, 18 bit, 1 channel)
> CPU_eDP_A: 0x00000018
> PCH_DP_B: 0x00000000
> PCH_DP_C: 0x00000004
> PCH_DP_D: 0x00000000
> TRANS_DP_CTL_A: 0x60000418 (disable port none 6bpc +vsync +hsync)
> TRANS_DP_CTL_B: 0x60000018 (disable port none 8bpc +vsync +hsync)
> TRANS_DP_CTL_C: 0x60000018 (disable port none 8bpc +vsync +hsync)
> BLC_PWM_CPU_CTL2: 0x80000000
> BLC_PWM_CPU_CTL: 0x00000001
> BLC_PWM_PCH_CTL1: 0x80000000
> BLC_PWM_PCH_CTL2: 0x13120000
> PCH_PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
> PCH_PP_CONTROL: 0xabcd0003 (blacklight disabled, power down on reset, panel on)
> PCH_PP_ON_DELAYS: 0x025807d0
> PCH_PP_OFF_DELAYS: 0x01f409c4
> PCH_PP_DIVISOR: 0x00186905
> PORT_DBG: 0x00000000 (HW DRRS off)
> RC6_RESIDENCY_TIME: 0x02fb9ec6
> RC6p_RESIDENCY_TIME: 0x00000000
> RC6pp_RESIDENCY_TIME: 0x00000000
>
>
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2012-05-14 18:54 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-04-25 17:28 [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Kamal Mostafa
2012-04-25 17:28 ` [PATCH 2/2] drm/i915: quirk disable i915 backlight on Dell XPS 13z Kamal Mostafa
2012-04-27 20:56 ` Kamal Mostafa
2012-04-27 21:25 ` Daniel Vetter
2012-04-27 21:55 ` Kamal Mostafa
2012-05-14 18:54 ` Kamal Mostafa
2012-04-26 20:07 ` [PATCH 1/2] drm/i915: i915.enable_backlight=0 disables intel_backlight Daniel Vetter
2012-04-27 20:55 ` Kamal Mostafa
2012-05-14 18:53 ` Kamal Mostafa
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