[PATCH 1/2] drm/i915: Inifite timeout for wait ioctl

[PATCH 1/2] drm/i915: Inifite timeout for wait ioctl

[Ben Widawsky]

Change the ns_timeout parameter of the wait ioctl to a signed value.
Doing this allows the kernel to provide an infinite wait when a timeout
of less than 0 is provided. This mimics select/poll.

Initially the parameter was meant to match up with the GL spec 1:1, but
after being made aware of how much 2^64 - 1 nanoseconds actually is, I
do not think anyone will ever notice the loss of 1 bit.

The infinite timeout on waiting is similar to the existing i915
userspace interface with the exception that struct_mutex is dropped
while doing the wait in this ioctl.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gem.c |   15 ++++++++++-----
 include/drm/i915_drm.h          |    2 +-
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3bc918c..b2eacde 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2026,11 +2026,14 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 	struct drm_i915_gem_wait *args = data;
 	struct drm_i915_gem_object *obj;
 	struct intel_ring_buffer *ring = NULL;
-	struct timespec timeout;
+	struct timespec timeout_stack, *timeout = NULL;
 	u32 seqno = 0;
 	int ret = 0;
 
-	timeout = ns_to_timespec(args->timeout_ns);
+	if (args->timeout_ns >= 0) {
+		timeout_stack = ns_to_timespec(args->timeout_ns);
+		timeout = &timeout_stack;
+	}
 
 	ret = i915_mutex_lock_interruptible(dev);
 	if (ret)
@@ -2073,9 +2076,11 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 	drm_gem_object_unreference(&obj->base);
 	mutex_unlock(&dev->struct_mutex);
 
-	ret = __wait_seqno(ring, seqno, true, &timeout);
-	WARN_ON(!timespec_valid(&timeout));
-	args->timeout_ns = timespec_to_ns(&timeout);
+	ret = __wait_seqno(ring, seqno, true, timeout);
+	if (timeout) {
+		WARN_ON(!timespec_valid(timeout));
+		args->timeout_ns = timespec_to_ns(timeout);
+	}
 	return ret;
 
 out:
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index bab1743..aae346e 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -893,7 +893,7 @@ struct drm_i915_gem_wait {
 	__u32 bo_handle;
 	__u32 flags;
 	/** Number of nanoseconds to wait, Returns time remaining. */
-	__u64 timeout_ns;
+	__s64 timeout_ns;
 };
 
 #endif				/* _I915_DRM_H_ */
-- 
1.7.10.3

[PATCH 2/2] drm/i915: Add wait render timeout get param

[Ben Widawsky]

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c |    3 +++
 include/drm/i915_drm.h          |    1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 0c90b6c..bc84f20 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1006,6 +1006,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
 	case I915_PARAM_HAS_ALIASING_PPGTT:
 		value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
 		break;
+	case I915_PARAM_HAS_WAIT_TIMEOUT:
+		value = 1;
+		break;
 	default:
 		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
 				 param->param);
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index aae346e..5c28ee1 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -300,6 +300,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_GEN7_SOL_RESET	 16
 #define I915_PARAM_HAS_LLC     	 	 17
 #define I915_PARAM_HAS_ALIASING_PPGTT	 18
+#define I915_PARAM_HAS_WAIT_TIMEOUT	 19
 
 typedef struct drm_i915_getparam {
 	int param;
-- 
1.7.10.3

Re: [PATCH 2/2] drm/i915: Add wait render timeout get param

[Chris Wilson]

For both patches,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH 2/2] drm/i915: Add wait render timeout get param

[Daniel Vetter]

On Wed, Jun 06, 2012 at 10:51:27AM +0100, Chris Wilson wrote:
> For both patches,
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Both queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48