[PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[Jia Hongtao]

The issue log on core1 is:
root@mpc8572ds:~# ifconfig eth0 10.192.208.244
net eth0: could not attach to PHY
SIOCSIFFLAGS: No such device

To attach PHY node mdio@24520 should not be disabled in dts of core1.
Because all PHYs are controlled through this node as follows:

mdio@24520 {
	phy0: ethernet-phy@0 {
		interrupts = <10 1 0 0>;
		reg = <0x0>;
	};
	phy1: ethernet-phy@1 {
		interrupts = <10 1 0 0>;
		reg = <0x1>;
	};
	phy2: ethernet-phy@2 {
		interrupts = <10 1 0 0>;
		reg = <0x2>;
	};
	phy3: ethernet-phy@3 {
		interrupts = <10 1 0 0>;
		reg = <0x3>;
	};

	tbi0: tbi-phy@11 {
		reg = <0x11>;
		device_type = "tbi-phy";
	};
};

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
---
 arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index d6a8faf..1932396 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -67,9 +67,6 @@
 		ethernet@24000 {
 			status = "disabled";
 		};
-		mdio@24520 {
-			status = "disabled";
-		};
 		ptp_clock@24e00 {
 			status = "disabled";
 		};
-- 
1.7.5.1

[PATCH 2/2] powerpc/mpc8572ds: Update the MSI interrupts into 4-cell format

[Jia Hongtao]

With 2-cell format interrupts of MSI PCIe ethernet card can not work.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
---
 arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts |    8 ++++----
 arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts |    8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index d34d127..ef9ef56 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -67,10 +67,10 @@
 		msi@41600 {
 			msi-available-ranges = <0 0x80>;
 			interrupts = <
-				0xe0 0
-				0xe1 0
-				0xe2 0
-				0xe3 0>;
+				0xe0 0 0 0
+				0xe1 0 0 0
+				0xe2 0 0 0
+				0xe3 0 0 0>;
 		};
 		timer@42100 {
 			status = "disabled";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index 1932396..24564ee 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -97,10 +97,10 @@
 		msi@41600 {
 			msi-available-ranges = <0x80 0x80>;
 			interrupts = <
-				0xe4 0
-				0xe5 0
-				0xe6 0
-				0xe7 0>;
+				0xe4 0 0 0
+				0xe5 0 0 0
+				0xe6 0 0 0
+				0xe7 0 0 0>;
 		};
 		global-utilities@e0000 {
 			status = "disabled";
-- 
1.7.5.1

Re: [PATCH 2/2] powerpc/mpc8572ds: Update the MSI interrupts into 4-cell format

[Kumar Gala]

On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:

> With 2-cell format interrupts of MSI PCIe ethernet card can not work.
> 
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts |    8 ++++----
> arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts |    8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)

applied to next

- k

Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[Kumar Gala]

On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:

> The issue log on core1 is:
> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
> net eth0: could not attach to PHY
> SIOCSIFFLAGS: No such device
> 
> To attach PHY node mdio@24520 should not be disabled in dts of core1.
> Because all PHYs are controlled through this node as follows:
> 
> mdio@24520 {
> 	phy0: ethernet-phy@0 {
> 		interrupts = <10 1 0 0>;
> 		reg = <0x0>;
> 	};
> 	phy1: ethernet-phy@1 {
> 		interrupts = <10 1 0 0>;
> 		reg = <0x1>;
> 	};
> 	phy2: ethernet-phy@2 {
> 		interrupts = <10 1 0 0>;
> 		reg = <0x2>;
> 	};
> 	phy3: ethernet-phy@3 {
> 		interrupts = <10 1 0 0>;
> 		reg = <0x3>;
> 	};
> 
> 	tbi0: tbi-phy@11 {
> 		reg = <0x11>;
> 		device_type = "tbi-phy";
> 	};
> };
> 
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts |    3 ---
> 1 files changed, 0 insertions(+), 3 deletions(-)

applied to next

- k

Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[Scott Wood]

On 07/10/2012 01:08 AM, Jia Hongtao wrote:
> The issue log on core1 is:
> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
> net eth0: could not attach to PHY
> SIOCSIFFLAGS: No such device
> 
> To attach PHY node mdio@24520 should not be disabled in dts of core1.
> Because all PHYs are controlled through this node as follows:

So you grant it to both partitions?  How do you deal with synchronization?

-Scott

RE: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[Jia Hongtao-B38951]

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Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue

[Scott Wood]

On 07/10/2012 09:07 PM, Jia Hongtao-B38951 wrote:
> 
> 
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Wednesday, July 11, 2012 2:15 AM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org
>> Subject: Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on
>> core1 of AMP boot issue
>>
>> On 07/10/2012 01:08 AM, Jia Hongtao wrote:
>>> The issue log on core1 is:
>>> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
>>> net eth0: could not attach to PHY
>>> SIOCSIFFLAGS: No such device
>>>
>>> To attach PHY node mdio@24520 should not be disabled in dts of core1.
>>> Because all PHYs are controlled through this node as follows:
>>
>> So you grant it to both partitions?  How do you deal with synchronization?
>>
>> -Scott
> 
> PHY nodes are only used by ethernet. Each ethernet is used by only one partition
> (disabled in the other partition). So I think there is no synchronization issue.

I mean for accessing the MDIO bus.

-Scott