* [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards
@ 2012-08-10 10:12 Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 1/4] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
` (3 more replies)
0 siblings, 4 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-10 10:12 UTC (permalink / raw)
To: u-boot
This patch fixes SDRAM configuration and size visibility for trats board.
Common code is set for trats and universal boards.
Low level initialisation in U-boot is eliminated for universal_c210 board.
Piotr Wilczek (4):
arm:exynos4:trats: Correct SDRAM configuration for trats
arm:exynos4:trats: Fix SDRAM size
arm:exynos4:trats&universal_c210: Set common code for trats and
universal_c210 boards
arm:exynos4:universal_c210: Eliminate low level initialisation
board/samsung/exynos4_common/exynos4_common.c | 139 +++++++++
board/samsung/trats/trats.c | 98 +------
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 -------------------------
board/samsung/universal_c210/universal.c | 105 +------
include/configs/s5pc210_universal.h | 2 +
include/configs/trats.h | 17 +-
7 files changed, 163 insertions(+), 594 deletions(-)
create mode 100644 board/samsung/exynos4_common/exynos4_common.c
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
--
1.7.5.4
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 1/4] arm:exynos4:trats: Correct SDRAM configuration for trats
2012-08-10 10:12 [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
@ 2012-08-10 10:12 ` Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 2/4] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
` (2 subsequent siblings)
3 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-10 10:12 UTC (permalink / raw)
To: u-boot
SDRAM setup alike to ORIGEN Dev board.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
include/configs/trats.h | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 185cb68..f391227 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -170,12 +170,17 @@
/* Stack sizes */
#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 2/4] arm:exynos4:trats: Fix SDRAM size
2012-08-10 10:12 [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 1/4] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-08-10 10:12 ` Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 4/4] arm:exynos4:universal_c210: Eliminate low level initialisation Piotr Wilczek
3 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-10 10:12 UTC (permalink / raw)
To: u-boot
Now full 1GiB is visible
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
board/samsung/trats/trats.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a8b2b11..f5df56c 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -76,7 +76,9 @@ int board_init(void)
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards
2012-08-10 10:12 [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 1/4] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 2/4] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
@ 2012-08-10 10:12 ` Piotr Wilczek
2012-08-16 9:09 ` Minkyu Kang
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 4/4] arm:exynos4:universal_c210: Eliminate low level initialisation Piotr Wilczek
3 siblings, 2 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-10 10:12 UTC (permalink / raw)
To: u-boot
Boards trats and universal are very similar resulting in some common code.
That common code is moved to exynos4_common/exynos4_common.c
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
board/samsung/exynos4_common/exynos4_common.c | 139 +++++++++++++++++++++++++
board/samsung/trats/trats.c | 104 +------------------
board/samsung/universal_c210/universal.c | 98 +-----------------
3 files changed, 143 insertions(+), 198 deletions(-)
create mode 100644 board/samsung/exynos4_common/exynos4_common.c
diff --git a/board/samsung/exynos4_common/exynos4_common.c b/board/samsung/exynos4_common/exynos4_common.c
new file mode 100644
index 0000000..f2413e5
--- /dev/null
+++ b/board/samsung/exynos4_common/exynos4_common.c
@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ * Heungjun Kim <riverful.kim@samsung.com>
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+ return board_rev;
+}
+#endif
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+ gd->ram_size += get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
+#endif
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
+ PHYS_SDRAM_1_SIZE);
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
+ PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
+ PHYS_SDRAM_3_SIZE);
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
+ PHYS_SDRAM_4_SIZE);
+#endif
+}
+
+int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)
+{
+ int i, err;
+
+ /*
+ * eMMC GPIO:
+ * SDR 8-bit at 48MHz at MMC0
+ * GPK0[0] SD_0_CLK(2)
+ * GPK0[1] SD_0_CMD(2)
+ * GPK0[2] SD_0_CDn -> Not used
+ * GPK0[3:6] SD_0_DATA[0:3](2)
+ * GPK1[3:6] SD_0_DATA[0:3](3)
+ *
+ * DDR 4-bit at 26MHz at MMC4
+ * GPK0[0] SD_4_CLK(3)
+ * GPK0[1] SD_4_CMD(3)
+ * GPK0[2] SD_4_CDn -> Not used
+ * GPK0[3:6] SD_4_DATA[0:3](3)
+ * GPK1[3:6] SD_4_DATA[4:7](4)
+ */
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ /* GPK0[0:6] special function 2 */
+ s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
+ /* GPK0[0:6] pull disable */
+ s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
+ /* GPK0[0:6] drv 4x */
+ s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
+ }
+
+ for (i = 3; i < 7; i++) {
+ /* GPK1[3:6] special function 3 */
+ s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
+ /* GPK1[3:6] pull disable */
+ s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
+ /* GPK1[3:6] drv 4x */
+ s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
+ }
+
+ /* T-flash detect */
+ s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
+ s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
+
+ /*
+ * MMC device init
+ * mmc0 : eMMC (8-bit buswidth)
+ * mmc2 : SD card (4-bit buswidth)
+ */
+ err = s5p_mmc_init(0, 8);
+
+ /*
+ * Check the T-flash detect pin
+ * GPX3[4] T-flash detect pin
+ */
+ if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
+ /*
+ * SD card GPIO:
+ * GPK2[0] SD_2_CLK(2)
+ * GPK2[1] SD_2_CMD(2)
+ * GPK2[2] SD_2_CDn -> Not used
+ * GPK2[3:6] SD_2_DATA[0:3](2)
+ */
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ /* GPK2[0:6] special function 2 */
+ s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
+ /* GPK2[0:6] pull disable */
+ s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
+ /* GPK2[0:6] drv 4x */
+ s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
+ }
+ err = s5p_mmc_init(2, 4);
+ }
+
+ return err;
+}
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f5df56c..7425215 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -45,12 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned int board_rev;
-#ifdef CONFIG_REVISION_TAG
-u32 get_board_rev(void)
-{
- return board_rev;
-}
-#endif
+#include "../exynos4_common/exynos4_common.c"
static void check_hw_revision(void);
@@ -73,28 +68,6 @@ int board_init(void)
return 0;
}
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-}
-
static unsigned int get_hw_revision(void)
{
struct exynos4_gpio_part1 *gpio =
@@ -140,85 +113,12 @@ int board_mmc_init(bd_t *bis)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(&gpio->k0, 2, 1);
s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
- /*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
- }
-
- /*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = s5p_mmc_init(0, 8);
-
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio->x3, 4, GPIO_PULL_UP);
-
- /*
- * Check the T-flash detect pin
- * GPX3[4] T-flash detect pin
- */
- if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
- }
-
- return err;
+ return exynos4_mmc_init(gpio);
}
#endif
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 90fff5c..a64eba0 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -38,10 +38,7 @@ struct exynos4_gpio_part1 *gpio1;
struct exynos4_gpio_part2 *gpio2;
unsigned int board_rev;
-u32 get_board_rev(void)
-{
- return board_rev;
-}
+#include "../exynos4_common/exynos4_common.c"
static int get_hwrev(void)
{
@@ -68,22 +65,6 @@ int board_init(void)
return 0;
}
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-}
-
static unsigned short get_adc_value(int channel)
{
struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
@@ -177,8 +158,6 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i, err;
-
switch (get_hwrev()) {
case 0:
/*
@@ -199,80 +178,7 @@ int board_mmc_init(bd_t *bis)
break;
}
- /*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
- }
-
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
- /*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = s5p_mmc_init(0, 8);
-
- /*
- * Check the T-flash detect pin
- * GPX3[4] T-flash detect pin
- */
- if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
- }
-
- return err;
-
+ return exynos4_mmc_init(gpio2);
}
#endif
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/4] arm:exynos4:universal_c210: Eliminate low level initialisation
2012-08-10 10:12 [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
` (2 preceding siblings ...)
2012-08-10 10:12 ` [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards Piotr Wilczek
@ 2012-08-10 10:12 ` Piotr Wilczek
3 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-10 10:12 UTC (permalink / raw)
To: u-boot
The low level initialisation is not necessary in U-boot
since it is done by another bootloader.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 7 +
include/configs/s5pc210_universal.h | 2 +
4 files changed, 9 insertions(+), 396 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile
index bfec08f..587cc1b 100644
--- a/board/samsung/universal_c210/Makefile
+++ b/board/samsung/universal_c210/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := universal.o onenand.o
-SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
deleted file mode 100644
index dc7f69e..0000000
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * Lowlevel setup for universal board based on EXYNOS4210
- *
- * Copyright (C) 2010 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clock.h>
-
-/*
- * Register usages:
- *
- * r5 has zero always
- * r7 has GPIO part1 base 0x11400000
- * r6 has GPIO part2 base 0x11000000
- */
-
- .globl lowlevel_init
-lowlevel_init:
- mov r11, lr
-
- /* r5 has always zero */
- mov r5, #0
-
- ldr r7, =EXYNOS4_GPIO_PART1_BASE
- ldr r6, =EXYNOS4_GPIO_PART2_BASE
-
- /* System Timer */
- ldr r0, =EXYNOS4_SYSTIMER_BASE
- ldr r1, =0x5000
- str r1, [r0, #0x0]
- ldr r1, =0xffffffff
- str r1, [r0, #0x8]
- ldr r1, =0x49
- str r1, [r0, #0x4]
-
- /* PMIC manual reset */
- /* nPOWER: XEINT_23: GPX2[7] */
- add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28) @ Output
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- /* init system clock */
- bl system_clock_init
-
- /* Disable Watchdog */
- ldr r0, =EXYNOS4_WATCHDOG_BASE @0x10060000
- str r5, [r0]
-
- /* UART */
- bl uart_asm_init
-
- /* PMU init */
- bl system_power_init
-
- bl tzpc_init
-
- mov lr, r11
- mov pc, lr
- nop
- nop
- nop
-
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
- /*
- * setup UART0-UART4 GPIOs (part1)
- * GPA1CON[3] = I2C_3_SCL (3)
- * GPA1CON[2] = I2C_3_SDA (3)
- */
- mov r0, r7
- ldr r1, =0x22222222
- str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET
- ldr r1, =0x00223322
- str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET
-
- /* UART_SEL GPY4[7] (part2)@EXYNOS4 */
- add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28)
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x8]
- bic r1, r1, #(0x3 << 14) @ 14 = 7 * 2-bit
- orr r1, r1, #(0x3 << 14) @ Pull-up enabled
- str r1, [r0, #0x8]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- mov pc, lr
- nop
- nop
- nop
-
-system_clock_init:
- ldr r0, =EXYNOS4_CLOCK_BASE
-
- /* APLL(1), MPLL(1), CORE(0), HPM(0) */
- ldr r1, =0x0101
- ldr r2, =0x14200 @ CLK_SRC_CPU
- str r1, [r0, r2]
-
- /* wait ?us */
- mov r1, #0x10000
-1: subs r1, r1, #1
- bne 1b
-
- /*
- * CLK_SRC_TOP0
- * MUX_ONENAND_SEL[28] 0: DOUT133, 1: DOUT166
- * MUX_VPLL_SEL[8] 0: FINPLL, 1: FOUTVPLL
- * MUX_EPLL_SEL[4] 0: FINPLL, 1: FOUTEPLL
- */
- ldr r1, =0x10000110
- ldr r2, =0x0C210 @ CLK_SRC_TOP
- str r1, [r0, r2]
-
- /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */
- ldr r1, =0x0066666
- ldr r2, =0x0C240 @ CLK_SRC_FSYS
- str r1, [r0, r2]
- /* UART[0:5], PWM: SCLKMPLL(6) */
- ldr r1, =0x6666666
- ldr r2, =0x0C250 @ CLK_SRC_PERIL0_OFFSET
- str r1, [r0, r2]
-
- /* CPU0: CORE, COREM0, COREM1, PERI, ATB, PCLK_DBG, APLL */
- ldr r1, =0x0133730
- ldr r2, =0x14500 @ CLK_DIV_CPU0
- str r1, [r0, r2]
- /* CPU1: COPY, HPM */
- ldr r1, =0x03
- ldr r2, =0x14504 @ CLK_DIV_CPU1
- str r1, [r0, r2]
- /* DMC0: ACP, ACP_PCLK, DPHY, DMC, DMCD, DMCP, COPY2 CORE_TIMER */
- ldr r1, =0x13111113
- ldr r2, =0x10500 @ CLK_DIV_DMC0
- str r1, [r0, r2]
- /* DMC1: PWI, DVSEM, DPM */
- ldr r1, =0x01010100
- ldr r2, =0x10504 @ CLK_DIV_DMC1
- str r1, [r0, r2]
- /* LEFTBUS: GDL, GPL */
- ldr r1, =0x13
- ldr r2, =0x04500 @ CLK_DIV_LEFTBUS
- str r1, [r0, r2]
- /* RIGHHTBUS: GDR, GPR */
- ldr r1, =0x13
- ldr r2, =0x08500 @ CLK_DIV_RIGHTBUS
- str r1, [r0, r2]
- /*
- * CLK_DIV_TOP
- * ONENAND_RATIOD[18:16]: 0 SCLK_ONENAND = MOUTONENAND / (n + 1)
- * ACLK_200, ACLK_100, ACLK_160, ACLK_133,
- */
- ldr r1, =0x00005473
- ldr r2, =0x0C510 @ CLK_DIV_TOP
- str r1, [r0, r2]
- /* MMC[0:1] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C544 @ CLK_DIV_FSYS1
- str r1, [r0, r2]
- /* MMC[2:3] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C548 @ CLK_DIV_FSYS2
- str r1, [r0, r2]
- /* MMC4 */
- ldr r1, =0x000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C54C @ CLK_DIV_FSYS3
- str r1, [r0, r2]
- /* UART[0:5] */
- ldr r1, =0x774777
- ldr r2, =0x0C550 @ CLK_DIV_PERIL0
- str r1, [r0, r2]
- /* SLIMBUS: ???, PWM */
- ldr r1, =0x8
- ldr r2, =0x0C55C @ CLK_DIV_PERIL3
- str r1, [r0, r2]
-
- /* PLL Setting */
- ldr r1, =0x1C20
- ldr r2, =0x14000 @ APLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x14008 @ MPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C010 @ EPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C020 @ VPLL_LOCK
- str r1, [r0, r2]
-
- /* APLL */
- ldr r1, =0x8000001c
- ldr r2, =0x14104 @ APLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14100 @ APLL_CON0
- str r1, [r0, r2]
- /* MPLL */
- ldr r1, =0x8000001C
- ldr r2, =0x1410C @ MPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14108 @ MPLL_CON0
- str r1, [r0, r2]
- /* EPLL */
- ldr r1, =0x0
- ldr r2, =0x0C114 @ EPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80300302 @ 96MHz
- ldr r2, =0x0C110 @ EPLL_CON0
- str r1, [r0, r2]
- /* VPLL */
- ldr r1, =0x11000400
- ldr r2, =0x0C124 @ VPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80350302 @ 108MHz
- ldr r2, =0x0C120 @ VPLL_CON0
- str r1, [r0, r2]
-
- /*
- * SMMUJPEG[11], JPEG[6], CSIS1[5] : 0111 1001
- * Turn off all
- */
- ldr r1, =0xFFF80000
- ldr r2, =0x0C920 @ CLK_GATE_IP_CAM
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C924 @ CLK_GATE_IP_VP
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFE0
- ldr r2, =0x0C928 @ CLK_GATE_IP_MFC
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C92C @ CLK_GATE_IP_G3D
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFC00
- ldr r2, =0x0C930 @ CLK_GATE_IP_IMAGE
- str r1, [r0, r2]
-
- /* DSIM0[3], MDNIE0[2], MIE0[1] : 0001 */
- ldr r1, =0xFFFFFFF1
- ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C938 @ CLK_GATE_IP_LCD1
- str r1, [r0, r2]
-
- /*
- * SMMUPCIE[18], NFCON[16] : 1111 1010
- * PCIE[14], SATA[10], SDMMC43[9:8] : 1011 1000
- * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2] : 1010 0011
- */
- ldr r1, =0xFFFAB8A3
- ldr r2, =0x0C940 @ CLK_GATE_IP_FSYS
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C94C @ CLK_GATE_IP_GPS
- str r1, [r0, r2]
-
- /*
- * AC97[27], SPDIF[26], SLIMBUS[25] : 1111 0001
- * I2C2[8] : 1111 1110
- */
- ldr r1, =0xF1FFFEFF
- ldr r2, =0x0C950 @ CLK_GATE_IP_PERIL
- str r1, [r0, r2]
-
- /*
- * KEYIF[16] : 1111 1110
- */
- ldr r1, =0xFFFEFFFF
- ldr r2, =0x0C960 @ CLK_GATE_IP_PERIR
- str r1, [r0, r2]
-
- /* LCD1[5], G3D[3], MFC[2], TV[1] : 1101 0001 */
- ldr r1, =0xFFFFFFD1
- ldr r2, =0x0C970 @ CLK_GATE_BLOCK
- str r1, [r0, r2]
- mov pc, lr
- nop
- nop
- nop
-
-system_power_init:
- ldr r0, =EXYNOS4_POWER_BASE @ 0x10020000
-
- ldr r2, =0x330C @ PS_HOLD_CONTROL
- ldr r1, [r0, r2]
- orr r1, r1, #(0x3 << 8) @ Data High, Output En
- str r1, [r0, r2]
-
- /* Power Down */
- add r2, r0, #0x3000
- str r5, [r2, #0xC20] @ TV_CONFIGURATION
- str r5, [r2, #0xC40] @ MFC_CONFIGURATION
- str r5, [r2, #0xC60] @ G3D_CONFIGURATION
- str r5, [r2, #0xCA0] @ LCD1_CONFIGURATION
- str r5, [r2, #0xCE0] @ GPS_CONFIGURATION
-
- mov pc, lr
- nop
- nop
- nop
-
-tzpc_init:
- ldr r0, =0x10110000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10120000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10130000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10140000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10150000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- mov pc, lr
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index a64eba0..f4d273b 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -226,3 +226,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_flags = PHY0_SLEEP,
};
#endif
+
+int board_early_init_f(void)
+{
+ wdt_stop();
+
+ return 0;
+}
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index a332f28..7978317 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -56,6 +56,8 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards
2012-08-10 10:12 ` [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards Piotr Wilczek
@ 2012-08-16 9:09 ` Minkyu Kang
2012-08-16 13:55 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
1 sibling, 1 reply; 40+ messages in thread
From: Minkyu Kang @ 2012-08-16 9:09 UTC (permalink / raw)
To: u-boot
Dear Piotr Wilczek,
On 10 August 2012 19:12, Piotr Wilczek <p.wilczek@samsung.com> wrote:
> Boards trats and universal are very similar resulting in some common code.
> That common code is moved to exynos4_common/exynos4_common.c
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> board/samsung/exynos4_common/exynos4_common.c | 139 +++++++++++++++++++++++++
> board/samsung/trats/trats.c | 104 +------------------
> board/samsung/universal_c210/universal.c | 98 +-----------------
> 3 files changed, 143 insertions(+), 198 deletions(-)
> create mode 100644 board/samsung/exynos4_common/exynos4_common.c
>
> diff --git a/board/samsung/exynos4_common/exynos4_common.c b/board/samsung/exynos4_common/exynos4_common.c
> new file mode 100644
> index 0000000..f2413e5
> --- /dev/null
> +++ b/board/samsung/exynos4_common/exynos4_common.c
I'll reject your patch.
It's not a standard way, I think..
> +#ifdef CONFIG_REVISION_TAG
> +u32 get_board_rev(void)
> +{
> + return board_rev;
> +}
> +#endif
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
> + + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
> +#if CONFIG_NR_DRAM_BANKS == 4
> + gd->ram_size += get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
> + + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
> +#endif
> + return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
> + PHYS_SDRAM_1_SIZE);
> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> + gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
> + PHYS_SDRAM_2_SIZE);
> +#if CONFIG_NR_DRAM_BANKS == 4
> + gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
> + gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
> + PHYS_SDRAM_3_SIZE);
> + gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
> + gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
> + PHYS_SDRAM_4_SIZE);
> +#endif
> +}
also, this is not a common function.
Although they are almost same, but I think it's a board specific.
Please don't move it.
> +
> +int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)
How about using pinmux instead?
Thanks.
Minkyu Kang.
--
from. prom.
www.promsoft.net
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards
2012-08-16 9:09 ` Minkyu Kang
@ 2012-08-16 13:55 ` Piotr Wilczek
0 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-16 13:55 UTC (permalink / raw)
To: u-boot
Dear Minkyu Kang,
Thank you for your comments. My motivation to move the dram_init functions
was that they looked the same for every board. I keep them in the board
specific file. I'll fix all the other issues and prepare new version.
Best regards
Piotr Wilczek
-----Original Message-----
From: Minkyu Kang [mailto:promsoft at gmail.com]
Sent: Thursday, August 16, 2012 11:10 AM
To: Piotr Wilczek
Cc: u-boot at lists.denx.de; Kyungmin Park
Subject: Re: [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and
universal_c210 boards
Dear Piotr Wilczek,
On 10 August 2012 19:12, Piotr Wilczek <p.wilczek@samsung.com> wrote:
> Boards trats and universal are very similar resulting in some common code.
> That common code is moved to exynos4_common/exynos4_common.c
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> board/samsung/exynos4_common/exynos4_common.c | 139
+++++++++++++++++++++++++
> board/samsung/trats/trats.c | 104 +------------------
> board/samsung/universal_c210/universal.c | 98 +-----------------
> 3 files changed, 143 insertions(+), 198 deletions(-) create mode
> 100644 board/samsung/exynos4_common/exynos4_common.c
>
> diff --git a/board/samsung/exynos4_common/exynos4_common.c
> b/board/samsung/exynos4_common/exynos4_common.c
> new file mode 100644
> index 0000000..f2413e5
> --- /dev/null
> +++ b/board/samsung/exynos4_common/exynos4_common.c
I'll reject your patch.
It's not a standard way, I think..
> +#ifdef CONFIG_REVISION_TAG
> +u32 get_board_rev(void)
> +{
> + return board_rev;
> +}
> +#endif
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1,
PHYS_SDRAM_1_SIZE)
> + + get_ram_size((long *)PHYS_SDRAM_2,
> +PHYS_SDRAM_2_SIZE); #if CONFIG_NR_DRAM_BANKS == 4
> + gd->ram_size += get_ram_size((long *)PHYS_SDRAM_3,
PHYS_SDRAM_3_SIZE)
> + + get_ram_size((long *)PHYS_SDRAM_4,
> +PHYS_SDRAM_4_SIZE); #endif
> + return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
> +
PHYS_SDRAM_1_SIZE);
> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> + gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
> +
> +PHYS_SDRAM_2_SIZE); #if CONFIG_NR_DRAM_BANKS == 4
> + gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
> + gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
> +
PHYS_SDRAM_3_SIZE);
> + gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
> + gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
> +
> +PHYS_SDRAM_4_SIZE); #endif }
also, this is not a common function.
Although they are almost same, but I think it's a board specific.
Please don't move it.
> +
> +int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)
How about using pinmux instead?
Thanks.
Minkyu Kang.
--
from. prom.
www.promsoft.net
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal
2012-08-10 10:12 ` [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards Piotr Wilczek
2012-08-16 9:09 ` Minkyu Kang
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
` (5 more replies)
1 sibling, 6 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
This patch fixes SDRAM configuration and size visibility fot Trats board.
Code for MMC initialisation is moved from board file to pinmux.
MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards.
MMC initialisation for boards Trats and Universal C210 is done using pinmux.
Low level initialisation in u-boot is eliminated as it done by
previous bootloader.
Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats
arm:exynos4:trats: Fix SDRAM size
arm:exynos4:pinmux: Modify the gpio function for mmc
arm:exynos4:trats: Use pinmux for mmc configuration
arm:exynos4:universal: Use pinmux for mmc configuration
arm:exynos4:universal: Eliminated low level init
arch/arm/cpu/armv7/exynos/pinmux.c | 56 ++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
board/samsung/trats/trats.c | 70 ++----
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 78 ++----
include/configs/s5pc210_universal.h | 2 +
include/configs/trats.h | 17 +-
8 files changed, 111 insertions(+), 509 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
--
1.7.5.4
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 2/6 v2] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
` (4 subsequent siblings)
5 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
SDRAM setup alike to ORIGEN Dev board.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
include/configs/trats.h | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 185cb68..f391227 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -170,12 +170,17 @@
/* Stack sizes */
#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 2/6 v2] arm:exynos4:trats: Fix SDRAM size
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 3/6 v2] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
` (3 subsequent siblings)
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
Full 1GiB is visible
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no chages
board/samsung/trats/trats.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a8b2b11..f5df56c 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -76,7 +76,9 @@ int board_init(void)
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 3/6 v2] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 2/6 v2] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
` (2 subsequent siblings)
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
This patch add pinmux settings for Exynos4 for mmc0 and mmc2
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file
arch/arm/cpu/armv7/exynos/pinmux.c | 56 +++++++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
2 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index d2b7d2c..84ee05c 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
return 0;
}
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = &gpio2->k0;
+ bank_ext = &gpio2->k1;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = &gpio2->k2;
+ bank_ext = &gpio2->k3;
+ break;
+ }
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ if (flags & PINMUX_FLAG_8BIT_MODE) {
+ for (i = 3; i < 7; i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+
+ return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC2:
+ return exynos4_mmc_config(peripheral, flags);
+ case PERIPH_ID_SDMMC1:
+ case PERIPH_ID_SDMMC3:
+ case PERIPH_ID_SDMMC4:
+ printf("SDMMC device %d not implemented\n", peripheral);
+ return -1;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug("pinmux functionality not supported\n");
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa..4e1da82 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -34,6 +34,7 @@ enum periph_id {
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
PERIPH_ID_SROMC,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
` (2 preceding siblings ...)
2012-08-23 12:01 ` [U-Boot] [PATCH 3/6 v2] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-24 1:17 ` Jaehoon Chung
2012-08-23 12:01 ` [U-Boot] [PATCH 5/6 v2] arm:exynos4:universal: " Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 6/6 v2] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
5 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Trats
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Chaneges for v2:
- mmc iniatialisation using pinmux
board/samsung/trats/trats.c | 62 +++++++-----------------------------------
1 files changed, 11 insertions(+), 51 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f5df56c..0fab2e0 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -29,6 +29,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
@@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
+ int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(&gpio->k0, 2, 1);
s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
- /*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err) {
+ debug("SDMMC0 not configured\n");
+ return err;
}
/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("SDMMC2 not configured\n");
+ return err;
}
+
err = s5p_mmc_init(2, 4);
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 5/6 v2] arm:exynos4:universal: Use pinmux for mmc configuration
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
` (3 preceding siblings ...)
2012-08-23 12:01 ` [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 6/6 v2] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Universal C210
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation using pinmux
board/samsung/universal_c210/universal.c | 70 ++++++-----------------------
1 files changed, 15 insertions(+), 55 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 90fff5c..f6bc51d 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,6 +27,7 @@
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i, err;
+ int err;
switch (get_hwrev()) {
case 0:
@@ -199,46 +200,12 @@ int board_mmc_init(bd_t *bis)
break;
}
- /*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err) {
+ debug("SDMMC0 not configured\n");
+ return err;
}
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
/*
* MMC device init
* mmc0 : eMMC (8-bit buswidth)
@@ -246,28 +213,21 @@ int board_mmc_init(bd_t *bis)
*/
err = s5p_mmc_init(0, 8);
+ /* T-flash detect */
+ s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
+ s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
+
/*
* Check the T-flash detect pin
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("SDMMC2 not configured\n");
+ return err;
}
+
err = s5p_mmc_init(2, 4);
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 6/6 v2] arm:exynos4:universal: Eliminated low level init
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
` (4 preceding siblings ...)
2012-08-23 12:01 ` [U-Boot] [PATCH 5/6 v2] arm:exynos4:universal: " Piotr Wilczek
@ 2012-08-23 12:01 ` Piotr Wilczek
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-23 12:01 UTC (permalink / raw)
To: u-boot
Low level initialisation is done by another bootloader
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 8 +
include/configs/s5pc210_universal.h | 2 +
4 files changed, 10 insertions(+), 396 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile
index bfec08f..587cc1b 100644
--- a/board/samsung/universal_c210/Makefile
+++ b/board/samsung/universal_c210/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := universal.o onenand.o
-SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
deleted file mode 100644
index dc7f69e..0000000
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * Lowlevel setup for universal board based on EXYNOS4210
- *
- * Copyright (C) 2010 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clock.h>
-
-/*
- * Register usages:
- *
- * r5 has zero always
- * r7 has GPIO part1 base 0x11400000
- * r6 has GPIO part2 base 0x11000000
- */
-
- .globl lowlevel_init
-lowlevel_init:
- mov r11, lr
-
- /* r5 has always zero */
- mov r5, #0
-
- ldr r7, =EXYNOS4_GPIO_PART1_BASE
- ldr r6, =EXYNOS4_GPIO_PART2_BASE
-
- /* System Timer */
- ldr r0, =EXYNOS4_SYSTIMER_BASE
- ldr r1, =0x5000
- str r1, [r0, #0x0]
- ldr r1, =0xffffffff
- str r1, [r0, #0x8]
- ldr r1, =0x49
- str r1, [r0, #0x4]
-
- /* PMIC manual reset */
- /* nPOWER: XEINT_23: GPX2[7] */
- add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28) @ Output
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- /* init system clock */
- bl system_clock_init
-
- /* Disable Watchdog */
- ldr r0, =EXYNOS4_WATCHDOG_BASE @0x10060000
- str r5, [r0]
-
- /* UART */
- bl uart_asm_init
-
- /* PMU init */
- bl system_power_init
-
- bl tzpc_init
-
- mov lr, r11
- mov pc, lr
- nop
- nop
- nop
-
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
- /*
- * setup UART0-UART4 GPIOs (part1)
- * GPA1CON[3] = I2C_3_SCL (3)
- * GPA1CON[2] = I2C_3_SDA (3)
- */
- mov r0, r7
- ldr r1, =0x22222222
- str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET
- ldr r1, =0x00223322
- str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET
-
- /* UART_SEL GPY4[7] (part2)@EXYNOS4 */
- add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28)
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x8]
- bic r1, r1, #(0x3 << 14) @ 14 = 7 * 2-bit
- orr r1, r1, #(0x3 << 14) @ Pull-up enabled
- str r1, [r0, #0x8]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- mov pc, lr
- nop
- nop
- nop
-
-system_clock_init:
- ldr r0, =EXYNOS4_CLOCK_BASE
-
- /* APLL(1), MPLL(1), CORE(0), HPM(0) */
- ldr r1, =0x0101
- ldr r2, =0x14200 @ CLK_SRC_CPU
- str r1, [r0, r2]
-
- /* wait ?us */
- mov r1, #0x10000
-1: subs r1, r1, #1
- bne 1b
-
- /*
- * CLK_SRC_TOP0
- * MUX_ONENAND_SEL[28] 0: DOUT133, 1: DOUT166
- * MUX_VPLL_SEL[8] 0: FINPLL, 1: FOUTVPLL
- * MUX_EPLL_SEL[4] 0: FINPLL, 1: FOUTEPLL
- */
- ldr r1, =0x10000110
- ldr r2, =0x0C210 @ CLK_SRC_TOP
- str r1, [r0, r2]
-
- /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */
- ldr r1, =0x0066666
- ldr r2, =0x0C240 @ CLK_SRC_FSYS
- str r1, [r0, r2]
- /* UART[0:5], PWM: SCLKMPLL(6) */
- ldr r1, =0x6666666
- ldr r2, =0x0C250 @ CLK_SRC_PERIL0_OFFSET
- str r1, [r0, r2]
-
- /* CPU0: CORE, COREM0, COREM1, PERI, ATB, PCLK_DBG, APLL */
- ldr r1, =0x0133730
- ldr r2, =0x14500 @ CLK_DIV_CPU0
- str r1, [r0, r2]
- /* CPU1: COPY, HPM */
- ldr r1, =0x03
- ldr r2, =0x14504 @ CLK_DIV_CPU1
- str r1, [r0, r2]
- /* DMC0: ACP, ACP_PCLK, DPHY, DMC, DMCD, DMCP, COPY2 CORE_TIMER */
- ldr r1, =0x13111113
- ldr r2, =0x10500 @ CLK_DIV_DMC0
- str r1, [r0, r2]
- /* DMC1: PWI, DVSEM, DPM */
- ldr r1, =0x01010100
- ldr r2, =0x10504 @ CLK_DIV_DMC1
- str r1, [r0, r2]
- /* LEFTBUS: GDL, GPL */
- ldr r1, =0x13
- ldr r2, =0x04500 @ CLK_DIV_LEFTBUS
- str r1, [r0, r2]
- /* RIGHHTBUS: GDR, GPR */
- ldr r1, =0x13
- ldr r2, =0x08500 @ CLK_DIV_RIGHTBUS
- str r1, [r0, r2]
- /*
- * CLK_DIV_TOP
- * ONENAND_RATIOD[18:16]: 0 SCLK_ONENAND = MOUTONENAND / (n + 1)
- * ACLK_200, ACLK_100, ACLK_160, ACLK_133,
- */
- ldr r1, =0x00005473
- ldr r2, =0x0C510 @ CLK_DIV_TOP
- str r1, [r0, r2]
- /* MMC[0:1] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C544 @ CLK_DIV_FSYS1
- str r1, [r0, r2]
- /* MMC[2:3] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C548 @ CLK_DIV_FSYS2
- str r1, [r0, r2]
- /* MMC4 */
- ldr r1, =0x000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C54C @ CLK_DIV_FSYS3
- str r1, [r0, r2]
- /* UART[0:5] */
- ldr r1, =0x774777
- ldr r2, =0x0C550 @ CLK_DIV_PERIL0
- str r1, [r0, r2]
- /* SLIMBUS: ???, PWM */
- ldr r1, =0x8
- ldr r2, =0x0C55C @ CLK_DIV_PERIL3
- str r1, [r0, r2]
-
- /* PLL Setting */
- ldr r1, =0x1C20
- ldr r2, =0x14000 @ APLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x14008 @ MPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C010 @ EPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C020 @ VPLL_LOCK
- str r1, [r0, r2]
-
- /* APLL */
- ldr r1, =0x8000001c
- ldr r2, =0x14104 @ APLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14100 @ APLL_CON0
- str r1, [r0, r2]
- /* MPLL */
- ldr r1, =0x8000001C
- ldr r2, =0x1410C @ MPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14108 @ MPLL_CON0
- str r1, [r0, r2]
- /* EPLL */
- ldr r1, =0x0
- ldr r2, =0x0C114 @ EPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80300302 @ 96MHz
- ldr r2, =0x0C110 @ EPLL_CON0
- str r1, [r0, r2]
- /* VPLL */
- ldr r1, =0x11000400
- ldr r2, =0x0C124 @ VPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80350302 @ 108MHz
- ldr r2, =0x0C120 @ VPLL_CON0
- str r1, [r0, r2]
-
- /*
- * SMMUJPEG[11], JPEG[6], CSIS1[5] : 0111 1001
- * Turn off all
- */
- ldr r1, =0xFFF80000
- ldr r2, =0x0C920 @ CLK_GATE_IP_CAM
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C924 @ CLK_GATE_IP_VP
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFE0
- ldr r2, =0x0C928 @ CLK_GATE_IP_MFC
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C92C @ CLK_GATE_IP_G3D
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFC00
- ldr r2, =0x0C930 @ CLK_GATE_IP_IMAGE
- str r1, [r0, r2]
-
- /* DSIM0[3], MDNIE0[2], MIE0[1] : 0001 */
- ldr r1, =0xFFFFFFF1
- ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C938 @ CLK_GATE_IP_LCD1
- str r1, [r0, r2]
-
- /*
- * SMMUPCIE[18], NFCON[16] : 1111 1010
- * PCIE[14], SATA[10], SDMMC43[9:8] : 1011 1000
- * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2] : 1010 0011
- */
- ldr r1, =0xFFFAB8A3
- ldr r2, =0x0C940 @ CLK_GATE_IP_FSYS
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C94C @ CLK_GATE_IP_GPS
- str r1, [r0, r2]
-
- /*
- * AC97[27], SPDIF[26], SLIMBUS[25] : 1111 0001
- * I2C2[8] : 1111 1110
- */
- ldr r1, =0xF1FFFEFF
- ldr r2, =0x0C950 @ CLK_GATE_IP_PERIL
- str r1, [r0, r2]
-
- /*
- * KEYIF[16] : 1111 1110
- */
- ldr r1, =0xFFFEFFFF
- ldr r2, =0x0C960 @ CLK_GATE_IP_PERIR
- str r1, [r0, r2]
-
- /* LCD1[5], G3D[3], MFC[2], TV[1] : 1101 0001 */
- ldr r1, =0xFFFFFFD1
- ldr r2, =0x0C970 @ CLK_GATE_BLOCK
- str r1, [r0, r2]
- mov pc, lr
- nop
- nop
- nop
-
-system_power_init:
- ldr r0, =EXYNOS4_POWER_BASE @ 0x10020000
-
- ldr r2, =0x330C @ PS_HOLD_CONTROL
- ldr r1, [r0, r2]
- orr r1, r1, #(0x3 << 8) @ Data High, Output En
- str r1, [r0, r2]
-
- /* Power Down */
- add r2, r0, #0x3000
- str r5, [r2, #0xC20] @ TV_CONFIGURATION
- str r5, [r2, #0xC40] @ MFC_CONFIGURATION
- str r5, [r2, #0xC60] @ G3D_CONFIGURATION
- str r5, [r2, #0xCA0] @ LCD1_CONFIGURATION
- str r5, [r2, #0xCE0] @ GPS_CONFIGURATION
-
- mov pc, lr
- nop
- nop
- nop
-
-tzpc_init:
- ldr r0, =0x10110000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10120000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10130000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10140000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10150000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- mov pc, lr
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index f6bc51d..8a114e6 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -32,6 +32,7 @@
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
#include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -280,3 +281,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_flags = PHY0_SLEEP,
};
#endif
+
+int board_early_init_f(void)
+{
+ wdt_stop();
+
+ return 0;
+}
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index a332f28..7978317 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -56,6 +56,8 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-23 12:01 ` [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
@ 2012-08-24 1:17 ` Jaehoon Chung
2012-08-24 7:40 ` Piotr Wilczek
0 siblings, 1 reply; 40+ messages in thread
From: Jaehoon Chung @ 2012-08-24 1:17 UTC (permalink / raw)
To: u-boot
On 08/23/2012 09:01 PM, Piotr Wilczek wrote:
> This patch use the pinmux for mmc configuration for Trats
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> Chaneges for v2:
> - mmc iniatialisation using pinmux
>
> board/samsung/trats/trats.c | 62 +++++++-----------------------------------
> 1 files changed, 11 insertions(+), 51 deletions(-)
>
> diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
> index f5df56c..0fab2e0 100644
> --- a/board/samsung/trats/trats.c
> +++ b/board/samsung/trats/trats.c
> @@ -29,6 +29,7 @@
> #include <asm/arch/cpu.h>
> #include <asm/arch/gpio.h>
> #include <asm/arch/mmc.h>
> +#include <asm/arch/pinmux.h>
> #include <asm/arch/clock.h>
> #include <asm/arch/clk.h>
> #include <asm/arch/mipi_dsim.h>
> @@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis)
> {
> struct exynos4_gpio_part2 *gpio =
> (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
> - int i, err;
> + int err;
>
> /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
> s5p_gpio_direction_output(&gpio->k0, 2, 1);
> s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
>
> - /*
> - * eMMC GPIO:
> - * SDR 8-bit at 48MHz at MMC0
> - * GPK0[0] SD_0_CLK(2)
> - * GPK0[1] SD_0_CMD(2)
> - * GPK0[2] SD_0_CDn -> Not used
> - * GPK0[3:6] SD_0_DATA[0:3](2)
> - * GPK1[3:6] SD_0_DATA[0:3](3)
> - *
> - * DDR 4-bit at 26MHz at MMC4
> - * GPK0[0] SD_4_CLK(3)
> - * GPK0[1] SD_4_CMD(3)
> - * GPK0[2] SD_4_CDn -> Not used
> - * GPK0[3:6] SD_4_DATA[0:3](3)
> - * GPK1[3:6] SD_4_DATA[4:7](4)
> - */
> - for (i = 0; i < 7; i++) {
> - if (i == 2)
> - continue;
> - /* GPK0[0:6] special function 2 */
> - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
> - /* GPK0[0:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
> - /* GPK0[0:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
> - }
> -
> - for (i = 3; i < 7; i++) {
> - /* GPK1[3:6] special function 3 */
> - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
> - /* GPK1[3:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
> - /* GPK1[3:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
> + err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
> + if (err) {
> + debug("SDMMC0 not configured\n");
> + return err;
> }
if err, return? then how can sd-card init?
SD/eMMC card didn't have the dependency.
Best Regards,
Jaehoon Chung
>
> /*
> @@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
> * GPX3[4] T-flash detect pin
> */
> if (!s5p_gpio_get_value(&gpio->x3, 4)) {
> - /*
> - * SD card GPIO:
> - * GPK2[0] SD_2_CLK(2)
> - * GPK2[1] SD_2_CMD(2)
> - * GPK2[2] SD_2_CDn -> Not used
> - * GPK2[3:6] SD_2_DATA[0:3](2)
> - */
> - for (i = 0; i < 7; i++) {
> - if (i == 2)
> - continue;
> - /* GPK2[0:6] special function 2 */
> - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
> - /* GPK2[0:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
> - /* GPK2[0:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
> + err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
> + if (err) {
> + debug("SDMMC2 not configured\n");
> + return err;
> }
> +
> err = s5p_mmc_init(2, 4);
> }
>
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-24 1:17 ` Jaehoon Chung
@ 2012-08-24 7:40 ` Piotr Wilczek
2012-08-24 8:19 ` Jaehoon Chung
0 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-24 7:40 UTC (permalink / raw)
To: u-boot
Dear Jaehoon Chung,
> -----Original Message-----
> From: Jaehoon Chung [mailto:jh80.chung at samsung.com]
> Sent: Friday, August 24, 2012 3:18 AM
> To: Piotr Wilczek
> Cc: u-boot at lists.denx.de; Kyungmin Park
> Subject: Re: [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for
> mmc configuration
>
> On 08/23/2012 09:01 PM, Piotr Wilczek wrote:
> > This patch use the pinmux for mmc configuration for Trats
> >
> > Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> > CC: Minkyu Kang <mk7.kang@samsung.com>
> > ---
> > Chaneges for v2:
> > - mmc iniatialisation using pinmux
> >
> > board/samsung/trats/trats.c | 62 +++++++--------------------------
> ---------
> > 1 files changed, 11 insertions(+), 51 deletions(-)
> >
> > diff --git a/board/samsung/trats/trats.c
> b/board/samsung/trats/trats.c
> > index f5df56c..0fab2e0 100644
> > --- a/board/samsung/trats/trats.c
> > +++ b/board/samsung/trats/trats.c
> > @@ -29,6 +29,7 @@
> > #include <asm/arch/cpu.h>
> > #include <asm/arch/gpio.h>
> > #include <asm/arch/mmc.h>
> > +#include <asm/arch/pinmux.h>
> > #include <asm/arch/clock.h>
> > #include <asm/arch/clk.h>
> > #include <asm/arch/mipi_dsim.h>
> > @@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis) {
> > struct exynos4_gpio_part2 *gpio =
> > (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
> > - int i, err;
> > + int err;
> >
> > /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
> > s5p_gpio_direction_output(&gpio->k0, 2, 1);
> > s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
> >
> > - /*
> > - * eMMC GPIO:
> > - * SDR 8-bit at 48MHz at MMC0
> > - * GPK0[0] SD_0_CLK(2)
> > - * GPK0[1] SD_0_CMD(2)
> > - * GPK0[2] SD_0_CDn -> Not used
> > - * GPK0[3:6] SD_0_DATA[0:3](2)
> > - * GPK1[3:6] SD_0_DATA[0:3](3)
> > - *
> > - * DDR 4-bit at 26MHz at MMC4
> > - * GPK0[0] SD_4_CLK(3)
> > - * GPK0[1] SD_4_CMD(3)
> > - * GPK0[2] SD_4_CDn -> Not used
> > - * GPK0[3:6] SD_4_DATA[0:3](3)
> > - * GPK1[3:6] SD_4_DATA[4:7](4)
> > - */
> > - for (i = 0; i < 7; i++) {
> > - if (i == 2)
> > - continue;
> > - /* GPK0[0:6] special function 2 */
> > - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
> > - /* GPK0[0:6] pull disable */
> > - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
> > - /* GPK0[0:6] drv 4x */
> > - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
> > - }
> > -
> > - for (i = 3; i < 7; i++) {
> > - /* GPK1[3:6] special function 3 */
> > - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
> > - /* GPK1[3:6] pull disable */
> > - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
> > - /* GPK1[3:6] drv 4x */
> > - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
> > + err = exynos_pinmux_config(PERIPH_ID_SDMMC0,
> PINMUX_FLAG_8BIT_MODE);
> > + if (err) {
> > + debug("SDMMC0 not configured\n");
> > + return err;
> > }
> if err, return? then how can sd-card init?
> SD/eMMC card didn't have the dependency.
exynos_pinmux_config() returns err only if given peripheral and/or mode (or
cpu) are not supported. Then gpio pins are not configured and MMC cannot be
initiated. Err is returned to indicate this situation and it is essential to
init MMC0 correctly.
The dependency didn't exist in trats nor universal but exists when pinmux is
used ex: smdk5250 board.
Best regards
Piotr Wilczek
>
> Best Regards,
> Jaehoon Chung
> >
> > /*
> > @@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
> > * GPX3[4] T-flash detect pin
> > */
> > if (!s5p_gpio_get_value(&gpio->x3, 4)) {
> > - /*
> > - * SD card GPIO:
> > - * GPK2[0] SD_2_CLK(2)
> > - * GPK2[1] SD_2_CMD(2)
> > - * GPK2[2] SD_2_CDn -> Not used
> > - * GPK2[3:6] SD_2_DATA[0:3](2)
> > - */
> > - for (i = 0; i < 7; i++) {
> > - if (i == 2)
> > - continue;
> > - /* GPK2[0:6] special function 2 */
> > - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
> > - /* GPK2[0:6] pull disable */
> > - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
> > - /* GPK2[0:6] drv 4x */
> > - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
> > + err = exynos_pinmux_config(PERIPH_ID_SDMMC2,
> PINMUX_FLAG_NONE);
> > + if (err) {
> > + debug("SDMMC2 not configured\n");
> > + return err;
> > }
> > +
> > err = s5p_mmc_init(2, 4);
> > }
> >
> >
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-24 7:40 ` Piotr Wilczek
@ 2012-08-24 8:19 ` Jaehoon Chung
2012-08-24 9:27 ` Piotr Wilczek
0 siblings, 1 reply; 40+ messages in thread
From: Jaehoon Chung @ 2012-08-24 8:19 UTC (permalink / raw)
To: u-boot
Hi Piotr,
>>> - for (i = 0; i < 7; i++) {
>>> - if (i == 2)
>>> - continue;
>>> - /* GPK0[0:6] special function 2 */
>>> - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
>>> - /* GPK0[0:6] pull disable */
>>> - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
>>> - /* GPK0[0:6] drv 4x */
>>> - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
>>> - }
>>> -
>>> - for (i = 3; i < 7; i++) {
>>> - /* GPK1[3:6] special function 3 */
>>> - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
>>> - /* GPK1[3:6] pull disable */
>>> - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
>>> - /* GPK1[3:6] drv 4x */
>>> - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
>>> + err = exynos_pinmux_config(PERIPH_ID_SDMMC0,
>> PINMUX_FLAG_8BIT_MODE);
>>> + if (err) {
>>> + debug("SDMMC0 not configured\n");
>>> + return err;
>>> }
>> if err, return? then how can sd-card init?
>> SD/eMMC card didn't have the dependency.
> exynos_pinmux_config() returns err only if given peripheral and/or mode (or
> cpu) are not supported. Then gpio pins are not configured and MMC cannot be
> initiated. Err is returned to indicate this situation and it is essential to
> init MMC0 correctly.
> The dependency didn't exist in trats nor universal but exists when pinmux is
> used ex: smdk5250 board.
You're Right. it returned error, as you mentioned.
But if eMMC init is failed, could you ensure that sd init is also failed?
I didn't think so.
Although eMMC card init is failed, i think that sd-card init should be succeed.
1) eMMC init failed -> return error. : this is your code.
2) eMMC init failed -> if SD card detect, then try to init SD-card.
: this is my opinion.
If my thinking is wrong, plz let me know.
Best Regards,
Jaehoon Chung
>
> Best regards
> Piotr Wilczek
>
>>
>> Best Regards,
>> Jaehoon Chung
>>>
>>> /*
>>> @@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
>>> * GPX3[4] T-flash detect pin
>>> */
>>> if (!s5p_gpio_get_value(&gpio->x3, 4)) {
>>> - /*
>>> - * SD card GPIO:
>>> - * GPK2[0] SD_2_CLK(2)
>>> - * GPK2[1] SD_2_CMD(2)
>>> - * GPK2[2] SD_2_CDn -> Not used
>>> - * GPK2[3:6] SD_2_DATA[0:3](2)
>>> - */
>>> - for (i = 0; i < 7; i++) {
>>> - if (i == 2)
>>> - continue;
>>> - /* GPK2[0:6] special function 2 */
>>> - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
>>> - /* GPK2[0:6] pull disable */
>>> - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
>>> - /* GPK2[0:6] drv 4x */
>>> - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
>>> + err = exynos_pinmux_config(PERIPH_ID_SDMMC2,
>> PINMUX_FLAG_NONE);
>>> + if (err) {
>>> + debug("SDMMC2 not configured\n");
>>> + return err;
>>> }
>>> +
>>> err = s5p_mmc_init(2, 4);
>>> }
>>>
>>>
>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-24 8:19 ` Jaehoon Chung
@ 2012-08-24 9:27 ` Piotr Wilczek
0 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-24 9:27 UTC (permalink / raw)
To: u-boot
Hi Jaehoon,
> -----Original Message-----
> From: Jaehoon Chung [mailto:jh80.chung at samsung.com]
> Sent: Friday, August 24, 2012 10:20 AM
> To: Piotr Wilczek
> Cc: 'Jaehoon Chung'; u-boot at lists.denx.de; 'Kyungmin Park'
> Subject: Re: [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for
> mmc configuration
>
> Hi Piotr,
>
> >>> - for (i = 0; i < 7; i++) {
> >>> - if (i == 2)
> >>> - continue;
> >>> - /* GPK0[0:6] special function 2 */
> >>> - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
> >>> - /* GPK0[0:6] pull disable */
> >>> - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
> >>> - /* GPK0[0:6] drv 4x */
> >>> - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
> >>> - }
> >>> -
> >>> - for (i = 3; i < 7; i++) {
> >>> - /* GPK1[3:6] special function 3 */
> >>> - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
> >>> - /* GPK1[3:6] pull disable */
> >>> - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
> >>> - /* GPK1[3:6] drv 4x */
> >>> - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
> >>> + err = exynos_pinmux_config(PERIPH_ID_SDMMC0,
> >> PINMUX_FLAG_8BIT_MODE);
> >>> + if (err) {
> >>> + debug("SDMMC0 not configured\n");
> >>> + return err;
> >>> }
> >> if err, return? then how can sd-card init?
> >> SD/eMMC card didn't have the dependency.
> > exynos_pinmux_config() returns err only if given peripheral and/or
> > mode (or
> > cpu) are not supported. Then gpio pins are not configured and MMC
> > cannot be initiated. Err is returned to indicate this situation and
> it
> > is essential to init MMC0 correctly.
> > The dependency didn't exist in trats nor universal but exists when
> > pinmux is used ex: smdk5250 board.
> You're Right. it returned error, as you mentioned.
> But if eMMC init is failed, could you ensure that sd init is also
> failed?
> I didn't think so.
> Although eMMC card init is failed, i think that sd-card init should be
> succeed.
> 1) eMMC init failed -> return error. : this is your code.
> 2) eMMC init failed -> if SD card detect, then try to init SD-card.
> : this is my opinion.
>
> If my thinking is wrong, plz let me know.
I agree and will fix patches so SD card can be initiated even if eMMC init
failed.
Best regards,
Piotr Wilczek
>
> Best Regards,
> Jaehoon Chung
> >
> > Best regards
> > Piotr Wilczek
> >
> >>
> >> Best Regards,
> >> Jaehoon Chung
> >>>
> >>> /*
> >>> @@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
> >>> * GPX3[4] T-flash detect pin
> >>> */
> >>> if (!s5p_gpio_get_value(&gpio->x3, 4)) {
> >>> - /*
> >>> - * SD card GPIO:
> >>> - * GPK2[0] SD_2_CLK(2)
> >>> - * GPK2[1] SD_2_CMD(2)
> >>> - * GPK2[2] SD_2_CDn -> Not used
> >>> - * GPK2[3:6] SD_2_DATA[0:3](2)
> >>> - */
> >>> - for (i = 0; i < 7; i++) {
> >>> - if (i == 2)
> >>> - continue;
> >>> - /* GPK2[0:6] special function 2 */
> >>> - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
> >>> - /* GPK2[0:6] pull disable */
> >>> - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
> >>> - /* GPK2[0:6] drv 4x */
> >>> - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
> >>> + err = exynos_pinmux_config(PERIPH_ID_SDMMC2,
> >> PINMUX_FLAG_NONE);
> >>> + if (err) {
> >>> + debug("SDMMC2 not configured\n");
> >>> + return err;
> >>> }
> >>> +
> >>> err = s5p_mmc_init(2, 4);
> >>> }
> >>>
> >>>
> >
> >
> > _______________________________________________
> > U-Boot mailing list
> > U-Boot at lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> >
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal
2012-08-23 12:01 ` [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
` (5 more replies)
0 siblings, 6 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
This patch fixes SDRAM configuration and size visibility fot Trats board.
Code for MMC initialisation is moved from board file to pinmux.
MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards.
MMC initialisation for boards Trats and Universal C210 is done using pinmux.
Low level initialisation in u-boot is eliminated as it done by
another bootloader.
Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats
arm:exynos4:trats: Fix SDRAM size
arm:exynos4:pinmux: Modify the gpio function for mmc
arm:exynos4:trats: Use pinmux for mmc configuration
arm:exynos4:universal: Use pinmux for mmc configuration
arm:exynos4:universal: Eliminated low level init
arch/arm/cpu/armv7/exynos/pinmux.c | 56 ++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
board/samsung/trats/trats.c | 76 ++----
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 81 ++----
include/configs/s5pc210_universal.h | 2 +
include/configs/trats.h | 17 +-
8 files changed, 112 insertions(+), 517 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
--
1.7.5.4
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-09-19 10:33 ` Jaehoon Chung
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
` (4 subsequent siblings)
5 siblings, 2 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
SDRAM setup alike to ORIGEN Dev board.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
Changes for v3:
- no changes
include/configs/trats.h | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 185cb68..f391227 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -170,12 +170,17 @@
/* Stack sizes */
#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 2/6] arm:exynos4:trats: Fix SDRAM size
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
` (3 subsequent siblings)
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
Full 1GiB is visible
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no chages
Changes for v3:
- no changes
board/samsung/trats/trats.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a8b2b11..f5df56c 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -76,7 +76,9 @@ int board_init(void)
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-09-19 10:21 ` Jaehoon Chung
2012-08-29 7:56 ` [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
` (2 subsequent siblings)
5 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
This patch add pinmux settings for Exynos4 for mmc0 and mmc2
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file
Changes for v3:
- no changes
arch/arm/cpu/armv7/exynos/pinmux.c | 56 +++++++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
2 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index d2b7d2c..84ee05c 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
return 0;
}
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = &gpio2->k0;
+ bank_ext = &gpio2->k1;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = &gpio2->k2;
+ bank_ext = &gpio2->k3;
+ break;
+ }
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ if (flags & PINMUX_FLAG_8BIT_MODE) {
+ for (i = 3; i < 7; i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+
+ return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC2:
+ return exynos4_mmc_config(peripheral, flags);
+ case PERIPH_ID_SDMMC1:
+ case PERIPH_ID_SDMMC3:
+ case PERIPH_ID_SDMMC4:
+ printf("SDMMC device %d not implemented\n", peripheral);
+ return -1;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug("pinmux functionality not supported\n");
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa..4e1da82 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -34,6 +34,7 @@ enum periph_id {
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
PERIPH_ID_SROMC,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
` (2 preceding siblings ...)
2012-08-29 7:56 ` [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-09-19 10:38 ` Jaehoon Chung
2012-08-29 7:56 ` [U-Boot] [PATCH v3 5/6] arm:exynos4:universal: " Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
5 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Trats
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
board/samsung/trats/trats.c | 68 +++++++-----------------------------------
1 files changed, 12 insertions(+), 56 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f5df56c..84b7430 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -29,6 +29,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
@@ -140,54 +141,22 @@ int board_mmc_init(bd_t *bis)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
+ int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(&gpio->k0, 2, 1);
s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
/*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
- }
-
- /*
* MMC device init
* mmc0 : eMMC (8-bit buswidth)
* mmc2 : SD card (4-bit buswidth)
*/
- err = s5p_mmc_init(0, 8);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug("SDMMC0 not configured\n");
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -198,24 +167,11 @@ int board_mmc_init(bd_t *bis)
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 5/6] arm:exynos4:universal: Use pinmux for mmc configuration
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
` (3 preceding siblings ...)
2012-08-29 7:56 ` [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Universal C210
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
board/samsung/universal_c210/universal.c | 73 ++++++-----------------------
1 files changed, 15 insertions(+), 58 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 90fff5c..4ef8eae 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,6 +27,7 @@
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i, err;
+ int err;
switch (get_hwrev()) {
case 0:
@@ -200,75 +201,31 @@ int board_mmc_init(bd_t *bis)
}
/*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
+ * MMC device init
+ * mmc0 : eMMC (8-bit buswidth)
+ * mmc2 : SD card (4-bit buswidth)
*/
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
- }
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
- }
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug("SDMMC0 not configured\n");
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
/*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = s5p_mmc_init(0, 8);
-
- /*
* Check the T-flash detect pin
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 6/6] arm:exynos4:universal: Eliminated low level init
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
` (4 preceding siblings ...)
2012-08-29 7:56 ` [U-Boot] [PATCH v3 5/6] arm:exynos4:universal: " Piotr Wilczek
@ 2012-08-29 7:56 ` Piotr Wilczek
5 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-29 7:56 UTC (permalink / raw)
To: u-boot
Low level initialisation is done by another bootloader
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
Changes for v3:
- no changes
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 8 +
include/configs/s5pc210_universal.h | 2 +
4 files changed, 10 insertions(+), 396 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile
index bfec08f..587cc1b 100644
--- a/board/samsung/universal_c210/Makefile
+++ b/board/samsung/universal_c210/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := universal.o onenand.o
-SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
deleted file mode 100644
index dc7f69e..0000000
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * Lowlevel setup for universal board based on EXYNOS4210
- *
- * Copyright (C) 2010 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clock.h>
-
-/*
- * Register usages:
- *
- * r5 has zero always
- * r7 has GPIO part1 base 0x11400000
- * r6 has GPIO part2 base 0x11000000
- */
-
- .globl lowlevel_init
-lowlevel_init:
- mov r11, lr
-
- /* r5 has always zero */
- mov r5, #0
-
- ldr r7, =EXYNOS4_GPIO_PART1_BASE
- ldr r6, =EXYNOS4_GPIO_PART2_BASE
-
- /* System Timer */
- ldr r0, =EXYNOS4_SYSTIMER_BASE
- ldr r1, =0x5000
- str r1, [r0, #0x0]
- ldr r1, =0xffffffff
- str r1, [r0, #0x8]
- ldr r1, =0x49
- str r1, [r0, #0x4]
-
- /* PMIC manual reset */
- /* nPOWER: XEINT_23: GPX2[7] */
- add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28) @ Output
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- /* init system clock */
- bl system_clock_init
-
- /* Disable Watchdog */
- ldr r0, =EXYNOS4_WATCHDOG_BASE @0x10060000
- str r5, [r0]
-
- /* UART */
- bl uart_asm_init
-
- /* PMU init */
- bl system_power_init
-
- bl tzpc_init
-
- mov lr, r11
- mov pc, lr
- nop
- nop
- nop
-
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
- /*
- * setup UART0-UART4 GPIOs (part1)
- * GPA1CON[3] = I2C_3_SCL (3)
- * GPA1CON[2] = I2C_3_SDA (3)
- */
- mov r0, r7
- ldr r1, =0x22222222
- str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET
- ldr r1, =0x00223322
- str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET
-
- /* UART_SEL GPY4[7] (part2)@EXYNOS4 */
- add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28)
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x8]
- bic r1, r1, #(0x3 << 14) @ 14 = 7 * 2-bit
- orr r1, r1, #(0x3 << 14) @ Pull-up enabled
- str r1, [r0, #0x8]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- mov pc, lr
- nop
- nop
- nop
-
-system_clock_init:
- ldr r0, =EXYNOS4_CLOCK_BASE
-
- /* APLL(1), MPLL(1), CORE(0), HPM(0) */
- ldr r1, =0x0101
- ldr r2, =0x14200 @ CLK_SRC_CPU
- str r1, [r0, r2]
-
- /* wait ?us */
- mov r1, #0x10000
-1: subs r1, r1, #1
- bne 1b
-
- /*
- * CLK_SRC_TOP0
- * MUX_ONENAND_SEL[28] 0: DOUT133, 1: DOUT166
- * MUX_VPLL_SEL[8] 0: FINPLL, 1: FOUTVPLL
- * MUX_EPLL_SEL[4] 0: FINPLL, 1: FOUTEPLL
- */
- ldr r1, =0x10000110
- ldr r2, =0x0C210 @ CLK_SRC_TOP
- str r1, [r0, r2]
-
- /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */
- ldr r1, =0x0066666
- ldr r2, =0x0C240 @ CLK_SRC_FSYS
- str r1, [r0, r2]
- /* UART[0:5], PWM: SCLKMPLL(6) */
- ldr r1, =0x6666666
- ldr r2, =0x0C250 @ CLK_SRC_PERIL0_OFFSET
- str r1, [r0, r2]
-
- /* CPU0: CORE, COREM0, COREM1, PERI, ATB, PCLK_DBG, APLL */
- ldr r1, =0x0133730
- ldr r2, =0x14500 @ CLK_DIV_CPU0
- str r1, [r0, r2]
- /* CPU1: COPY, HPM */
- ldr r1, =0x03
- ldr r2, =0x14504 @ CLK_DIV_CPU1
- str r1, [r0, r2]
- /* DMC0: ACP, ACP_PCLK, DPHY, DMC, DMCD, DMCP, COPY2 CORE_TIMER */
- ldr r1, =0x13111113
- ldr r2, =0x10500 @ CLK_DIV_DMC0
- str r1, [r0, r2]
- /* DMC1: PWI, DVSEM, DPM */
- ldr r1, =0x01010100
- ldr r2, =0x10504 @ CLK_DIV_DMC1
- str r1, [r0, r2]
- /* LEFTBUS: GDL, GPL */
- ldr r1, =0x13
- ldr r2, =0x04500 @ CLK_DIV_LEFTBUS
- str r1, [r0, r2]
- /* RIGHHTBUS: GDR, GPR */
- ldr r1, =0x13
- ldr r2, =0x08500 @ CLK_DIV_RIGHTBUS
- str r1, [r0, r2]
- /*
- * CLK_DIV_TOP
- * ONENAND_RATIOD[18:16]: 0 SCLK_ONENAND = MOUTONENAND / (n + 1)
- * ACLK_200, ACLK_100, ACLK_160, ACLK_133,
- */
- ldr r1, =0x00005473
- ldr r2, =0x0C510 @ CLK_DIV_TOP
- str r1, [r0, r2]
- /* MMC[0:1] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C544 @ CLK_DIV_FSYS1
- str r1, [r0, r2]
- /* MMC[2:3] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C548 @ CLK_DIV_FSYS2
- str r1, [r0, r2]
- /* MMC4 */
- ldr r1, =0x000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C54C @ CLK_DIV_FSYS3
- str r1, [r0, r2]
- /* UART[0:5] */
- ldr r1, =0x774777
- ldr r2, =0x0C550 @ CLK_DIV_PERIL0
- str r1, [r0, r2]
- /* SLIMBUS: ???, PWM */
- ldr r1, =0x8
- ldr r2, =0x0C55C @ CLK_DIV_PERIL3
- str r1, [r0, r2]
-
- /* PLL Setting */
- ldr r1, =0x1C20
- ldr r2, =0x14000 @ APLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x14008 @ MPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C010 @ EPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C020 @ VPLL_LOCK
- str r1, [r0, r2]
-
- /* APLL */
- ldr r1, =0x8000001c
- ldr r2, =0x14104 @ APLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14100 @ APLL_CON0
- str r1, [r0, r2]
- /* MPLL */
- ldr r1, =0x8000001C
- ldr r2, =0x1410C @ MPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14108 @ MPLL_CON0
- str r1, [r0, r2]
- /* EPLL */
- ldr r1, =0x0
- ldr r2, =0x0C114 @ EPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80300302 @ 96MHz
- ldr r2, =0x0C110 @ EPLL_CON0
- str r1, [r0, r2]
- /* VPLL */
- ldr r1, =0x11000400
- ldr r2, =0x0C124 @ VPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80350302 @ 108MHz
- ldr r2, =0x0C120 @ VPLL_CON0
- str r1, [r0, r2]
-
- /*
- * SMMUJPEG[11], JPEG[6], CSIS1[5] : 0111 1001
- * Turn off all
- */
- ldr r1, =0xFFF80000
- ldr r2, =0x0C920 @ CLK_GATE_IP_CAM
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C924 @ CLK_GATE_IP_VP
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFE0
- ldr r2, =0x0C928 @ CLK_GATE_IP_MFC
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C92C @ CLK_GATE_IP_G3D
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFC00
- ldr r2, =0x0C930 @ CLK_GATE_IP_IMAGE
- str r1, [r0, r2]
-
- /* DSIM0[3], MDNIE0[2], MIE0[1] : 0001 */
- ldr r1, =0xFFFFFFF1
- ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C938 @ CLK_GATE_IP_LCD1
- str r1, [r0, r2]
-
- /*
- * SMMUPCIE[18], NFCON[16] : 1111 1010
- * PCIE[14], SATA[10], SDMMC43[9:8] : 1011 1000
- * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2] : 1010 0011
- */
- ldr r1, =0xFFFAB8A3
- ldr r2, =0x0C940 @ CLK_GATE_IP_FSYS
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C94C @ CLK_GATE_IP_GPS
- str r1, [r0, r2]
-
- /*
- * AC97[27], SPDIF[26], SLIMBUS[25] : 1111 0001
- * I2C2[8] : 1111 1110
- */
- ldr r1, =0xF1FFFEFF
- ldr r2, =0x0C950 @ CLK_GATE_IP_PERIL
- str r1, [r0, r2]
-
- /*
- * KEYIF[16] : 1111 1110
- */
- ldr r1, =0xFFFEFFFF
- ldr r2, =0x0C960 @ CLK_GATE_IP_PERIR
- str r1, [r0, r2]
-
- /* LCD1[5], G3D[3], MFC[2], TV[1] : 1101 0001 */
- ldr r1, =0xFFFFFFD1
- ldr r2, =0x0C970 @ CLK_GATE_BLOCK
- str r1, [r0, r2]
- mov pc, lr
- nop
- nop
- nop
-
-system_power_init:
- ldr r0, =EXYNOS4_POWER_BASE @ 0x10020000
-
- ldr r2, =0x330C @ PS_HOLD_CONTROL
- ldr r1, [r0, r2]
- orr r1, r1, #(0x3 << 8) @ Data High, Output En
- str r1, [r0, r2]
-
- /* Power Down */
- add r2, r0, #0x3000
- str r5, [r2, #0xC20] @ TV_CONFIGURATION
- str r5, [r2, #0xC40] @ MFC_CONFIGURATION
- str r5, [r2, #0xC60] @ G3D_CONFIGURATION
- str r5, [r2, #0xCA0] @ LCD1_CONFIGURATION
- str r5, [r2, #0xCE0] @ GPS_CONFIGURATION
-
- mov pc, lr
- nop
- nop
- nop
-
-tzpc_init:
- ldr r0, =0x10110000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10120000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10130000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10140000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10150000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- mov pc, lr
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 4ef8eae..e41c322 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -32,6 +32,7 @@
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
#include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -277,3 +278,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_flags = PHY0_SLEEP,
};
#endif
+
+int board_early_init_f(void)
+{
+ wdt_stop();
+
+ return 0;
+}
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index a332f28..7978317 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -56,6 +56,8 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-08-29 7:56 ` [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
@ 2012-09-19 10:21 ` Jaehoon Chung
0 siblings, 0 replies; 40+ messages in thread
From: Jaehoon Chung @ 2012-09-19 10:21 UTC (permalink / raw)
To: u-boot
Hi Piotr,
On 08/29/2012 04:56 PM, Piotr Wilczek wrote:
> This patch add pinmux settings for Exynos4 for mmc0 and mmc2
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> Changes for v2:
> - mmc initialisation code moved to pinmux instead of creating a new common code file
> Changes for v3:
> - no changes
>
> arch/arm/cpu/armv7/exynos/pinmux.c | 56 +++++++++++++++++++++++++++++
> arch/arm/include/asm/arch-exynos/periph.h | 1 +
> 2 files changed, 57 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
> index d2b7d2c..84ee05c 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
> return 0;
> }
>
> +static int exynos4_mmc_config(int peripheral, int flags)
> +{
> + struct exynos4_gpio_part2 *gpio2 =
> + (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
> + struct s5p_gpio_bank *bank, *bank_ext;
bank, bank_ext is uninitialized.
> + int i;
> +
> + switch (peripheral) {
> + case PERIPH_ID_SDMMC0:
> + bank = &gpio2->k0;
> + bank_ext = &gpio2->k1;
> + break;
> + case PERIPH_ID_SDMMC2:
> + bank = &gpio2->k2;
> + bank_ext = &gpio2->k3;
> + break;
> + }
> + for (i = 0; i < 7; i++) {
> + if (i == 2)
> + continue;
> + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
> + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
> + }
> + if (flags & PINMUX_FLAG_8BIT_MODE) {
> + for (i = 3; i < 7; i++) {
> + s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
> + s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
> + s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int exynos4_pinmux_config(int peripheral, int flags)
> +{
> + switch (peripheral) {
> + case PERIPH_ID_SDMMC0:
> + case PERIPH_ID_SDMMC2:
> + return exynos4_mmc_config(peripheral, flags);
> + case PERIPH_ID_SDMMC1:
> + case PERIPH_ID_SDMMC3:
> + case PERIPH_ID_SDMMC4:
> + printf("SDMMC device %d not implemented\n", peripheral);
> + return -1;
> + default:
> + debug("%s: invalid peripheral %d", __func__, peripheral);
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> int exynos_pinmux_config(int peripheral, int flags)
> {
> if (cpu_is_exynos5())
> return exynos5_pinmux_config(peripheral, flags);
> + else if (cpu_is_exynos4())
> + return exynos4_pinmux_config(peripheral, flags);
> else {
> debug("pinmux functionality not supported\n");
> return -1;
> diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
> index 5db25aa..4e1da82 100644
> --- a/arch/arm/include/asm/arch-exynos/periph.h
> +++ b/arch/arm/include/asm/arch-exynos/periph.h
> @@ -34,6 +34,7 @@ enum periph_id {
> PERIPH_ID_SDMMC1,
> PERIPH_ID_SDMMC2,
> PERIPH_ID_SDMMC3,
> + PERIPH_ID_SDMMC4,
> PERIPH_ID_SROMC,
> PERIPH_ID_UART0,
> PERIPH_ID_UART1,
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-09-19 10:33 ` Jaehoon Chung
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
1 sibling, 0 replies; 40+ messages in thread
From: Jaehoon Chung @ 2012-09-19 10:33 UTC (permalink / raw)
To: u-boot
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
On 08/29/2012 04:56 PM, Piotr Wilczek wrote:
> SDRAM setup alike to ORIGEN Dev board.
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> Changes for v2:
> - no changes
> Changes for v3:
> - no changes
>
> include/configs/trats.h | 17 +++++++++++------
> 1 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/include/configs/trats.h b/include/configs/trats.h
> index 185cb68..f391227 100644
> --- a/include/configs/trats.h
> +++ b/include/configs/trats.h
> @@ -170,12 +170,17 @@
> /* Stack sizes */
> #define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */
>
> -/* TRATS has 2 banks of DRAM */
> -#define CONFIG_NR_DRAM_BANKS 2
> -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
> -#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */
> -#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
> -#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */
> +/* TRATS has 4 banks of DRAM */
> +#define CONFIG_NR_DRAM_BANKS 4
> +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
> +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
> +#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
> +#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
> +#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
> +#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
> +#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
> +#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
> +#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
>
> #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
>
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration
2012-08-29 7:56 ` [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
@ 2012-09-19 10:38 ` Jaehoon Chung
0 siblings, 0 replies; 40+ messages in thread
From: Jaehoon Chung @ 2012-09-19 10:38 UTC (permalink / raw)
To: u-boot
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
On 08/29/2012 04:56 PM, Piotr Wilczek wrote:
> This patch use the pinmux for mmc configuration for Trats
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> Changes for v2:
> - mmc initialisation using pinmux
> Changes for v3:
> - init SD card also when eMMC init failed
>
> board/samsung/trats/trats.c | 68 +++++++-----------------------------------
> 1 files changed, 12 insertions(+), 56 deletions(-)
>
> diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
> index f5df56c..84b7430 100644
> --- a/board/samsung/trats/trats.c
> +++ b/board/samsung/trats/trats.c
> @@ -29,6 +29,7 @@
> #include <asm/arch/cpu.h>
> #include <asm/arch/gpio.h>
> #include <asm/arch/mmc.h>
> +#include <asm/arch/pinmux.h>
> #include <asm/arch/clock.h>
> #include <asm/arch/clk.h>
> #include <asm/arch/mipi_dsim.h>
> @@ -140,54 +141,22 @@ int board_mmc_init(bd_t *bis)
> {
> struct exynos4_gpio_part2 *gpio =
> (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
> - int i, err;
> + int err;
>
> /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
> s5p_gpio_direction_output(&gpio->k0, 2, 1);
> s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
>
> /*
> - * eMMC GPIO:
> - * SDR 8-bit at 48MHz at MMC0
> - * GPK0[0] SD_0_CLK(2)
> - * GPK0[1] SD_0_CMD(2)
> - * GPK0[2] SD_0_CDn -> Not used
> - * GPK0[3:6] SD_0_DATA[0:3](2)
> - * GPK1[3:6] SD_0_DATA[0:3](3)
> - *
> - * DDR 4-bit at 26MHz at MMC4
> - * GPK0[0] SD_4_CLK(3)
> - * GPK0[1] SD_4_CMD(3)
> - * GPK0[2] SD_4_CDn -> Not used
> - * GPK0[3:6] SD_4_DATA[0:3](3)
> - * GPK1[3:6] SD_4_DATA[4:7](4)
> - */
> - for (i = 0; i < 7; i++) {
> - if (i == 2)
> - continue;
> - /* GPK0[0:6] special function 2 */
> - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
> - /* GPK0[0:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
> - /* GPK0[0:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
> - }
> -
> - for (i = 3; i < 7; i++) {
> - /* GPK1[3:6] special function 3 */
> - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
> - /* GPK1[3:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
> - /* GPK1[3:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
> - }
> -
> - /*
> * MMC device init
> * mmc0 : eMMC (8-bit buswidth)
> * mmc2 : SD card (4-bit buswidth)
> */
> - err = s5p_mmc_init(0, 8);
> + err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
> + if (err)
> + debug("SDMMC0 not configured\n");
> + else
> + err = s5p_mmc_init(0, 8);
>
> /* T-flash detect */
> s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
> @@ -198,24 +167,11 @@ int board_mmc_init(bd_t *bis)
> * GPX3[4] T-flash detect pin
> */
> if (!s5p_gpio_get_value(&gpio->x3, 4)) {
> - /*
> - * SD card GPIO:
> - * GPK2[0] SD_2_CLK(2)
> - * GPK2[1] SD_2_CMD(2)
> - * GPK2[2] SD_2_CDn -> Not used
> - * GPK2[3:6] SD_2_DATA[0:3](2)
> - */
> - for (i = 0; i < 7; i++) {
> - if (i == 2)
> - continue;
> - /* GPK2[0:6] special function 2 */
> - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
> - /* GPK2[0:6] pull disable */
> - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
> - /* GPK2[0:6] drv 4x */
> - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
> - }
> - err = s5p_mmc_init(2, 4);
> + err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
> + if (err)
> + debug("SDMMC2 not configured\n");
> + else
> + err = s5p_mmc_init(2, 4);
> }
>
> return err;
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-09-19 10:33 ` Jaehoon Chung
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
` (6 more replies)
1 sibling, 7 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
This patch fixes SDRAM configuration and size visibility fot Trats board.
Code for MMC initialisation is moved from board file to pinmux.
MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards.
MMC initialisation for boards Trats and Universal C210 is done using pinmux.
Low level initialisation in u-boot is eliminated as it is done by
another bootloader.
Changes for v2:
- mmc initialisation using pinmux
- mmc initialisation code moved to pinmux instead of creating a new common code file
Changes for v3:
- init SD card also when eMMC init failed
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext
Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats
arm:exynos4:trats: Fix SDRAM size
arm:exynos4:pinmux: Modify the gpio function for mmc
arm:exynos4:trats: Use pinmux for mmc configuration
arm:exynos4:universal: Use pinmux for mmc configuration
arm:exynos4:universal: Eliminated low level init
arch/arm/cpu/armv7/exynos/pinmux.c | 58 ++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
board/samsung/trats/trats.c | 76 ++----
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 82 ++----
include/configs/s5pc210_universal.h | 2 +
include/configs/trats.h | 17 +-
8 files changed, 114 insertions(+), 518 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
--
1.7.5.4
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
` (5 subsequent siblings)
6 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
SDRAM setup alike to ORIGEN Dev board.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes
---
include/configs/trats.h | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index b3b5a3d..151019c 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -190,12 +190,17 @@
#define CONFIG_SYS_HZ 1000
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 2/6] arm:exynos4:trats: Fix SDRAM size
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
` (4 subsequent siblings)
6 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
Full 1GiB is visible
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes
---
board/samsung/trats/trats.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index e11a892..7b981fa 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -93,7 +93,9 @@ void i2c_init_board(void)
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
@@ -104,6 +106,10 @@ void dram_init_banksize(void)
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-21 1:27 ` Jaehoon Chung
2012-09-20 10:19 ` [U-Boot] [PATCH v4 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
` (3 subsequent siblings)
6 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
This patch add pinmux settings for Exynos4 for mmc0 and mmc2
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file
Changes for v3:
- no changes
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext
---
arch/arm/cpu/armv7/exynos/pinmux.c | 58 +++++++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/periph.h | 1 +
2 files changed, 59 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..5796d56 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
return 0;
}
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = &gpio2->k0;
+ bank_ext = &gpio2->k1;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = &gpio2->k2;
+ bank_ext = &gpio2->k3;
+ break;
+ default:
+ return -1;
+ }
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ if (flags & PINMUX_FLAG_8BIT_MODE) {
+ for (i = 3; i < 7; i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+
+ return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC2:
+ return exynos4_mmc_config(peripheral, flags);
+ case PERIPH_ID_SDMMC1:
+ case PERIPH_ID_SDMMC3:
+ case PERIPH_ID_SDMMC4:
+ printf("SDMMC device %d not implemented\n", peripheral);
+ return -1;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug("pinmux functionality not supported\n");
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index b861d7d..082611c 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -42,6 +42,7 @@ enum periph_id {
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
PERIPH_ID_SROMC,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 4/6] arm:exynos4:trats: Use pinmux for mmc configuration
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
` (2 preceding siblings ...)
2012-09-20 10:19 ` [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 5/6] arm:exynos4:universal: " Piotr Wilczek
` (2 subsequent siblings)
6 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Trats
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
---
Changes for v2:
- mmc iniatialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
Changes for v4:
- no changes
---
board/samsung/trats/trats.c | 68 +++++++-----------------------------------
1 files changed, 12 insertions(+), 56 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 7b981fa..57400ce 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -29,6 +29,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
@@ -157,54 +158,22 @@ int board_mmc_init(bd_t *bis)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
+ int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(&gpio->k0, 2, 1);
s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
/*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
- }
-
- /*
* MMC device init
* mmc0 : eMMC (8-bit buswidth)
* mmc2 : SD card (4-bit buswidth)
*/
- err = s5p_mmc_init(0, 8);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug("SDMMC0 not configured\n");
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -215,24 +184,11 @@ int board_mmc_init(bd_t *bis)
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 5/6] arm:exynos4:universal: Use pinmux for mmc configuration
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
` (3 preceding siblings ...)
2012-09-20 10:19 ` [U-Boot] [PATCH v4 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
@ 2012-09-20 10:19 ` Piotr Wilczek
2012-09-20 10:20 ` [U-Boot] [PATCH v4 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
2012-09-28 8:40 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Minkyu Kang
6 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:19 UTC (permalink / raw)
To: u-boot
This patch use the pinmux for mmc configuration for Universal C210
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
Changes for v4;
- no changes
---
board/samsung/universal_c210/universal.c | 74 ++++++------------------------
1 files changed, 15 insertions(+), 59 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 90fff5c..7a4941c 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,6 +27,7 @@
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
#include <pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i, err;
+ int err;
switch (get_hwrev()) {
case 0:
@@ -200,75 +201,30 @@ int board_mmc_init(bd_t *bis)
}
/*
- * eMMC GPIO:
- * SDR 8-bit at 48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit at 26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
+ * MMC device init
+ * mmc0 : eMMC (8-bit buswidth)
+ * mmc2 : SD card (4-bit buswidth)
*/
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i < 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
- }
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug("SDMMC0 not configured\n");
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
/*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = s5p_mmc_init(0, 8);
-
- /*
* Check the T-flash detect pin
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- /*
- * SD card GPIO:
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn -> Not used
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 6/6] arm:exynos4:universal: Eliminated low level init
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
` (4 preceding siblings ...)
2012-09-20 10:19 ` [U-Boot] [PATCH v4 5/6] arm:exynos4:universal: " Piotr Wilczek
@ 2012-09-20 10:20 ` Piotr Wilczek
2012-09-28 8:40 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Minkyu Kang
6 siblings, 0 replies; 40+ messages in thread
From: Piotr Wilczek @ 2012-09-20 10:20 UTC (permalink / raw)
To: u-boot
Low level initialisation is done by another bootloader
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes
---
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
board/samsung/universal_c210/universal.c | 8 +
include/configs/s5pc210_universal.h | 2 +
4 files changed, 10 insertions(+), 396 deletions(-)
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile
index bfec08f..587cc1b 100644
--- a/board/samsung/universal_c210/Makefile
+++ b/board/samsung/universal_c210/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := universal.o onenand.o
-SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
deleted file mode 100644
index dc7f69e..0000000
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * Lowlevel setup for universal board based on EXYNOS4210
- *
- * Copyright (C) 2010 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clock.h>
-
-/*
- * Register usages:
- *
- * r5 has zero always
- * r7 has GPIO part1 base 0x11400000
- * r6 has GPIO part2 base 0x11000000
- */
-
- .globl lowlevel_init
-lowlevel_init:
- mov r11, lr
-
- /* r5 has always zero */
- mov r5, #0
-
- ldr r7, =EXYNOS4_GPIO_PART1_BASE
- ldr r6, =EXYNOS4_GPIO_PART2_BASE
-
- /* System Timer */
- ldr r0, =EXYNOS4_SYSTIMER_BASE
- ldr r1, =0x5000
- str r1, [r0, #0x0]
- ldr r1, =0xffffffff
- str r1, [r0, #0x8]
- ldr r1, =0x49
- str r1, [r0, #0x4]
-
- /* PMIC manual reset */
- /* nPOWER: XEINT_23: GPX2[7] */
- add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28) @ Output
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- /* init system clock */
- bl system_clock_init
-
- /* Disable Watchdog */
- ldr r0, =EXYNOS4_WATCHDOG_BASE @0x10060000
- str r5, [r0]
-
- /* UART */
- bl uart_asm_init
-
- /* PMU init */
- bl system_power_init
-
- bl tzpc_init
-
- mov lr, r11
- mov pc, lr
- nop
- nop
- nop
-
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
- /*
- * setup UART0-UART4 GPIOs (part1)
- * GPA1CON[3] = I2C_3_SCL (3)
- * GPA1CON[2] = I2C_3_SDA (3)
- */
- mov r0, r7
- ldr r1, =0x22222222
- str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET
- ldr r1, =0x00223322
- str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET
-
- /* UART_SEL GPY4[7] (part2)@EXYNOS4 */
- add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET
- ldr r1, [r0, #0x0]
- bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit
- orr r1, r1, #(0x1 << 28)
- str r1, [r0, #0x0]
-
- ldr r1, [r0, #0x8]
- bic r1, r1, #(0x3 << 14) @ 14 = 7 * 2-bit
- orr r1, r1, #(0x3 << 14) @ Pull-up enabled
- str r1, [r0, #0x8]
-
- ldr r1, [r0, #0x4]
- orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit
- str r1, [r0, #0x4]
-
- mov pc, lr
- nop
- nop
- nop
-
-system_clock_init:
- ldr r0, =EXYNOS4_CLOCK_BASE
-
- /* APLL(1), MPLL(1), CORE(0), HPM(0) */
- ldr r1, =0x0101
- ldr r2, =0x14200 @ CLK_SRC_CPU
- str r1, [r0, r2]
-
- /* wait ?us */
- mov r1, #0x10000
-1: subs r1, r1, #1
- bne 1b
-
- /*
- * CLK_SRC_TOP0
- * MUX_ONENAND_SEL[28] 0: DOUT133, 1: DOUT166
- * MUX_VPLL_SEL[8] 0: FINPLL, 1: FOUTVPLL
- * MUX_EPLL_SEL[4] 0: FINPLL, 1: FOUTEPLL
- */
- ldr r1, =0x10000110
- ldr r2, =0x0C210 @ CLK_SRC_TOP
- str r1, [r0, r2]
-
- /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */
- ldr r1, =0x0066666
- ldr r2, =0x0C240 @ CLK_SRC_FSYS
- str r1, [r0, r2]
- /* UART[0:5], PWM: SCLKMPLL(6) */
- ldr r1, =0x6666666
- ldr r2, =0x0C250 @ CLK_SRC_PERIL0_OFFSET
- str r1, [r0, r2]
-
- /* CPU0: CORE, COREM0, COREM1, PERI, ATB, PCLK_DBG, APLL */
- ldr r1, =0x0133730
- ldr r2, =0x14500 @ CLK_DIV_CPU0
- str r1, [r0, r2]
- /* CPU1: COPY, HPM */
- ldr r1, =0x03
- ldr r2, =0x14504 @ CLK_DIV_CPU1
- str r1, [r0, r2]
- /* DMC0: ACP, ACP_PCLK, DPHY, DMC, DMCD, DMCP, COPY2 CORE_TIMER */
- ldr r1, =0x13111113
- ldr r2, =0x10500 @ CLK_DIV_DMC0
- str r1, [r0, r2]
- /* DMC1: PWI, DVSEM, DPM */
- ldr r1, =0x01010100
- ldr r2, =0x10504 @ CLK_DIV_DMC1
- str r1, [r0, r2]
- /* LEFTBUS: GDL, GPL */
- ldr r1, =0x13
- ldr r2, =0x04500 @ CLK_DIV_LEFTBUS
- str r1, [r0, r2]
- /* RIGHHTBUS: GDR, GPR */
- ldr r1, =0x13
- ldr r2, =0x08500 @ CLK_DIV_RIGHTBUS
- str r1, [r0, r2]
- /*
- * CLK_DIV_TOP
- * ONENAND_RATIOD[18:16]: 0 SCLK_ONENAND = MOUTONENAND / (n + 1)
- * ACLK_200, ACLK_100, ACLK_160, ACLK_133,
- */
- ldr r1, =0x00005473
- ldr r2, =0x0C510 @ CLK_DIV_TOP
- str r1, [r0, r2]
- /* MMC[0:1] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C544 @ CLK_DIV_FSYS1
- str r1, [r0, r2]
- /* MMC[2:3] */
- ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C548 @ CLK_DIV_FSYS2
- str r1, [r0, r2]
- /* MMC4 */
- ldr r1, =0x000f /* 800(MPLL) / (15 + 1) */
- ldr r2, =0x0C54C @ CLK_DIV_FSYS3
- str r1, [r0, r2]
- /* UART[0:5] */
- ldr r1, =0x774777
- ldr r2, =0x0C550 @ CLK_DIV_PERIL0
- str r1, [r0, r2]
- /* SLIMBUS: ???, PWM */
- ldr r1, =0x8
- ldr r2, =0x0C55C @ CLK_DIV_PERIL3
- str r1, [r0, r2]
-
- /* PLL Setting */
- ldr r1, =0x1C20
- ldr r2, =0x14000 @ APLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x14008 @ MPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C010 @ EPLL_LOCK
- str r1, [r0, r2]
- ldr r2, =0x0C020 @ VPLL_LOCK
- str r1, [r0, r2]
-
- /* APLL */
- ldr r1, =0x8000001c
- ldr r2, =0x14104 @ APLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14100 @ APLL_CON0
- str r1, [r0, r2]
- /* MPLL */
- ldr r1, =0x8000001C
- ldr r2, =0x1410C @ MPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80c80601 @ 800MHz
- ldr r2, =0x14108 @ MPLL_CON0
- str r1, [r0, r2]
- /* EPLL */
- ldr r1, =0x0
- ldr r2, =0x0C114 @ EPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80300302 @ 96MHz
- ldr r2, =0x0C110 @ EPLL_CON0
- str r1, [r0, r2]
- /* VPLL */
- ldr r1, =0x11000400
- ldr r2, =0x0C124 @ VPLL_CON1
- str r1, [r0, r2]
- ldr r1, =0x80350302 @ 108MHz
- ldr r2, =0x0C120 @ VPLL_CON0
- str r1, [r0, r2]
-
- /*
- * SMMUJPEG[11], JPEG[6], CSIS1[5] : 0111 1001
- * Turn off all
- */
- ldr r1, =0xFFF80000
- ldr r2, =0x0C920 @ CLK_GATE_IP_CAM
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C924 @ CLK_GATE_IP_VP
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFE0
- ldr r2, =0x0C928 @ CLK_GATE_IP_MFC
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C92C @ CLK_GATE_IP_G3D
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFC00
- ldr r2, =0x0C930 @ CLK_GATE_IP_IMAGE
- str r1, [r0, r2]
-
- /* DSIM0[3], MDNIE0[2], MIE0[1] : 0001 */
- ldr r1, =0xFFFFFFF1
- ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFC0
- ldr r2, =0x0C938 @ CLK_GATE_IP_LCD1
- str r1, [r0, r2]
-
- /*
- * SMMUPCIE[18], NFCON[16] : 1111 1010
- * PCIE[14], SATA[10], SDMMC43[9:8] : 1011 1000
- * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2] : 1010 0011
- */
- ldr r1, =0xFFFAB8A3
- ldr r2, =0x0C940 @ CLK_GATE_IP_FSYS
- str r1, [r0, r2]
-
- /* Turn off all */
- ldr r1, =0xFFFFFFFC
- ldr r2, =0x0C94C @ CLK_GATE_IP_GPS
- str r1, [r0, r2]
-
- /*
- * AC97[27], SPDIF[26], SLIMBUS[25] : 1111 0001
- * I2C2[8] : 1111 1110
- */
- ldr r1, =0xF1FFFEFF
- ldr r2, =0x0C950 @ CLK_GATE_IP_PERIL
- str r1, [r0, r2]
-
- /*
- * KEYIF[16] : 1111 1110
- */
- ldr r1, =0xFFFEFFFF
- ldr r2, =0x0C960 @ CLK_GATE_IP_PERIR
- str r1, [r0, r2]
-
- /* LCD1[5], G3D[3], MFC[2], TV[1] : 1101 0001 */
- ldr r1, =0xFFFFFFD1
- ldr r2, =0x0C970 @ CLK_GATE_BLOCK
- str r1, [r0, r2]
- mov pc, lr
- nop
- nop
- nop
-
-system_power_init:
- ldr r0, =EXYNOS4_POWER_BASE @ 0x10020000
-
- ldr r2, =0x330C @ PS_HOLD_CONTROL
- ldr r1, [r0, r2]
- orr r1, r1, #(0x3 << 8) @ Data High, Output En
- str r1, [r0, r2]
-
- /* Power Down */
- add r2, r0, #0x3000
- str r5, [r2, #0xC20] @ TV_CONFIGURATION
- str r5, [r2, #0xC40] @ MFC_CONFIGURATION
- str r5, [r2, #0xC60] @ G3D_CONFIGURATION
- str r5, [r2, #0xCA0] @ LCD1_CONFIGURATION
- str r5, [r2, #0xCE0] @ GPS_CONFIGURATION
-
- mov pc, lr
- nop
- nop
- nop
-
-tzpc_init:
- ldr r0, =0x10110000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10120000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10130000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10140000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x10150000
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- mov pc, lr
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 7a4941c..ded97ca 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -32,6 +32,7 @@
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
#include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -276,3 +277,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_flags = PHY0_SLEEP,
};
#endif
+
+int board_early_init_f(void)
+{
+ wdt_stop();
+
+ return 0;
+}
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 7727624..46f2663 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -56,6 +56,8 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
--
1.7.5.4
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-09-20 10:19 ` [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
@ 2012-09-21 1:27 ` Jaehoon Chung
2012-09-21 7:02 ` Jaehoon Chung
0 siblings, 1 reply; 40+ messages in thread
From: Jaehoon Chung @ 2012-09-21 1:27 UTC (permalink / raw)
To: u-boot
Hi Piotr,
I commented at the previously patch. But I didn't find the any modification.
pinmux.c: In function 'exynos_pinmux_config':
pinmux.c:296:20: warning: 'bank_ext' may be used uninitialized in this function [-Wuninitialized]
pinmux.c:272:31: note: 'bank_ext' was declared here
pinmux.c:290:19: warning: 'bank' may be used uninitialized in this function [-Wuninitialized]
pinmux.c:272:24: note: 'bank' was declared here
Could you remove the warning message?
Best Regards,
Jaehoon Chung
On 09/20/2012 07:19 PM, Piotr Wilczek wrote:
> This patch add pinmux settings for Exynos4 for mmc0 and mmc2
>
> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> CC: Minkyu Kang <mk7.kang@samsung.com>
> ---
> Changes for v2:
> - mmc initialisation code moved to pinmux instead of creating a new common code file
> Changes for v3:
> - no changes
> Changes for v4:
> - eliminated warning for uninitialized bank, bank_ext
> ---
> arch/arm/cpu/armv7/exynos/pinmux.c | 58 +++++++++++++++++++++++++++++
> arch/arm/include/asm/arch-exynos/periph.h | 1 +
> 2 files changed, 59 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 7776add..5796d56 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
> return 0;
> }
>
> +static int exynos4_mmc_config(int peripheral, int flags)
> +{
> + struct exynos4_gpio_part2 *gpio2 =
> + (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
> + struct s5p_gpio_bank *bank, *bank_ext;
> + int i;
> +
> + switch (peripheral) {
> + case PERIPH_ID_SDMMC0:
> + bank = &gpio2->k0;
> + bank_ext = &gpio2->k1;
> + break;
> + case PERIPH_ID_SDMMC2:
> + bank = &gpio2->k2;
> + bank_ext = &gpio2->k3;
> + break;
> + default:
> + return -1;
> + }
> + for (i = 0; i < 7; i++) {
> + if (i == 2)
> + continue;
> + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
> + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
> + }
> + if (flags & PINMUX_FLAG_8BIT_MODE) {
> + for (i = 3; i < 7; i++) {
> + s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
> + s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
> + s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int exynos4_pinmux_config(int peripheral, int flags)
> +{
> + switch (peripheral) {
> + case PERIPH_ID_SDMMC0:
> + case PERIPH_ID_SDMMC2:
> + return exynos4_mmc_config(peripheral, flags);
> + case PERIPH_ID_SDMMC1:
> + case PERIPH_ID_SDMMC3:
> + case PERIPH_ID_SDMMC4:
> + printf("SDMMC device %d not implemented\n", peripheral);
> + return -1;
> + default:
> + debug("%s: invalid peripheral %d", __func__, peripheral);
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> int exynos_pinmux_config(int peripheral, int flags)
> {
> if (cpu_is_exynos5())
> return exynos5_pinmux_config(peripheral, flags);
> + else if (cpu_is_exynos4())
> + return exynos4_pinmux_config(peripheral, flags);
> else {
> debug("pinmux functionality not supported\n");
> return -1;
> diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
> index b861d7d..082611c 100644
> --- a/arch/arm/include/asm/arch-exynos/periph.h
> +++ b/arch/arm/include/asm/arch-exynos/periph.h
> @@ -42,6 +42,7 @@ enum periph_id {
> PERIPH_ID_SDMMC1,
> PERIPH_ID_SDMMC2,
> PERIPH_ID_SDMMC3,
> + PERIPH_ID_SDMMC4,
> PERIPH_ID_SROMC,
> PERIPH_ID_UART0,
> PERIPH_ID_UART1,
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
2012-09-21 1:27 ` Jaehoon Chung
@ 2012-09-21 7:02 ` Jaehoon Chung
0 siblings, 0 replies; 40+ messages in thread
From: Jaehoon Chung @ 2012-09-21 7:02 UTC (permalink / raw)
To: u-boot
Hi Piotr,
Sorry, it removed the warning message.
this patch looks good to me.
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Best Regards,
Jaehoon Chung
On 09/21/2012 10:27 AM, Jaehoon Chung wrote:
> Hi Piotr,
>
> I commented at the previously patch. But I didn't find the any modification.
>
> pinmux.c: In function 'exynos_pinmux_config':
> pinmux.c:296:20: warning: 'bank_ext' may be used uninitialized in this function [-Wuninitialized]
> pinmux.c:272:31: note: 'bank_ext' was declared here
> pinmux.c:290:19: warning: 'bank' may be used uninitialized in this function [-Wuninitialized]
> pinmux.c:272:24: note: 'bank' was declared here
>
> Could you remove the warning message?
>
> Best Regards,
> Jaehoon Chung
>
> On 09/20/2012 07:19 PM, Piotr Wilczek wrote:
>> This patch add pinmux settings for Exynos4 for mmc0 and mmc2
>>
>> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> CC: Minkyu Kang <mk7.kang@samsung.com>
>> ---
>> Changes for v2:
>> - mmc initialisation code moved to pinmux instead of creating a new common code file
>> Changes for v3:
>> - no changes
>> Changes for v4:
>> - eliminated warning for uninitialized bank, bank_ext
>> ---
>> arch/arm/cpu/armv7/exynos/pinmux.c | 58 +++++++++++++++++++++++++++++
>> arch/arm/include/asm/arch-exynos/periph.h | 1 +
>> 2 files changed, 59 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
>> index 7776add..5796d56 100644
>> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
>> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
>> @@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
>> return 0;
>> }
>>
>> +static int exynos4_mmc_config(int peripheral, int flags)
>> +{
>> + struct exynos4_gpio_part2 *gpio2 =
>> + (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
>> + struct s5p_gpio_bank *bank, *bank_ext;
>> + int i;
>> +
>> + switch (peripheral) {
>> + case PERIPH_ID_SDMMC0:
>> + bank = &gpio2->k0;
>> + bank_ext = &gpio2->k1;
>> + break;
>> + case PERIPH_ID_SDMMC2:
>> + bank = &gpio2->k2;
>> + bank_ext = &gpio2->k3;
>> + break;
>> + default:
>> + return -1;
>> + }
>> + for (i = 0; i < 7; i++) {
>> + if (i == 2)
>> + continue;
>> + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>> + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
>> + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
>> + }
>> + if (flags & PINMUX_FLAG_8BIT_MODE) {
>> + for (i = 3; i < 7; i++) {
>> + s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
>> + s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
>> + s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
>> + }
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int exynos4_pinmux_config(int peripheral, int flags)
>> +{
>> + switch (peripheral) {
>> + case PERIPH_ID_SDMMC0:
>> + case PERIPH_ID_SDMMC2:
>> + return exynos4_mmc_config(peripheral, flags);
>> + case PERIPH_ID_SDMMC1:
>> + case PERIPH_ID_SDMMC3:
>> + case PERIPH_ID_SDMMC4:
>> + printf("SDMMC device %d not implemented\n", peripheral);
>> + return -1;
>> + default:
>> + debug("%s: invalid peripheral %d", __func__, peripheral);
>> + return -1;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> int exynos_pinmux_config(int peripheral, int flags)
>> {
>> if (cpu_is_exynos5())
>> return exynos5_pinmux_config(peripheral, flags);
>> + else if (cpu_is_exynos4())
>> + return exynos4_pinmux_config(peripheral, flags);
>> else {
>> debug("pinmux functionality not supported\n");
>> return -1;
>> diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
>> index b861d7d..082611c 100644
>> --- a/arch/arm/include/asm/arch-exynos/periph.h
>> +++ b/arch/arm/include/asm/arch-exynos/periph.h
>> @@ -42,6 +42,7 @@ enum periph_id {
>> PERIPH_ID_SDMMC1,
>> PERIPH_ID_SDMMC2,
>> PERIPH_ID_SDMMC3,
>> + PERIPH_ID_SDMMC4,
>> PERIPH_ID_SROMC,
>> PERIPH_ID_UART0,
>> PERIPH_ID_UART1,
>>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
` (5 preceding siblings ...)
2012-09-20 10:20 ` [U-Boot] [PATCH v4 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
@ 2012-09-28 8:40 ` Minkyu Kang
6 siblings, 0 replies; 40+ messages in thread
From: Minkyu Kang @ 2012-09-28 8:40 UTC (permalink / raw)
To: u-boot
Dear Piotr Wilczek,
On 20 September 2012 19:19, Piotr Wilczek <p.wilczek@samsung.com> wrote:
> This patch fixes SDRAM configuration and size visibility fot Trats board.
>
> Code for MMC initialisation is moved from board file to pinmux.
> MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards.
> MMC initialisation for boards Trats and Universal C210 is done using pinmux.
>
> Low level initialisation in u-boot is eliminated as it is done by
> another bootloader.
>
> Changes for v2:
> - mmc initialisation using pinmux
> - mmc initialisation code moved to pinmux instead of creating a new common code file
> Changes for v3:
> - init SD card also when eMMC init failed
> Changes for v4:
> - eliminated warning for uninitialized bank, bank_ext
>
> Piotr Wilczek (6):
> arm:exynos4:trats: Correct SDRAM configuration for trats
> arm:exynos4:trats: Fix SDRAM size
> arm:exynos4:pinmux: Modify the gpio function for mmc
> arm:exynos4:trats: Use pinmux for mmc configuration
> arm:exynos4:universal: Use pinmux for mmc configuration
> arm:exynos4:universal: Eliminated low level init
>
> arch/arm/cpu/armv7/exynos/pinmux.c | 58 ++++
> arch/arm/include/asm/arch-exynos/periph.h | 1 +
> board/samsung/trats/trats.c | 76 ++----
> board/samsung/universal_c210/Makefile | 1 -
> board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------
> board/samsung/universal_c210/universal.c | 82 ++----
> include/configs/s5pc210_universal.h | 2 +
> include/configs/trats.h | 17 +-
> 8 files changed, 114 insertions(+), 518 deletions(-)
> delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
>
applied to u-boot-samsung.
Thanks.
Minkyu Kang.
--
from. prom.
www.promsoft.net
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards
2012-08-09 12:02 ` [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
@ 2012-08-10 2:30 ` Minkyu Kang
0 siblings, 0 replies; 40+ messages in thread
From: Minkyu Kang @ 2012-08-10 2:30 UTC (permalink / raw)
To: u-boot
Dear Piotr Wilczek,
On 9 August 2012 21:02, Piotr Wilczek <p.wilczek@samsung.com> wrote:
> Dear Mr Kang,
>
> I would like to ask about patches I sent last week. If there is anything I
> should improve, please let me know.
>
I couldn't find your patch on mailing list and patchwork.
Please check it.
Thanks.
Minkyu Kang.
--
from. prom.
www.promsoft.net
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards
[not found] <1343913278-16135-1-git-send-email-p.wilczek@samsung.com>
@ 2012-08-09 12:02 ` Piotr Wilczek
2012-08-10 2:30 ` Minkyu Kang
0 siblings, 1 reply; 40+ messages in thread
From: Piotr Wilczek @ 2012-08-09 12:02 UTC (permalink / raw)
To: u-boot
Dear Mr Kang,
I would like to ask about patches I sent last week. If there is anything I
should improve, please let me know.
Kind regards,
Piotr
-----Original Message-----
From: Piotr Wilczek [mailto:p.wilczek at samsung.com]
Sent: Thursday, August 02, 2012 3:15 PM
To: u-boot at lists.denx.de
Cc: Kyungmin Park; Lukasz Majewski; Piotr Wilczek
Subject: [PATCH 0/4] arm:samsung: Cleanup code for trats and universal
boards
This patch fixes SDRAM configuration and size visibility for trats board.
Common code is set for trats and universal boards.
Low level initialisation in U-boot is eliminated for universal_c210 board.
Piotr Wilczek (4):
arm:exynos4:trats: Correct SDRAM configuration for trats
arm:exynos4:trats: Fix SDRAM size
arm:exynos4:trats&universal_c210: Set common code for trats and
universal_c210 boards
arm:exynos4:universal_c210: Eliminate low level initialisation
board/samsung/exynos4_common/exynos4_common.c | 139 +++++++++
board/samsung/trats/trats.c | 98 +------
board/samsung/universal_c210/Makefile | 1 -
board/samsung/universal_c210/lowlevel_init.S | 395
-------------------------
board/samsung/universal_c210/universal.c | 105 +------
include/configs/s5pc210_universal.h | 2 +
include/configs/trats.h | 17 +-
7 files changed, 163 insertions(+), 594 deletions(-) create mode 100644
board/samsung/exynos4_common/exynos4_common.c
delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
--
1.7.5.4
^ permalink raw reply [flat|nested] 40+ messages in thread
end of thread, other threads:[~2012-09-28 8:40 UTC | newest]
Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-08-10 10:12 [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 1/4] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 2/4] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards Piotr Wilczek
2012-08-16 9:09 ` Minkyu Kang
2012-08-16 13:55 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 0/6 v2] Code cleaup for trats and universal Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 1/6 v2] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-09-19 10:33 ` Jaehoon Chung
2012-09-20 10:19 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
2012-09-21 1:27 ` Jaehoon Chung
2012-09-21 7:02 ` Jaehoon Chung
2012-09-20 10:19 ` [U-Boot] [PATCH v4 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
2012-09-20 10:19 ` [U-Boot] [PATCH v4 5/6] arm:exynos4:universal: " Piotr Wilczek
2012-09-20 10:20 ` [U-Boot] [PATCH v4 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
2012-09-28 8:40 ` [U-Boot] [PATCH v4 0/6] Code cleaup for trats and universal Minkyu Kang
2012-08-29 7:56 ` [U-Boot] [PATCH v3 2/6] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
2012-09-19 10:21 ` Jaehoon Chung
2012-08-29 7:56 ` [U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
2012-09-19 10:38 ` Jaehoon Chung
2012-08-29 7:56 ` [U-Boot] [PATCH v3 5/6] arm:exynos4:universal: " Piotr Wilczek
2012-08-29 7:56 ` [U-Boot] [PATCH v3 6/6] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 2/6 v2] arm:exynos4:trats: Fix SDRAM size Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 3/6 v2] arm:exynos4:pinmux: Modify the gpio function for mmc Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration Piotr Wilczek
2012-08-24 1:17 ` Jaehoon Chung
2012-08-24 7:40 ` Piotr Wilczek
2012-08-24 8:19 ` Jaehoon Chung
2012-08-24 9:27 ` Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 5/6 v2] arm:exynos4:universal: " Piotr Wilczek
2012-08-23 12:01 ` [U-Boot] [PATCH 6/6 v2] arm:exynos4:universal: Eliminated low level init Piotr Wilczek
2012-08-10 10:12 ` [U-Boot] [PATCH 4/4] arm:exynos4:universal_c210: Eliminate low level initialisation Piotr Wilczek
[not found] <1343913278-16135-1-git-send-email-p.wilczek@samsung.com>
2012-08-09 12:02 ` [U-Boot] [PATCH 0/4] arm:samsung: Cleanup code for trats and universal boards Piotr Wilczek
2012-08-10 2:30 ` Minkyu Kang
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